Abstract: A high-density DRAM in a MTBL method which reduces interference noise between bit lines is provided. Duplication of sense amplifiers (SA) and bit switches (BSW) in a conventional MTBL method is eliminated, and one line of sense amplifiers and bit switches (BSW/SA) is arranged between cell areas. Specifically, arrays are horizontally moved and vertically cumulated so as to reduce the areas. Bit line pairs to be connected are alternately interchanged above and below, every one horizontally aligned sense amplifier (SA). Bit lines of a bit line pair 11 cross at one place on the way, and from the cross, a space between the bit lines is wider. Further, bit lines of a bit line pair 16 do not cross each other, and a space between the bit lines is wider on the way.

Abstract: A method of assembling an interconnect device assembly which consists of cylindrical resilient wire bundles captured within a carrier. In a step of the method, the interconnect device assembly is placed in a fixture and the ends of the resilient wire bundles are deformed by shaping dies in the fixture so that the resilient wire bundles now have a dog bone shape. The dog bone shape of the resilient wire bundles prevents the resilient wire bundles from being partially or totally dislodged during handling and transit.

Abstract: A multilayer ceramic substrate in which an outer metal pad is anchored to the substrate by a single metal-filled via in the first ceramic layer adjacent to the metal pad. In turn, this single metal-filled via is anchored to the substrate by a larger, single metal-filled via in the next ceramic layer adjacent to the first ceramic layer. Preferably, the metal-filled vias and metal pad are 100 volume percent metal.

Abstract: Disclosed is a wedgebond pad structure which includes a semiconductor substrate and a wedgebond pad. The wedgebond pad has a surface which includes a curved or v-shaped feature for receiving a wedge bond. The curved or v-shaped feature may be raised or recessed with respect to the wedgebond pad surface.

Abstract: A method of forming a multichip module in which a thin film structure is formed on a temporary carrier and then an electrically insulating frame is attached to the thin film structure. A semiconductor device is attached to the thin film structure and then the temporary carrier is removed. Lastly, at least one semiconductor device is attached to the other side of the thin film structure. There is interconnectvity through the thin film structure between the semiconductor devices and the frame.

Abstract: A dielectric substrate having an embedded inductor wherein each turn of the inductor traverses several layers such that the top and bottom of each turn of the inductor are parallel to each other but are in different layers and the sides of each turn of the inductor traverse at least one layer to connect the top and bottom of the inductor.

Abstract: A method for positioning an electronic module having a plurality of interconnecting elements into a template. A first portion of the interconnecting elements are aligned with holes in the template and then the first portion of the interconnecting elements are partially inserted into the holes of the template. A second portion of the interconnecting elements are not inserted into the template at this time. Then, the second portion of the interconnecting elements are aligned with holes in the template and then inserted into the holes in the template. Lastly, the electronic module and template are urged together until the first and second portions of the interconnecting elements are fully inserted into the holes in the template. The interconnecting elements may then be tested.

Abstract: An integrated circuit module, a land grid array module, and a method for forming the module, include a substrate, which mounts one or more chips or discrete electronic components, and a cap for covering the substrate, and including at least one protrusion coupled to the cap for limiting the amount of flexing of the substrate during actuation. The at least one protrusion can be either rigidly fixed to the cap or adjustably inserted through the cap.

Abstract: An apparatus in which opposed nozzle assemblies are utilized to clean residual material, such as a metallic paste, from an article, such as a screening mask. Each of the nozzle assemblies has a first set of nozzles for spraying a cleaning agent onto the article in a first pattern to first chemically and mechanically remove residual material from the article. At least one of the nozzle assemblies has a second set of nozzles for spraying a cleaning agent onto the article in a second pattern while simultaneously applying a voltage between the second set of nozzles and the article to then chemically and electrolytically remove the remaining residual material from the article.

Abstract: A semiconductor device, and a method of fabricating the device, having a copper wiring level and an aluminum bond pad above the copper wiring level. In addition to a barrier layer which is normally present to protect the copper wiring level, there is a composite layer between the aluminum bond pad and the barrier layer to make the aluminum bond pad more robust so as to withstand the forces of bonding and probing. The composite layer is a sandwich of a refractory metal and a refractory metal nitride.

Abstract: An integrated circuit having a DRAM array connected to a power supply is tested for excessive current draw by selectively applying voltage to a single wordline or bitline, measuring current drawn, comparing the result with a reference number representing acceptable leakage, and replacing columns of the array having excessive leakage, thereby identifying and repairing latent defects that may become a cause of failure.

Abstract: The present invention provides a thin film transistor structure in which at least a trench is formed in an insulating polymer film formed on a substrate. In the thin film transistor structure, a trench formed in the insulating polymer film accommodates a gate wiring constituted of a plurality of conductive layers. Provided also are a method of manufacturing the thin film transistor structure, and a display device including a thin film transistor array composed of the thin film transistors constituted as described above.

Abstract: Disclosed is a method for depositing a metal layer on an interconnect structure for a semiconductor wafer. In the method, a metal conductor is covered by a dielectric layer. The dielectric layer is patterned so as to expose the metal conductor. A liner layer is then deposited into the pattern. The liner layer is then argon sputter etched to remove the liner layer and expose the metal conductor. In the process of argon sputter etching, the liner layer is redeposited onto the sidewall of the pattern. Lastly, an additional layer is deposited into the pattern and covers the redeposited liner layer.

Abstract: A dielectric substrate having an embedded inductor wherein each turn of the inductor traverses several layers such that the top and bottom of each turn of the inductor are parallel to each other but are in different layers and the sides of each turn of the inductor traverse at least one layer to connect the top and bottom of the inductor.

Abstract: A fixture having a bottom plate, top plate and an expansion block interposed between the bottom plate and top plate. A workpiece is positioned between the expansion block and bottom plate. When the fixture is heated, there is a net displacement exerted by the expansion block so as to apply pressure to the workpiece. The pressure applied by the fixture to the workpiece is due solely to the thermal expansion of the fixture when it is heated.

Abstract: A slurry collection device 1 includes a ring-shaped barrier member 2 provided around a turntable T of a polishing machine E and a ring-shaped slurry collection container 3 provided around the barrier member 2. The turntable T is connected to an upper end of a main rotation shaft T1 that sticks out from a bottom portion of a sink S of the polishing machine E and is lifted from the bottom portion of the sink S. The slurry collection device 1 of the present invention is inserted between the turntable T and the sink S.

Abstract: Disclosed is a reinforced bond pad structure having nonplanar dielectric structures and a metallic bond layer conformally formed over the nonplanar dielectric structures. The nonplanar dielectric structures are substantially reproduced in the metallic bond layer so as to form nonplanar metallic structures. Surrounding each of the nonplanar metallic structures is a ring of dielectric material which provides a hard stop during probing of the bond pad so as to limit the amount of bond pad that can be removed during probing.

Abstract: To easily reduce the occurrence of uneven luminance or flicker in a screen without any manufacturing or cost problems. An output potential waveform outputted from a switching unit 16 of a gate driver IC 7 to a scanning line G is set to have a first waveform having a potential for turning on a switching elements set as its amplitude, and a second waveform connected to the first waveform and oscillated within a period shorter than the second waveform with amplitude smaller than that of the first waveform. Thus, a falling waveform of a scanning signal to be supplied to the switching elements through the scanning line G is inclined beforehand, nonuniformity of the inclination of the falling waveform of the scanning signal supplied to each of the switching elements is reduced, and the occurrence of uneven luminance or flicker in the screen is suppressed.

Abstract: A method and structure for a method of manufacturing a device having different types of transistors, wherein gates of the different types of transistors in the device comprise different materials. The method comprises depositing a silicon layer on a gate dielectric layer, depositing a first-type gate material on the silicon layer, removing the first-type gate material from areas where a second-type gate is to be formed, depositing a second-type gate material on the silicon layer in areas where the first-type gate material was removed, and simultaneously patterning the first-type gate material and the second-type gate material into first-type and second-type gates, and anneal and transform the two types of gate materials.

Abstract: A TFT array substrate 10 of the present invention includes an insulating substrate 12, thin-film transistors formed on the insulating substrate 12 in a matrix, and wirings 46 electrically connected to the thin-film-transistors. A gate-insulating film 32 is formed on the wiring 46, a passivation film 38 is formed on the gate-insulating film 32, and moreover an interlayer insulating film 42 containing an organic polymer with an edge formed thereon is formed on the gate-insulating film 32. An etching stopper 50 is formed on at least either of the gate-insulating film 32 exposed from the edge 48 of the interlayer insulating film 42 or the passivation film 38.