Abstract: A die and method of gang punching selective holes in thin sheet materials such as greensheets are provided in which slugs of greensheet material formed during the punching operation easily fall through the die and are removed. The die uses a number of plates one of which is a window plate having openings corresponding to openings in a die plate disposed thereon. The window plate openings have a larger diameter than the die plate openings and also a plurality have an oval shape which oval shape openings provide less resistance to the falling slugs and facilitate removal of the slugs from the die. The window plate also preferably has a central grid open area with the remainder of the plate having vertical through-holes corresponding to the through-holes of the die plate. The die also preferably employs a die plate made from at least two sheets of material, i.e.

Abstract: A structure for mounting electronic devices. The structure uses a non-conductive, compliant spacer interposed between an underlying carrier and an overlying thin film. The spacer includes a pattern of through-vias which matches opposing interconnects on opposing surfaces of the carrier and the thin film. In this way, solder connections can extend in the through-vias to electrically connect the thin film to the carrier and smooth out topography. In a related process for forming the structure, the thin film is built on a first sacrificial carrier and then further processed on a second sacrificial carrier to keep it from distorting, expanding, or otherwise suffering adversely during its processing. The solder connections between the thin film and the carrier are formed using a closed solder joining process. The spacer is used with laminate cards to create thermal stress release structures on portions of the cards carrying a thin film.

Abstract: A silicon-on-insulation (SOI) body contact is formed within a device region of an SOI substrate so that no space of the SOI substrate is wasted for implementing a body contact. The body contact is formed by epitaxially growing silicon and depositing polysilicon. An electrical device can be formed to overlie the body contact. Thus, no additional circuitry or conductive path is required to electrically connect a body contact and a device region. Also, the body contact provides a predictable electrical characteristics without sacrificing the benefits attained from using the SOI substrate and conservation surface space on the semiconductor die.

Abstract: A process and apparatus are provided for electroplating a film onto a substrate having a top side including a plating surface includes the following steps. Provide a plating tank with an electroplating bath. Provide an anode in the bath. Place a substrate having a plating surface to be electroplated into the electroplating bath connecting surfaces to be plated to a first cathode. Support a second cathode including a portion thereof with openings therethrough extending across the plating surface of the substrate and positioned between the substrate and the anode. Connect power to provide a negative voltage to the first cathode and provide a negative voltage to the second cathode, and provide a positive voltage to the anode.

Abstract: A screening mask having a stress-relieving area including an inner functional area having a pattern which is replicated on an underlying substrate, the inner functional area pattern having an one open area through which a paste is extruded and at least one tab, and an outer nonfunctional area distinct from the inner functional area, the outer nonfunctional area having a stress-relieving area adjacent to an edge of the screening mask that protects the at least one tab in the inner functional area from breaking.

Abstract: A rubbing direction (X) for each upper substrate of a tile panel constituting a liquid crystal panel unit is set along a horizontal direction (H) of the liquid crystal panel unit, a rubbing direction (Y) for each lower substrate of the tile panel is set along a vertical direction (V) thereof, and absorption axes (S) of polarizing plates and are allowed to coincide with the horizontal direction (H) of the liquid crystal panel unit. Moreover, in a set of four tile panels, the rubbing directions (X) and (Y) are made to differ from one another, thus viewing directions (Z) of high contrast are distributed into four directions, and turning directions (reference codes (R) and (L)) of liquid crystal molecules in the respective tile panels are arranged alternately in the horizontal direction (H) of the liquid crystal panel unit.

Abstract: Screening of a workpiece utilizing a screening apparatus which includes a paste dispensing apparatus and a trailing squeegee assembly in close proximity to the paste dispensing apparatus. When the screening apparatus is operable, the squeegee assembly is in contact with the workpiece at the same time as a paste is dispensed from the paste dispensing apparatus.

Abstract: A multilayer ceramic semiconductor chip carrier is provided by a method of interconnecting ground, signal and power lines in a semiconductor chip carrier. The method involves forming a plurality of insulating layers with conductor lines comprising power and ground lines connected in parallel in a single plane formed in planes between the insulating layers. The parallel lines are directed in orthogonal directions in parallel between any two of the insulating layers with alternation successively between planes of X-directed lines and planes of Y-directed coplanar signal, power and ground lines. There are via connections formed between planes connecting a power line in one plane to another power line in another plane. Other via connections between planes connect a ground line in a first plane to another ground line in a second plane, and signal lines are formed in parallel between a ground line and a power line in a given plane.

Abstract: A device for preventing short circuits between solder joints in flip chip packaging. The dielectric interposer has a plurality of apertures or vias which correspond to the I/O pads on a chip and substrate. Preferably, the interposer comprises a polyester film, glass, alumina, polyimide, a heat curable polymer or an inorganic powder filler in an organic material. More preferably, the interposer contains an adhesive or has adhesive layers disposed on the linear surfaces of the interposer. Cone shaped solder elements are formed within the apertures of the interposer. The dielectric interposer is positioned between a chip and substrate in an electronic module and thermally reflowed to create an electrical and mechanical interconnection. The interposer prohibits contact between the solder joints by isolating each of the joints and corresponding bonding pads. The interposer also prevents over compression of the solder joints by acting as a stand off.

Abstract: A scanning probe microscope probe is formed by depositing probe material in a mold that has a cavity in a shape and of a size of the desired form of the scanning probe microscope probe that is being fabricated. In the preferred embodiment, the cavity is formed by lithographically defining, in the body of the mold, the shape and the size of the desired scanning probe microscope probe and etching the body of the mold to form the cavity. Prior to depositing the probe material in the cavity in the mold, the cavity is lined with a release layer which, upon activation after the probe has been formed, permits removal of the probe.

Abstract: A thermal paste for low temperature applications made from a combination of a thermally conducting solid filler, dispersant and linear alkylbenzene carrier. The thermal paste may be applied to an electronic component to increase the cooling of the electronic component.

Abstract: To provide a film thickness testing apparatus and a film thickness testing method in which coherence between light reflected from the surface of a film and light reflected from the surface of a substrate is improved so as to accurately visually test film thickness irregularities. Film thickness testing is conducted by using a light source part for irradiating a substrate with light having an intensity peak with a half band width of 30 nm or less and having spectral intensity in a peak wavelength region alone.

Abstract: A thin film transistor and method of making the same is disclosed in which a contact hole is formed with a flattened interface between openings in an inorganic material passivation layer and an organic material interlayer insulating film thereabove. The method includes etching an opening in the interlayer insulating film, using that opening as a mask for subsequently etching a self-aligned opening in the passivation layer, and again etching the interlayer insulating film in a develop back process to obtain a contact hole having a flattened inner sidewall.

Abstract: A screening mask for screening an article, the screening mask including a screening mask body having a screening side and a nonscreening side, an one opening through the mask for screening at least one feature from the screening side to the nonscreening side, and a blind opening for protecting a previously screened feature. The blind opening is blocked on the screening side and open on the nonscreening side. The screening mask is used in double pass screening so that a second feature may be formed on the article without damaging a previously formed feature.

Abstract: Start with a semiconductor substrate with contacts exposed through an insulating layer. Form a base over the contacts, with the base composed of at least one metal layer. Then form a conductive metal layer over the base. Form a mask over the top surface of the conductive metal layer with C4 solder bump openings therethrough with the shape of C4 solder bump images down to the surface of the conductive metal layer above the contacts. Etch away the exposed portions of the conductive metal layer below the C4 solder bump openings to form through holes in the conductive metal layer exposing C4 solder bump plating sites on the top surface of the base below the C4 solder bump openings with the conductive metal layer remaining intact on the periphery of the through holes at the C4 solder bump plating sites. As an option, form a barrier layer over the plating sites next.

Abstract: A method for increasing the surface area of an original surface in a semiconductor device is disclosed. In an exemplary embodiment of the invention, the method includes forming a layered mask upon the original surface, the layered mask including a masking layer thereatop having a varying thickness. An isotropic etch is then applied to the layered mask, which isotropic etch further removes exposed portions of the original surface as the layered mask is removed. Thereby, the isotropic etch enhances the non-uniformity of the masking layer and creates a non-uniformity in planarity of the original surface.

Abstract: A method of processing greensheets for use as microelectronic substrates comprises providing a greensheet having a width, a length and a thickness, bonding to the greensheet, within the greensheet width and length, a frame adapted to constrain movement of the greensheet within the frame, processing the greensheet and bonded frame, and removing the frame from the processed greensheet. The processing of the greensheet and bonded frame may include punching vias in the greensheet, filling the vias in the greensheet with conductive material, patterning the greensheet by applying conductive paste to the vias and greensheet surface, stacking the patterned greensheet and bonded frame with at least one other patterned greensheet and bonded frame, and laminating the greensheets. The frame is preferably removed from the processed greensheet after laminating the greensheets, and before the laminated greensheets are subsequently sintered.

Abstract: A method for displacing an article using first and second pallets for holding and transporting an article between two process stations and an H-bar assembly for receiving the first and second pallets, the method including the steps of: receiving the first and second pallets and articles thereon by the H-bar assembly at one of the two process stations; performing a first process on the articles while received by the H-bar assembly; moving the first and second pallets and articles thereon to a second process station; and performing a second process on the articles while at the second process station.

Abstract: A method of forming a lead-free solder alloy on an electronic substrate. In the method, a metal stack which includes a thick nickel barrier layer and an outer copper layer is then evaporated or plated with silver and tin. Upon heating to an appropriate temperature, the copper, tin and silver form a lead-free tin, silver, copper solder.

Abstract: A module or assembly is formed by interposing a polymer between a carrier and a semiconductor device to be secured to the carrier. The polymer has ionized metallic particles suspended in it. Before setting or curing the polymer, the module is exposed to an electric field which induces migration of the metallic particles to the opposing pads of the carrier and semiconductor device. Such migration ultimately forms metal dendrites extending between mating pad pairs. The dendrites establish a metallurgical bond and conductive paths between the carrier and the overlying semiconductor device. When the polymer is subsequently set, the carrier and device are not only adhered to each other, but the dendrite connections are fixed and structurally reinforced to provide the needed electrically conductive paths.