Patents Represented by Attorney J.C. Patents
  • Patent number: 8273421
    Abstract: The invention is to provide a liquid crystal composition that satisfies at least one of characteristics such as a high maximum temperature of a nematic phase, a low minimum temperature of a nematic phase, a small viscosity, a suitable optical anisotropy, a large negative dielectric anisotropy, a large specific resistance, a high stability to ultraviolet light and a high stability to heat, or that is suitably balanced regarding at least two of the characteristics; and is to provide a AM device that has a short response time, a large voltage holding ratio, a large contrast ratio, a long service life and so forth; wherein the liquid crystal composition has negative dielectric anisotropy and includes a specific compound having tertahydropyran-2,5-diyl as a first component and a specific four-ring compound having a high maximum temperature as a second component, and the liquid crystal display device contains this composition.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: September 25, 2012
    Assignees: JNC Corporation, JNC Petrochemical Corporation
    Inventors: Masayuki Saito, Norikatsu Hattori
  • Patent number: 8275129
    Abstract: A data scrambling method for scrambling raw data from a host system is provided. The data scrambling method includes generating a random number and storing the random number into a storage unit. The data scrambling method also includes receiving a user password from the host system, generating a padded value by using a first function unit based on the random number and the user password, and generating a nonce value by using a second function unit based on the padded value and a key. The data scrambling method further includes generating scrambled data corresponding to the raw data by using a third function unit based on the nonce value and the raw data. Accordingly, the raw data of the host system can be effectively protected.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: September 25, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Tzu-Yuan Meng, Ching-Wen Chang
  • Patent number: 8273805
    Abstract: An ink-jet ink is provided. The ink-jet ink includes a compound of formula (1) to form a cured film with high-flame retardancy.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: September 25, 2012
    Assignee: JNC Corporation
    Inventors: Hiroyuki Satou, Setsuo Itami, Yosihiro Deyama
  • Patent number: 8275931
    Abstract: A block management method for a flash memory of a storage system is provided, wherein the flash memory includes a plurality of physical blocks. The block management method includes grouping the physical blocks into a plurality of physical units, and grouping the physical units into a data area, a spare area, and a replacement area. The block management method further includes performing a first physical unit switch which switches the physical units between the data area and the spare area, and performing a second physical unit switch which switches the physical units between the spare area and the replacement area. Therefore, the block management method can uniformly use the physical blocks and thereby effectively prolong a lifespan of the storage system.
    Type: Grant
    Filed: March 18, 2009
    Date of Patent: September 25, 2012
    Assignee: Phison Electronics Corp.
    Inventor: Chih-Kang Yeh
  • Patent number: 8275960
    Abstract: A method for protecting data in the hard disk is provided. The method is suitable for a computer system and includes the following steps. First, a plurality of specification parameters conforming to the computer system is read. Next, a part of the specification parameters are encoded for obtaining a recognition byte. Then, when the computer system writes data to a hard disk, a specific operation is performed to a byte read or written by the hard disk and the recognition byte for maintaining a security of the data in the hard disk.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: September 25, 2012
    Assignee: Inventec Corporation
    Inventor: Sheng-Hsin Lo
  • Patent number: 8274302
    Abstract: A wafer and a test method thereof are provided. The invention utilizes a first group of probes to perform a high voltage stress (HVS) test on a first chip, and utilizes a second group of probes to perform a function test on a second chip, where a period of the high voltage stress test overlaps a period of the function test, thereby greatly decreasing the test time of the wafer.
    Type: Grant
    Filed: October 30, 2009
    Date of Patent: September 25, 2012
    Assignee: Himax Technologies Limited
    Inventors: Tzong-Yau Ku, Chien-Ru Chen, Chin-Tien Chang, Ying-Lieh Chen, Lin-Kai Bu
  • Patent number: 8269128
    Abstract: A vacuum switch tube is provided, which includes a first conductive rod disposed with a first contact and a second conductive rod disposed with a second contact. The first contact and the second contact are disposed facing each other and sealed in a vacuum tube body. Contact bodies of the first contact and the second contact are spheres with spherical caps at two ends being cut off. The first contact and the second contact respectively include conductive members and magnetic members extending in the same direction and joining with each other to form the contact bodies. The cross section shape of the magnetic members is divided by a neutrality line into two unequal regions. The magnetic member of the first contact and the conductive member of the second contact are correspondingly disposed. The conductive member of the first contact and the magnetic member of the second contact are correspondingly disposed.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: September 18, 2012
    Assignee: Beijing Orient Vacuum Electric Co., Ltd.
    Inventor: Jianchang Ren
  • Patent number: 8270065
    Abstract: A colored electrophoretic display includes a transparent substrate, a transparent conductive layer, a planar electrophoretic cell, and a backplane substrate in sequence of receiving an incident light. The backplane substrate includes a first block reflective electrode, a second block reflective electrode and a third block reflective electrode, tiled in a planar arrangement perpendicular to the incident light and electrically connected to a driving circuitry in the backplane substrate. The driving circuitry electrically drives the first block reflective electrode, the second block reflective electrode and the third block reflective electrode individually as well as the transparent conductive layer to form spatially colored reflective light modulation.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: September 18, 2012
    Assignee: Shanghai Lexvu Opto Microelectronics Technology Co., Ltd.
    Inventor: Herb He Huang
  • Patent number: 8269129
    Abstract: The present invention relates to a vacuum switch tube, which includes a first conductive rod and a second conductive rod. A first contact is disposed at the first conductive rod. A second contact is disposed at the second conductive rod. The first contact and the second contact include conductive members and magnetic members, and are sealed in a vacuum tube body and correspondingly disposed. A front end of the first contact is disposed with a convex hemisphere. A front end of the second contact is disposed with a concave hemisphere matching with the front end of the first contact in shape. Therefore, the vacuum switch tube increases surface areas of the contacts, and reduces a resistance increase caused by the poor contacting effect. Meanwhile, a rotating magnetic field is formed between the convex hemisphere and concave hemisphere contacts, thereby facilitating arc-extinguishing and enhancing a breaking capability.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: September 18, 2012
    Assignee: Beijing Orient Vacuum Electric Co., Ltd.
    Inventor: Jianchang Ren
  • Patent number: 8261436
    Abstract: A circuit substrate fabricating process includes a base layer, a patterned conductive layer, a dielectric layer, an outer pad and a conductive block. The patterned conductive layer is disposed on the base layer and has an inner pad. The dielectric layer is disposed on the base layer and covers the patterned conductive layer. The outer pad is disposed on the dielectric layer. The conductive layer is passed through the dielectric layer and connected between the outer pad and the inner pad, wherein the outer pad and the conductive block are formed as an integrative unit, and an outer diameter of the outer pad is substantially equal to an outer diameter of the conductive block. In addition, a fabricating process for the circuit substrate is also provided.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: September 11, 2012
    Assignee: VIA Technologies, Inc.
    Inventor: Chen-Yueh Kung
  • Patent number: 8264612
    Abstract: A method of raster-scan search for multi-region OSD and a system using the same are provided. The multi-region OSD is to be displayed on a screen after an alpha-blending of a mixer. The method includes at least following procedures. First, a global header search is executed in the first memory module for each or a portion of a plurality of search lines so as to determine a blending region and store header addresses of OSD regions in a second memory module. Next, whether there is a dummy region at the search line is determined. In addition, an alpha value for the dummy region, a dummy data of the dummy region and the OSD data of the OSD regions at the search line are transmitted to the mixer.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: September 11, 2012
    Assignee: ALi Corporation
    Inventors: Chia-Ching Lin, Fu-Chung Chi
  • Patent number: 8263732
    Abstract: [Object] To obtain an alignment film having excellent alignment stability of a liquid crystal and a high voltage holding ratio by application of linearly polarized light to a polyamic acid having a specific structure and then imidization under heat. [Solving Means] A photo-alignment film is obtained by: applying a polyamic acid solution on a substrate, where the polyamic acid contains, in its main chain, at least a group having unsaturated groups having 1 to 3 carbon-carbon double bonds or 1 to 4 triple bonds; vaporizing a solvent from a film formed; applying linearly polarized light to the film after the vaporization of the solvent; and then heating the film to imidize the polyamic acid.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: September 11, 2012
    Assignees: JNC Corporation, Chisso Petrochemical Corporation
    Inventor: Norio Tamura
  • Patent number: 8264449
    Abstract: A method for driving a color-sequential display suitable to reduce the color break-up phenomenon of the color-sequential display is disclosed. The method includes: dividing each sub-frame period into a data-writing period and a backlight turned-on period; within the data-writing period, transmitting a data of first color; during a first duration of the backlight turned-on period, turning on a first color backlight; during a second duration of the backlight turned-on period, turning on a second color backlight.
    Type: Grant
    Filed: February 4, 2009
    Date of Patent: September 11, 2012
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Jhen-Shen Liao, Kuan-Hung Liu, Yi-Nan Chu
  • Patent number: 8266334
    Abstract: A data writing method for writing data from a host system into a plurality of memory dies of a rewritable non-volatile memory storage apparatus is provided. The data writing method includes determining whether the data transmission interface of the host system complies with a first interface standard or a second interface standard. The data writing method also includes using a general mode to write the data into the memory dies when the data transmission interface of the host system complies with the first interface standard and using a power saving mode to write the data into the memory dies when the data transmission interface of the host system complies with the second interface standard. Accordingly, the data writing method can effectively prevent the stability of the rewritable non-volatile memory storage apparatus from reducing due to insufficient power supplied by the data transmission interface.
    Type: Grant
    Filed: April 21, 2010
    Date of Patent: September 11, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Chien-Hua Chu, Hong-Lipp Ko
  • Patent number: 8261447
    Abstract: A method for manufacturing a drive wheel bearing device is provided. During the manufacturing, a swaged portion is formed in a manner as a non-hardened region, and in a manner that variations based on a reference surface in the axial direction of the flat surface are restricted within +/?0.2 mm. The reference surface is provided with an end face on an outboard side of a flange for an attachment of a wheel or an end face on an inboard side of the flange for attachment to a vehicle body. Part of the swaged portion making contact with an outer joint member of to drive wheel bearing device is formed into a flat surface. Serrations and a pilot part are formed on an inner periphery of a first inner member of the drive wheel bearing device. An inner peripheral surface of the pilot part is formed as a turned surface, and the turned surface has been turned after forming the swaged portion.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: September 11, 2012
    Assignee: NTN Corporation
    Inventors: Eiji Tajima, Hisashi Ohtsuki, Akira Torii, Motoharu Niki
  • Patent number: 8266713
    Abstract: A method for transmitting and dispatching data stream, which is used for transmitting data stream to a storage device having a non-volatile memory and a smart card chip from a host, is provided. The method includes: setting a key between the host and the storage device; creating a temporary file in the non-volatile memory; verifying the temporary file based on the key; recording a logical block address of the temporary file when verification of the temporary file is successful; and judging whether the data stream from the host is written at the logical block address, wherein the data stream is identified to be a command-application protocol data unit (C-APDU) and is dispatched to the smart card chip when the data stream from the host is written at the logical block address. Accordingly, it is possible to efficiently distinguish a general data from a command of the smart card chip.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: September 11, 2012
    Assignee: Phison Electronics Corp.
    Inventors: Meng-Chang Chen, Sing-Chang Liu
  • Patent number: 8266082
    Abstract: A context inference system including a mobile device and at least one information sending unit is provided. The mobile device includes an information receiving unit and a context operation platform. The information receiving unit receives a context information. The context operation platform includes an information collection module for collecting the information used for inferring a context based on a convergent search and an expanded search, a data classification and storage module for storing and classifying a user preference information of a user, and an inference module for inferring a context. The information sending unit transmits the context information to the mobile device. The context operation platform performs a context inference process according to the context information and the user preference information in order to forecast the user's need and provide a recommendation information to the user.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: September 11, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Tung-Hung Lu, Li-Dien Fu, Ming-Shien Weng, Allen Huang
  • Patent number: 8258007
    Abstract: A package structure and a package process are proposed in using pillar bumps to connect an upper second chip and through silicon vias of a lower first chip, wherein a gap between the first chip and the second chip can be controlled by adjusting a height of the pillar bumps. In other words, the pillar bumps compensate the height difference between the first chip and a molding compound surrounding the first chip so as to ensure the bondibility between the pillar bumps and the corresponding through silicon vias and improve the process yield. Furthermore, the pillar bumps maintain the gap between the second chip and the molding compound for allowing an underfill being properly filled into the space between the first chip and the second chip.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: September 4, 2012
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chi-Chih Shen, Jen-Chuan Chen, Hui-Shan Chang, Wen-Hsiung Chang
  • Patent number: D667573
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: September 18, 2012
    Assignee: Toshiba Lighting & Technology Corporation
    Inventors: Junichiro Yamamoto, Shigeru Motoki, Takeshi Hisayasu
  • Patent number: D667585
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: September 18, 2012
    Assignee: Toshiba Lighting & Technology Corporation
    Inventors: Makoto Yamazaki, Yoshiji Kamata, Takayoshi Moriyama