Abstract: A dependent, nonprogrammable, character-based workstation terminal (DWS) supports a mouse. A terminal controller entirely within the DWS processes and displays mouse motions, but sends mouse button actuations, with the current mouse position, to a single workstation controller (WSC) handling many DWS'. The WSC processes the actuations according to a set of rules, and sends data streams to a main processor (MP) serving multiple WSCs. The MP executes user application programs, partially in response to data streams representing mouse events. The MP executes user application programs, partially in response to data streams representing mouse events. The MP may also send mouse rule sets to the WSCs in data streams.

Abstract: An elastic buffer utilizes a circular buffer for receiving successive symbols over a communications link. The transmission clock of the received symbols and internal clock of the node on which the elastic buffer is located are independent. The transmission clock is used to load the successive symbols received over the transmission link into the circular buffer. The internal clock controls reading of the successive symbols from the circular buffer. A phase comparator operating on the transmission and internal clocks periodically generates an input side skip signal when the transmission clock overtakes the phase of the internal clock and an output side skip signal when the internal clock overtakes the phase of the external clock. An idle symbol detector monitors the successive symbols generates an idle indication when an idle symbol occurs. Responsive to concurrence of an input side skip signal and an idle indication, loading of an idle symbol from successive symbols into the circular buffer is omitted.

Abstract: Assembling a circuit card to a straddle mount connector with improved alignment. A holder using a parallel linkage holds the card parallel to the connector despite thickness variations, during solder bonding.

Abstract: An asynchronous data channel for a disk drive reads fields of data synchronized at a bit frequency which are separated by adjustment regions having two different patterns of control signals. Each pattern repeats at a different submultiple of the bit frequency. The channel derives two clock signals at the two submultiple frequencies, and produces a synchronizing signal related to the phase coincidence of the two clock signals. The synch signal indicates the start of the dam field. The channel can also produce the control-signal patterns and write them to a disk.

Abstract: A system and method for controlling data transmission between computer systems is suitable for use at the OSI session level of structured network architectures. A receiving logical unit can dynamically control packet window sizes to optimize its resources. In the sending logical unit, the number of packets which may be sent by a single session, but not yet acknowledged at the data link control level, is limited. This results in all sessions in the system having a relatively fair access to a single communications link. The number of packets allowed for any given session need not have any relationship to the window size in an adaptive session level pacing environment.

Abstract: A method and apparatus are provided for adaptive chip trim adjustment for an integrated circuit. A plurality of switching devices have an unswitched state and a switched state. The unswitched state corresponds to one binary value, and the switched state corresponds to another binary value. A first trim word is provided by sensing the switching devices. The switching devices are temporarily bypassed, and an override bit pattern is supplied to simulate any desired pattern of the switching device states. The override bit pattern is used for simulating a switched or unswitched state for each of the plurality of switching devices.

Abstract: The method and system of the present invention permit the efficient management of the display of a panoramic or wide-angle image on a display device in a data processing system. The panoramic image typically includes a number of segments wherein only a portion of those segments may be displayed on the display device at selected resolutions. The method and system of the present invention includes displaying a substantially circular icon, having a defined periphery. Each portion of the defined periphery corresponds to one or more of the segments making up the panoramic image. A moveable control element is displayed along a selected arc about the periphery. One or more of the segments of the panoramic image corresponding to each portion of the defined periphery within the selected arc may then be selected and is displayed on the display device by manipulating the position of the moveable control element.

Abstract: A data processing network includes multiple processing devices, multiple memory cards of main storage, and a shared interface. Each of the memory cards includes memory arrays, an internal register for temporarily storing a pointer data word read from the arrays, and logic circuitry. When one of the processing devices sends a tag bit extraction or tag bit insertion command to one of the memory cards, the pointer to be modified is retrieved from a selected address in the memory arrays and latched into the internal register. The logic circuitry provides the tag bits to an AND logic gate and provides the AND gate output to the processor in the case of tag bit extraction. For tag bit insertion, the circuitry applies the pointer from the arrays and a tag bit input from the processor, as inputs to a multiplexer and provides the multiplexer output back to the selected address in the arrays.

Abstract: An optical storage arrangement is provided where a unified optical disk, or other optical media, has separate Read/Write (R/W) and Write Once Read Many (WORM) areas. A Read/Write head or transducer selectively records data only once in the WORM area but records and re-records data in the R/W area. Both areas can be selectively read repetitively. The WORM area is used to store data records and the R/W area contains directories for the data records recorded in the WORM area.

Abstract: A method and system in a data processing system for providing a dual-port memory device having redundant data stored in multiple memory arrays. A first set of data and address latches, coupled to a first data port, are provided for storing data and address information. A second set of data and address latches, coupled to a second data port, are provided for storing data and address information. Each data port is coupled to a memory array. After an external memory access period, a cross-write circuit performs an internal cross-write operation by writing data into a second memory array in response to data previously written to a first memory array and stored in the first set of data and address latches, and writing data into a first memory array in response to data previously written to a second memory array and stored in the second set of data and address latches, wherein a redundant copy of data written to either the first or second memory arrays is created.

Abstract: The present invention involves a BICMOS logic switching circuit biased between upper and lower supply voltages. This circuit includes a CMOS logic circuit driven by a plurality of logic input signals. This logic switching circuit also has a driving circuit coupled to the CMOS logic switching circuit and includes an output node, a first bipolar transistor, and a second bipolar transistor. The first bipolar transistor is coupled in series with the second bipolar transistor with the output node therebetween for providing an output signal on the output node, wherein the second bipolar transistor has a base directly coupled to a field effect transistor switch coupled to the upper supply voltage. The field effect transistor switch is controlled by logic input signals.

Abstract: A computer system in which each of certain critical instructions, all performing multiple main storage accesses to shared data, have the appearance of executing required main storage accesses atomically with respect to a predefined set or class of instructions.The instructions in each set, referred to as relatively atomic instructions, are grouped together based on the data structure or object class they affect.

Abstract: Packaging for an electronics assembly. A base card has a row of elongated slots. A number of individually insertable subassemblies have standoff feet and a pair of offset hooks at their sides. The hooks snap into the slots in such a way that each slot can hold the hooks for four different subassemblies, which are positioned adjacent each other and on both sides of the base card.

Abstract: Assembling a circuit card to a straddle mount connector with improved alignment. A holder using a parallel linkage holds the card parallel to the connector despite thickness variations, during solder bonding.

Abstract: Liquid abrasive slurry for chemical-mechanical polishing of semiconductor wafers is held on a rotating polish table by a containment device having two continuous circular bonded strips of differing flexibilities. A releasable clamp seals the entire length of the more flexible strip to the table periphery.

Abstract: Pressurized liquid solvent is dispensed on specific areas of a semiconductor wafer. A vented accumulator removes bubbles introduced by an upstream needle valve. The accumulator outlet leads directly to a dispensing tip, without further pressure drop.

Abstract: In a system of digital chips, the time delay in all clock trees is equalized by equalizing the delay through each level of all trees. The level delays are equalized by adjusting the capacitance of terminators in each net at each level, and/or by adjusting the performance (power) of each driver at each level. Where the capacitance of a net is too low to be compensated by a driver, a capacitive terminator is selectively added to that net.