Patents Represented by Attorney Jackson E. Stanland
  • Patent number: 4401900
    Abstract: A circuit is provided for sampling and accurately reproducing unknown signals with picosecond resolution, which could be electrical, optical, X-ray, gamma ray, or particle signals. The circuit comprises a superconductive monitor gate having at least two states which are distinguishable from one another. The monitor gate could be, for example, comprised of a Josephson device or a superconducting quantum interference device (SQUID). Switching means, including a source of the unknown signal, are provided to switch the state of the monitor gate. This switching means includes a sampling pulse source and a bias current source which are combined with the unknown signal to change the state of the monitor gate. A noise elimination means is also provided including a lock-in amplifier, a comparator, and a feedback loop. A time averaging technique eliminates any incorrect indications resulting from noise.
    Type: Grant
    Filed: December 20, 1979
    Date of Patent: August 30, 1983
    Assignee: International Business Machines Corporation
    Inventor: Sadeg M. Faris
  • Patent number: 4392148
    Abstract: In superconductive circuitry including a superconducting ground plane, a magnetic flux trapping moat is provided which surrounds a superconductive device. The moat is preferably a cut through the superconducting ground plane which extends along a perimeter surrounding the superconducting device, the moat being continuous except for small regions where there is no cut. The small regions serve as current carrying portions to link the ground plane within the moat to the rest of the ground plane outside of the moat. The moat is a flux pinning center so that magnetic flux does not enter the ground plane region located near the superconducting device. In a Josephson circuit, the Josephson tunnel devices are especially sensitive to trapped magnetic flux in the ground plane, and the provision of a moat around each of the devices prevents flux from moving into the ground plane areas near the devices and becoming trapped therein.
    Type: Grant
    Filed: December 31, 1980
    Date of Patent: July 5, 1983
    Assignee: International Business Machines Corporation
    Inventors: Wen H. Chang, Tushar R. Gheewala, Erik P. Harris
  • Patent number: 4386849
    Abstract: A method for testing optical imaging systems by the use of moire stripes, wherein two copies of an optical grating are made and simultaneously illuminated to produce a moire pattern which is a measure of the distortion of the imaging system. In a first step an original grating is transferred by a light beam as a contact copy onto a substrate. In a second step, the imaging system to be tested copies the original grating for a second time onto the substrate, except that the second grating copy is rotated slightly with respect to the first grating copy. The points of intersection of the two superimposed gratings produce moire stripes when illuminated, the positions of the stripes being calculated precisely with the assumption that ideal gratings were used. If the imaging system to be tested shows distortions, the position of the moire stripes that are observed will not correspond to these calculated positions. The deviation therefrom is a measure of the imaging system errors.
    Type: Grant
    Filed: May 22, 1981
    Date of Patent: June 7, 1983
    Assignee: International Business Machines Corporation
    Inventors: Gerd Haeusler, Walter Jaerisch
  • Patent number: 4365317
    Abstract: This superconductive latch circuit uses superconductive switching devices and can be powered by the same phase of AC power used to power other circuits with which the latch is used. The latch is comprised of a storage loop including a superconductive switch and an inductor. It is also comprised of another superconductive switch through which an AC gate current can flow and whose state determines whether or not the AC current is delivered to the superconductive storage loop. Information is stored in the loop as the presence and absence of a circulating current of either polarity. In a variation of this latch, an output of the sense circuit which detects the state of the storage loop if fed back as a control signal to the superconductive switch in the storage loop and also as one input to an AND gate to which a SET signal is also applied. AC power is switched to the storage loop when both inputs to the AND circuit are simultaneously present.
    Type: Grant
    Filed: August 6, 1980
    Date of Patent: December 21, 1982
    Assignee: International Business Machines Corporation
    Inventor: Tushar R. Gheewala
  • Patent number: 4361768
    Abstract: Josephson solitons are steered along selected paths in response to applied control signals, the output path chosen being dependent solely upon the presence and absence of these control signals. An input Josephson transmission line is provided along which the Josephson soliton travels. This input line intersects with two output Josephson transmission lines. Bias currents of opposite polarity in the output transmission lines are used to steer the soliton into a selected one of the output lines. At the intersection of the input line and the output lines an isolating resistor is located. This resistor dissipates the anti-soliton created at the intersection and provides isolation between the input and the output of the device. In a preferred embodiment, one electrode of the input and output Josephson transmission lines can be comprised of a common superconductor and the isolating resistor can be located between the other electrodes of the output transmission line.
    Type: Grant
    Filed: September 29, 1980
    Date of Patent: November 30, 1982
    Assignee: International Business Machines Corporation
    Inventor: Thekkemadathil V. Rajeevakumar
  • Patent number: 4351712
    Abstract: A surface reaction process for controlled oxide growth is disclosed using a directed, low energy ion beam for compound or oxide formation. The technique is evaluated by fabricating Ni-oxide-Ni and Cr-oxide-Ni tunneling junctions, using directed oxygen ion beams with energies ranging from about 30 to 180 eV. In one embodiment, high ion current densities are achieved at these low energies by replacing the conventional dual grid extraction system of the ion source with a single fine mesh grid. Junction resistance decreases with increasing ion energy, and oxidation time dependence shows a characteristic saturation, both consistent with a process of simultaneous oxidation and sputter etching, as in the conventional r.f. oxidation process. In contrast with r.f. oxidized junctions, however, ion beam oxidized junctions contain less contamination by backsputtering, and the quantitative nature of ion beam techniques allows greater control over the growth process.
    Type: Grant
    Filed: December 10, 1980
    Date of Patent: September 28, 1982
    Assignee: International Business Machines Corporation
    Inventors: Jerome J. Cuomo, James M. E. Harper
  • Patent number: 4344052
    Abstract: Josephson devices are distributed in series in a transmission line structure in which electromagnetic waves are used to synchronize the dynamics of the Josephson devices in order to achieve coherence between the devices. Electromagnetic waves, such as oscillatory traveling waves, standing waves, and solitary waves along the transmission line couple the Josephson devices in a manner such that coherence is achieved for the entire array. The Josephson devices can be tunnel junctions, point contacts, micro bridges, and weak links, and more generally include any such superconductive device which obeys the Josephson equations of voltage and current. The transmission line is any line which controllably supports electromagnetic waves, and can include strip lines located over a ground plane, coaxial lines, etc. A DC bias is supplied to the transmission line, and the ends are terminated in accordance with the type of wave to be propagated along the line.
    Type: Grant
    Filed: September 29, 1980
    Date of Patent: August 10, 1982
    Assignee: International Business Machines Corporation
    Inventor: Arthur Davidson
  • Patent number: 4338622
    Abstract: A semiconductor circuit in which a plurality of transistors is provided, the collector regions/contacts and the base regions/contacts of the transistors being mutually self-aligned. In one embodiment, the collectors have conductive layer contacts (such as metal) and are self-aligned to polysilicon base contacts while in another embodiment the base contacts are comprised of a conductive (metal) layer while polysilicon is used for the collector contacts. The collectors of these transistors can be butted to a field oxide to reduce the extrinsic base area and to minimize excess charge storage in the base region. The base contacts, whether polysilicon or metal, etc. provide alternate base current paths so that the removal of the extrinsic base area does not adversely affect the total amount of base current which can flow.
    Type: Grant
    Filed: June 29, 1979
    Date of Patent: July 6, 1982
    Assignee: International Business Machines Corporation
    Inventors: George C. Feth, Tak H. Ning, Denny D. Tang, Siegfried K. Wiedmann, Hwa N. Yu
  • Patent number: 4336523
    Abstract: A switching and storage device is described in which a superconductor is arranged in regard to a magnetic or magnetizable element so that the magnetic field of the element surrounds the superconductor. The inner inductivity of the superconductor is subject to strong variation if at least one lateral dimension of the superconductor is comparable with or smaller than the penetration depth of the field into the superconducting material. If the superconductor is bifurcated, an electric current of sufficient magnitude fed externally distributes to flow essentially in one branch while the other branch essentially remains currentless. External control by a magnetic field can switch the current into the other branch, i.e., the device is bistable. The switching process inherently is fast and of low power consumption.
    Type: Grant
    Filed: May 29, 1980
    Date of Patent: June 22, 1982
    Assignee: International Business Machines Corporation
    Inventor: Rudolf Jaggi
  • Patent number: 4334158
    Abstract: An amplifying or switching superconductive device is described whose current-voltage characteristic is drastically altered by heavy injection of excess energetic quasi-particles. In this device, the superconducting bandgap of a superconducting layer is greatly altered by overinjection of energetic quasi-particles so that the bandgap changes greatly with respect to its thermal equilibrium value, and in most cases is made to vanish. In a preferred embodiment, a three electrode device is fabricated where at least one of the electrodes is a superconductor. Tunnel barriers are located between the electrodes. A first tunnel junction is used to heavily inject energetic quasi-particles into the superconducting electrode to change its superconducting bandgap drastically. In turn, this greatly modifies the current-voltage characteristics of the second tunnel junction. This device can be used to provide logic circuits, or as an amplifier, and has an output sufficiently large that it can drive other similar devices.
    Type: Grant
    Filed: June 6, 1980
    Date of Patent: June 8, 1982
    Assignee: International Business Machines Corporation
    Inventor: Sadeg M. Faris
  • Patent number: 4330848
    Abstract: Amorphous ferrimagnetic layers are described with support stable and mobile magnetic charged walls. These layers can be used as drive layers in magnetic bubble domain devices, and are characterized by very weak even-fold in-plane anisotropy, or substantially zero in-plane anisotropy. The layers are metallic alloy compositions having magnetic properties that can be tailored over wide ranges, and are particularly suitable as drive layers for the propagation of bubble domains of extremely small diameters.
    Type: Grant
    Filed: March 10, 1980
    Date of Patent: May 18, 1982
    Assignee: International Business Machines Corporation
    Inventors: Richard J. Gambino, Robert C. Taylor
  • Patent number: 4316200
    Abstract: In electrical circuitry, and particularly superconducting circuitry including Josephson tunnelling devices, it is often necessary to provide solder contacts to electrical lines, where the electical lines would be destroyed if there were interdiffusion between the lines and the solder. To avoid this problem, a laterally extending metallic layer is used as a diffusion barrier between the solder land and the electrical line which can be a superconducting line. The diffusion barrier is comprised of a refractory metal which has a first portion electrically contacting the solder land and a second, laterally displaced portion, electrically contacting the electrical line. An insulating protective layer on the diffusion barrier layer separates the solder land and the electrical line.
    Type: Grant
    Filed: March 7, 1980
    Date of Patent: February 16, 1982
    Assignee: International Business Machines Corporation
    Inventors: Irving Ames, Wilhelm Anacker, Kurt R. Grebe, Charles J. Kircher
  • Patent number: 4313066
    Abstract: Direct coupled, nonlinear injection logic circuits having high gain, good isolation between input and output, the capability of parallel fan-in and fan-out, and which do not require a large area. These circuits are comprised of a first stage that isolates the input from the output and other stages which can be used for additional gain, or for building logic circits, such as AND, and DOT-OR. The first stage isolation is a parallel network comprised of two circuits, each circuit of which includes a series connection of resistor-Josephson tunnelling device. A gate current I.sub.g flows through each Josephson device when the devices are in their zero voltage states. An input current I.sub.c is injected into one of the parallel circuits while an output is taken from the other parallel circuit. When an input current is injected, one of the Josephson devices is switched to the nonzero voltage state, which then causes a greater amount of gate current I.sub.
    Type: Grant
    Filed: August 20, 1979
    Date of Patent: January 26, 1982
    Assignee: International Business Machines Corporation
    Inventor: Tushar R. Gheewala
  • Patent number: 4308592
    Abstract: A technique and structure is described in which bubble domain devices can be made, and particularly bubble domain devices comprisng contiguous propagation elements. A thin magnetoresistive layer, such as permalloy, is blanket deposited over a substrate including a bubble domain film, and is then selectively "poisoned" to destroy its magnetization except in those areas where thin sensors are to be provided. The poisoned portions of the magnetoresistive layer serve as a plating base for conductor metallurgy which can be used as an ion implantation mask, and for carrying electrical current. This eliminates some process steps which had been required in the prior art, and does not leave magnetic permalloy in those areas of the bubble domain chip were they would adversely affect propagation of domains by ion implanted contiguous propagation elements. This technique can also be used to make bubble domain devices having gapped propagation elements.
    Type: Grant
    Filed: June 29, 1979
    Date of Patent: December 29, 1981
    Assignee: International Business Machines Corporation
    Inventor: Richard P. McGouey
  • Patent number: 4283775
    Abstract: A bubble storage system using contiguous propagation elements is described using magnetically soft drive layers for movement of the bubble domains in a bubble domain film, in response to the reorientation of a magnetic drive field in the plane of the drive layers. In contrast with prior art contiguous element propagation structures, charged walls are not employed for movement of bubble domains. Instead, magnetic poles along the drive layers are used to move the domains. Two drive layers are used, each of which is comprised of a magnetically soft material, such as permalloy. The drive layers are located at different heights with respect to the layer in which the magnetic bubble domains exist, the bottom drive layer being comprised of contiguous propagation elements defining a generally undulating edge along which the magnetic bubble domains move. This layer can be comprised of permalloy contiguous disks, diamonds, etc.
    Type: Grant
    Filed: July 18, 1979
    Date of Patent: August 11, 1981
    Assignee: International Business Machines Corporation
    Inventor: Mitchell S. Cohen
  • Patent number: 4283771
    Abstract: A bubble domain chip is designed to provide the components necessary to perform all essential data-base functions. Many cross-linked loops in parallel allow the interchange of distinct columns of information. The use of an on-chip decoder achieves effective interchangeability of distinct rows of information. Thus, the basic storage structure and access modes conform to the high-level view of data implied by the relational data model, resulting in simpler programming. In addition, a plurality of comparators are provided to the plurality of storage loops to perform context search simultaneously on all the loops. The simultaneous search and the restriction to output of only qualified data greatly reduces the query time.
    Type: Grant
    Filed: July 31, 1978
    Date of Patent: August 11, 1981
    Assignee: International Business Machines Corporation
    Inventor: Hsu Chang
  • Patent number: 4272348
    Abstract: A single level masking process for producing microelectronic structures, such as magnetic bubble domain devices, which require very fine line widths. This is a subtractive dry process using a very thin, additively plated mask in order to obtain optimum lithographic resolution. Use of the very thin plated mask eliminates the need for a thick resist layer which would adversely affect resolution. In one example, a double layer metallurgy comprising a conductor layer (such as Au) and an overlying magnetically soft layer (such as NiFe) is patterned using a thin Ti (or Cr) mask. The Ti mask is subtractively patterned using a NiFe mask which is itself patterned by electroplating through a thin resist layer. The double layer NiFe/Au structure is patterned to provide devices having high aspect ratio, good pattern acuity, and uniform thicknesses, where the minimum feature is 1 micron or less.
    Type: Grant
    Filed: November 20, 1978
    Date of Patent: June 9, 1981
    Assignee: International Business Machines Corporation
    Inventors: Daniel E. Cox, Susan M. Kane, John V. Powers
  • Patent number: 4271485
    Abstract: A magnetic bubble domain storage device comprising a plurality of storage shift registers and at least one major shift register, which serves to provide bubble domains to the storage register and to receive bubble domains from the storage registers. A novel transfer switch, or gate, is located between each of the storage registers and the major register, which is typically configured in the conventional major/minor loop type of storage organization. This transfer switch can be made using single level masking or multiple level masking and is characterized in that the locus of bubble domain propagation paths through the switch element generally defines the letter "Y". These propagation paths are from one arm of the Y to the other arm, from one arm of the Y to the stem or base portion, or the reverse where a bubble domain travels from the stem (base) of the Y to one of the arms of the Y.
    Type: Grant
    Filed: August 28, 1978
    Date of Patent: June 2, 1981
    Assignee: International Business Machines Corporation
    Inventors: George S. Almasi, Wilhelm E. Bogholtz, George E. Keefe
  • Patent number: 4263662
    Abstract: Guard rails are described for particular use with magnetic bubble domain chips using contiguous propagation elements. These guard rails generally surround the active device area (storage area) of the chip and are used to move stray bubble domains from the storage area to the edge of the chip, or to a collapser etc., and also to prevent stray bubbles from entering the active device area. These guard rail structures are comprised of contiguous propagation elements characterized by an undulating edge and a smooth edge, both of which generally move bubble domains away from the active device area in response to the reorientation of the same magnetic drive field. In one embodiment, the guard rail is a spiral structure surrounding the active device area, having one end in the interior of the magnetic bubble chip adjacent to the active device area, and another end near the edge of the chip, or near a bubble annihilator, etc.
    Type: Grant
    Filed: December 28, 1979
    Date of Patent: April 21, 1981
    Assignee: International Business Machines Corporation
    Inventors: George E. Keefe, Emerson W. Pugh
  • Patent number: 4247912
    Abstract: In magnetic bubble domain chips using layers of crystalline material having in-plane magnetization for propagation, hard bubble suppression, etc., asymmetric propagation often results due to crystalline anisotropies in the layer of in-plane magnetization. In these chips, different propagation margins result for propagation in different directions with respect to the crystalline axes of the in-plane layer. In the present magnetic chip, a plurality of shift registers is provided for movement of bubble domains in a plurality of directions, all of which provide good propagation margins. The registers are aligned in particular directions with respect to the directions of easy stripout of bubble domains in order to avoid the problem of asymmetric propagation. Examples are shown using ion implanted contiguous element propagation patterns organized in a major/minor loop type of storage organization.
    Type: Grant
    Filed: November 13, 1978
    Date of Patent: January 27, 1981
    Assignee: International Business Machines Corporation
    Inventors: Clifton D. Cullum, Jr., George E. Keefe, Mark H. Kryder, Yeong-Show Lin