Abstract: A stencil mask (10) has a membrane (14) under tensile stress and at least one pattern opening (22) formed through the membrane (14). A plurality of stress relief openings (30) are formed in the membrane for reducing stress-induced distortion of the membrane and the mask pattern. The stress relief openings (30) are positioned to relieve concentrations of stress within the membrane (14) such as those resulting from non-regularities within the pattern. In one embodiment, a screening material (56), less rigid than the membrane (14), is contained within the stress relief openings (30).

Abstract: A timing and control circuit and method for a synchronous vector processor (SVP) device having a plurality of one-bit processor elements organized in a linear array. This circuit includes a master controller circuit, a vertical timing generator circuit, a constant generator circuit, a horizontal timing generator circuit and an instruction generator circuit.

Abstract: A method for causing a micromechanical spatial light modulator to display data for a period less than its settling time. The modulator elements receive a first pulse (40) that causes them to release from their previous state, a bias voltage is removed and reapplied, allowing the elements to move to the unaddressed state, and then the elements receive a second pulse (46). After receiving a second pulse, the elements assume an unaddressed state. In one embodiment, new address data is loaded during this unaddressed state, after which a bias is reapplied causing them to achieve the state corresponding to the new state. In another embodiment, the previous addresses are cleared during the unaddressed state, forcing the elements into an OFF state. In either embodiment, a reset pulse may be applied after either the load or clear step.

Abstract: An elongated optic (12) is supported within a cylindrical housing (18) by a pair of support rods (14) passing through the cylindrical housing (18). A resilient retention spring (16) diametrically opposed to each support rod (14) presses the elongated optic (12) against the support rod (14) to prevent movement by the elongated optic (12) while allowing the elongated optic (12) to expand and contract. Contact between the support rods (14) and the resilient retention spring (16) is minimized to prevent inhibiting the internal reflectivity of the elongated optic.

Abstract: A multi-processing system includes a plurality of memories and a plurality of processors. Each of the memories has a unique addressable memory portion of a single memory address space. Each processors has a predetermined plurality of corresponding memories. These corresponding memories have a corresponding base address within said single memory address space The processors generate addresses for read/write access to data stored within said plurality of memories in accordance with received instructions. A switch matrix connected to the memories and the processors responds to an address generated by a processor to selectively route data between that processor and a memories whose unique addressable memory portion encompasses that address. A base address instruction executing on any one of the processors generates the base address corresponding to that processor.

Abstract: A double precision rounding unit is employed for both single and double precision rounding. Rounding double precision mantissas employs the double precision rounding unit normally. For rounding single precision mantissas, the single precision mantissa is both left and right justified at the inputs of the double precision rounding unit. The N bits of the single precision number are supplied to a set of N least significant bit inputs of the double precision rounding unit. The N bits of the single precision number are also supplied to a set N of most significant bit inputs of the double precision rounding unit. The central M bits, which are between the set of N least significant bit inputs and the set of N most significant bit inputs are supplied with zeros. The double precision rounding unit is operated normally with the single precision input. A single precision/double precision masking unit at the output of the double precision rounding unit selects the proper bits.

Abstract: A memory interface unit for coupling a microprocessor to a memory external to the microprocessor, the memory being utilized for the storage of data therein and the retrieval of data therefrom, and the memory being provided in one or more memory banks, each of the banks being provided with a set of address lines and a byte enable line, data being transferring to and from each of the memory banks on a group of data lines, and the memory banks being provided in one or more banks whereby the group or groups of data lines, as the case may be, provide a memory data path having a physical transfer width for transfer of data to and from the memory, and the data being stored and retrieved over the memory data path in two or more data types, each type having a different size, the memory interface unit being provided with a set of address pins and a set of strobe pins, comprising. The unit includes a first element for providing an indication of a physical transfer width of a memory coupled to the memory interface unit.

Abstract: A method and structure is given for flip-chip mounting an integrated circuit on a substrate. An embodiment of the present invention is a GaAs die flip-chip 14 mounted to a silicon semiconductor 10 which has additional processing circuitry. The flip-chip bond uses an alloy metal film, preferably a thin film of AuGe 38, 40. The invention gives a high temperature bond which is suitable for subsequent high temperature processes to be performed on the flip-chip mounted combination. The bond may also include a diffusion barrier 36 which provides a short circuit free LED contact. A preferred embodiment introduces a microchip chemical sensor by integrating a GaAs LED 14 with a polyimide waveguide 56 and a silicon photosensor 16 on the same chip.

Abstract: The present invention provides a method of ameliorating the effects of misalignment between modulator arrays, and a system using the same. The individual arrays are positioned such that a portion of the image produced by the arrays is generated by both arrays. The contribution to the combined output made by each array varies across the overlapped region, with each array making a small contribution to the pixels in the overlapped region at one end and a large contribution to pixels in the overlapped region at the other end. Because the overlapping portions of the modulator arrays collectively form a portion of the image, any alignment error is effectively spread over the entire overlapped region and is much less noticeable.

Abstract: A data processing system including a data-memory storing data words having a first data size, and a data processor having an address generator generating addresses pointing to data of a second data size smaller than the first data size. The data processing system enables a data transfer by supplying an address to the data memory with zeros substituted for a predetermined number of least significant bits. The data processor receives a data word of the first data size corresponding to the altered address. The data processor stores data of a selected processor data size into a selected data register. If the processor data size is smaller than the first data size, then the date register stores a selected a subset of bits of the data word dependent upon the processor data size and the predetermined number of least significant address bits of said address.

Abstract: In one form of the invention, a method for the growth of an epitaxial insulator-metal structure on a semiconductor surface comprising the steps of maintaining the semiconductor surface at a pressure below approximately 1.times.10.sup.-7 mbar, maintaining the semiconductor surface at a substantially fixed first temperature between approximately 25.degree. C. and 400.degree. C., depositing an epitaxial metal layer on the semiconductor surface, adjusting the semiconductor surface to a substantially fixed second temperature between approximately 25.degree. C. and 200.degree. C., starting a deposition of epitaxial CaF.sub.2 on the first metal layer, ramping the second temperature to a third substantially fixed temperature between 200.degree. C. and 500.degree. C. over a time period, maintaining the third temperature until the epitaxial CaF.sub.2 has deposited to a desired thickness, and stopping the deposition of epitaxial CaF.sub.2 on the first metal layer.Other devices, systems and methods are also disclosed.

Abstract: A method for designing and operating a multi-processor computer system, in which data required for performing a task is determined by a first processor and then downloaded to a second processor that will execute the task. The data is associated with regions whose uses are expected by the second processor but whose actual contents are determined by the first processor. The method accommodates mutually exclusive access by both processors to memory of the second processor, while providing all data required for the task in a single read operation.

Abstract: A system (100) for computer power management for a computer (102) having a clock (706), includes a plurality of sampling circuits (2360, 2350, 4630, 4720, 4810, 3400, 5300, 5400) responsive to different system activity levels and producing system activity signals representative of the system activity levels. More circuitry (120, 106, 4640) is responsive to the system activity signals and supplies weighted activity output signals adjustably weighting the system activity levels. Filter circuitry (702, 4680) continually responds to the weighted activity output signals to produce a series of duty cycle-related control signals (TONTOFF) representative of directions to pulse-width modulate (MASKCLK) the clock of the computer with such duty cycle. Other devices, systems and methods are also disclosed.

Abstract: This invention pertains generally to aging methods suited to aerogel thin film fabrication, and particularly to techniques for improving gel strength and/or aerogel dielectric constant by a rapid aging technique, which avoid damage or premature drying of wet gel thin films during aging. A substrate having a wet gel thin film deposited thereon is contacted with a saturated water vapor atmosphere, preferably at an elevated pressure and a temperature greater than 100.degree. C. The method may comprise a vapor-phase exchange step to remove low boiling point pore liquids such as ethanol prior to or during aging. The method may also comprise a vapor-phase exchange step to replace water in the wet gel with another pore liquid such as acetone to stop the aging process and prepare the wet gel for drying. A vapor-phase aging catalyst (e.g. ammonia) may also be used to enhance the aging process.

Abstract: A microprocessor device (102) includes a central processing unit (702) having a clock input, a clock generator (OSC, PLL) of clock pulses, a logic circuit (708) having an output to supply a clock control signal (SUSP), and a clock gate (3610) fed by the clock pulses and having a clock gate output (CPU.sub.-- CLK) coupled to the clock input of the central processing unit. The clock gate (3610) responds to the clock control signal (SUSP) to prevent said clock pulses (CPU.sub.-- CLK) from reaching the central processing unit within one clock cycle of a change in said clock control signal. Other devices, systems and methods are also disclosed.

Abstract: An integrated liquid crystal display and backlight system for generating video images for a portable computer (12) comprising a top glass (32), a bottom glass (34) and a thin film transistor and liquid crystal layer (36) disposed therebetween, a diffuser (38) bonded to the bottom glass (34) on the side opposite the top glass (32), a substrate (40) bonded to the diffuser (38) opposite the bottom glass (34) having an array of semispherical cavities (42) each having an aluminized surface (44), a phosphor layer (46) coating the aluminized surfaces (44), an array of indium tin oxide conductors (48) electrically connected to the aluminized surfaces (44) and disposed within the cavities (42), and a volume of mercury gas (50) filling the cavities (42) such that when a voltage (54) is established between the aluminized surfaces (44) and the indium tin oxide conductors (48), the phosphor (46) becomes excited and produces backlight for the liquid crystal display system (26).

Abstract: A system 10 for independently illuminating a plurality of areas on an object 26 such as a printer drum is disclosed herein. The system 10 includes a light source 12 such as an LED or a plurality of LEDs. A spatial light modulator 14, which may be a movable mirror device, for receives light from the light source 12 and reflects selected portions of the light. The spatial light modulator 14 includes at least n rows of independently modulated pixels wherein a mask prevents more than 1/nth of each the rows from receiving and reflecting light at any point in time. The light from the spatial light modulator 14 is imaged (e.g., with imaging lens 24) onto rows and columns of the object 26 to be illuminated. The object 26 is illuminated in a way that each column is illuminated by a corresponding row of pixels.

Abstract: A method of pulse width modulation using a spatial light modulator (40) with a finite transition time. The method uses m bits per sample to digitize the incoming data, but apportions the LSB times for pulse width modulation based upon m-1 bits. The current video frame displays all of the bits for each sample, except for the LSBs for each sample. The next video frame displays all of the bits for each sample, adding one more LSB for dividing up the frame time. The first frame could use either the additional LSB time and display no data, or it could use only that number of LSB times it needs. In the latter, the system will have to adjust to different partitions of the frame time for alternating frames. The system includes a spatial light modulator (40), a memory (42), a formatter (48), a sequence controller (44) and a toggle circuit (46), to perform this method.

Abstract: A method is described for controlling a plurality of nonuniformity parameters in processing discrete products such as semiconductor wafers through a module consisting of several individual processes using site models. The method uses a controlled process to compensate for a subsequent uncontrolled process, which allows process goals of one process to be optimized to enhance the output of a subsequent process of the same module.

Abstract: A two-color infrared detector (50) is provided comprising elements (10, 110, or 210) having one or more diodes (58, 158 and 168) and a metal insulator semiconductor ("MIS") device (56 and 156). The infrared detector (50) may be referred to as a vertically integrated capacitor diode. The diodes comprise regions (12, 14, 16, 112, 114, and 116) of semiconductor materials which are operable to generate electron-hole pairs when struck by infrared radiation (40) having first and second wavelengths. The capacitor (156) includes a gate (24) provided by the MIS device which is operable to generate a potential well in the first semiconductor region (12 and 112) in conjunction with an insulator layer (22) and collect charges generated by the first wavelength of infrared radiation (40). The layers of semiconductor material may be varied to enhance the performance of the resulting infrared detector.