Patents Represented by Attorney John A. Fisher
  • Patent number: 4590024
    Abstract: An improved process is disclosed for the deposition in a reactor vessel of silicon on the interior walls of the reactor vessel and for the subsequent separation of the silicon from those walls. The reactor vessel has a generally rectangular cross section and is formed of a refractory material from which the deposited silicon separates by thermal expansion shear separation during cool down of the vessel and the deposited silicon. To improve the output of the deposition system, a plurality of partitions are provided in the reactor vessel and integral with the reactor walls. These partitions act as additional deposition surfaces, increasing the number of silicon sheets deposited as well as increasing the efficiency of the chemical reaction.
    Type: Grant
    Filed: March 29, 1984
    Date of Patent: May 20, 1986
    Assignee: Solavolt International
    Inventors: Israel A. Lesk, M. John Rice, Jr., Kalluri R. Sarma
  • Patent number: 4570328
    Abstract: An MOS device having a gate electrode and interconnect of titanium nitride and especially titanium nitride which is formed by low pressure chemical vapor deposition. In a more specific embodiment the titanium nitride gate electrode and interconnect have a silicon layer thereover to improve oxidation protection.
    Type: Grant
    Filed: March 7, 1983
    Date of Patent: February 18, 1986
    Assignee: Motorola, Inc.
    Inventors: J. B. Price, Philip J. Tobin, Fabio Pintchovski, Christian A. Seelbach
  • Patent number: 4560244
    Abstract: An apparatus and method for redirecting an incident beam makes use of a wobble plate to precess the normal to the mirror surface about a predetermined axis coupled with a rotational movement about the axis of the wobble plate to provide the second degree of freedom needed to place the reflected beam exactly on target.
    Type: Grant
    Filed: June 25, 1984
    Date of Patent: December 24, 1985
    Assignee: Solavolt International
    Inventor: Charles B. Ackerman
  • Patent number: 4557795
    Abstract: A melt recharge method is disclosed which uses a self-actuated charge container open at one end except for deformable support members which are positioned to support the charge material. The support members are formed of a material which has sufficient rigidity at room temperature to support the charge material but which when heated above its annealing temperature loses its rigidity and can no longer support the charge material which therefore falls into the existing melt. Upon cooling, the support members regain their rigidity and can be reformed for reuse.
    Type: Grant
    Filed: November 15, 1982
    Date of Patent: December 10, 1985
    Assignee: Motorola, Inc.
    Inventors: Robert W. Helda, deceased, by Cynthia Halextine, personal representative, H. Ming Liaw
  • Patent number: 4555303
    Abstract: A process is disclosed for removing carbonaceous material from a surface in a high pressure oxygen plasma. A surface, such as a surface of a silicon ribbon, having a layer of carbonaceous material thereon is positioned in a high pressure plasma reaction volume. A high pressure rf plasma is generated in which the plasma includes reactive and ionic oxygen species. The reactive oxygen species are directed to and react with the layer of carbonaceous material to oxidize that material. The reaction products of the oxidation step include carbon dioxide and, possibly a non-oxidizing ash material which can easily be removed from the silicon surface.
    Type: Grant
    Filed: October 2, 1984
    Date of Patent: November 26, 1985
    Assignee: Motorola, Inc.
    Inventors: Ronald Legge, M. John Rice, Jr., Kalluri R. Sarma
  • Patent number: 4548654
    Abstract: A process is disclosed for preparing silicon wafers having a high quality, high lifetime surface layer and a bulk region characterized by a low lifetime and by a high density of precipitated oxygen gettering sites. A wafer having a relatively high concentration of interstitial oxygen is heated in a reducing ambient at a sufficiently high temperature and a sufficiently long time to cause a surface layer to be denuded of oxygen related defects and dislocations. The temperature is then ramped down to a lower temperature and the wafer is maintained at this lower temperature for a sufficient time to allow precipitation of oxygen within the bulk of the wafer.
    Type: Grant
    Filed: June 3, 1983
    Date of Patent: October 22, 1985
    Assignee: Motorola, Inc.
    Inventor: Philip J. Tobin
  • Patent number: 4547256
    Abstract: Apparatus and method are provided for thermally treating a semiconductor substrate. According to the method, the substrate is isothermally heated to an elevated temperature near the thermal treatment temperature and then is further heated to a higher temperature at which the thermal treatment occurs. Following the thermal treatment the substrate is isothermally cooled to a sufficiently low temperature to avoid thermally induced defects.
    Type: Grant
    Filed: December 20, 1982
    Date of Patent: October 15, 1985
    Assignee: Motorola, Inc.
    Inventors: Richard W. Gurtler, Ronald N. Legge, Israel A. Lesk
  • Patent number: 4545849
    Abstract: An improved process is disclosed for controlling the oxygen content of a Czochralski grown silicon crystal pulled from a silicon melt contained in a silica crucible. High, uniform oxygen concentrations are achieved by attaching an additional piece of silica to the inside of the crucible bottom. Preferably the additional silica is formed from a silica rod bent to a toroid shape. The toroid has about the diameter of the crystal being pulled and is located substantially coaxial with the growing crystal.
    Type: Grant
    Filed: March 3, 1983
    Date of Patent: October 8, 1985
    Assignee: Motorola Inc.
    Inventor: F. Secco d'Aragona
  • Patent number: 4546374
    Abstract: A semiconductor device including a metallurgically compatible unplated package is provided. The package includes a plateless copper alloy die mount area to which a semiconductor die is attached. The semiconductor die is metallized on its mounting surface to provide electrical contact. A metallic solder which is compatible with both the copper alloy and the die metallization joins the die to the die mount area. The package further includes a plateless copper alloy lead portion which is physically joined to the die mount area. The top surface of the semiconductor die is provided with a patterned metallization making electrical contact to selected portions of the die. Electrical contact is made between the top surface die metallization and the lead portion of the package by ultrasonically bonded copper ribbon. The die and interconnecting ribbon is then enclosed by an epoxy encapsulant or by a welded metal cover.
    Type: Grant
    Filed: May 18, 1984
    Date of Patent: October 8, 1985
    Assignee: Motorola Inc.
    Inventors: Dennis R. Olsen, Keith G. Spanjer
  • Patent number: 4544876
    Abstract: A voltage regulator is disclosed for regulating the voltage supplied by an energy source such as a photovoltaic array. The regulator includes a thermally activated switch which is coupled in series between the regulator input and output. A control circuit monitors the voltage supplied to a load and generates a control signal which is responsive to the measured to the load voltage. A heater, responsive to the control voltage, is positioned near the thermally activated switch and causes the switch to open when the sensed voltage rises above a prescribed limit. Hysteresis in the voltage regulator is provided by thermal insulation which retards the dissipation of heat from the vicinity of the switch causing the switch to remain open.
    Type: Grant
    Filed: December 16, 1983
    Date of Patent: October 1, 1985
    Assignee: Solavolt International
    Inventors: William L. Bailey, William J. Kaszeta
  • Patent number: 4542004
    Abstract: An improved process is disclosed for the high pressure plasma hydrogenation of silicon tetrachloride. Hydrogen and silicon tetrachloride are reacted in the presence of a high pressure plasma and further in the presence of a boron catalyst to form trichlorosilane and dichlorosilane. By adding the boron catalyst the overall conversion efficiency is increased and the dichlorosilane content in the reaction effluent is increased.
    Type: Grant
    Filed: March 28, 1984
    Date of Patent: September 17, 1985
    Assignee: Solavolt International
    Inventors: Kalluri R. Sarma, Charles S. Chanley
  • Patent number: 4529860
    Abstract: A method is provided for anisotropically etching organic material to reduce mask undercutting. The layer of organic material to be patterned, with an overlying patterning mask is provided on a substrate. The substrate with the layer of organic material on it is placed on the powered electrode within a plasma reactor. A hydrogen plasma is generated in the reactor at a pressure between about 13.3 Pa and about 53 Pa. The organic layer which is not protected by the etch mask is etched by the hydrogen plasma. At these pressures the organic layer is removed by a process of ion assisted etching in which the hydrogen plasma chemically reacts with the organic material and the reaction is enhanced by ionic bombardment of the plasma species. Because the substrate and the organic material are placed on the powered electrode, the plasma ions impact the surface of the organic layer in a direction substantially perpendicular to the surface of the layer thus providing anisotropy to the etch.
    Type: Grant
    Filed: August 2, 1982
    Date of Patent: July 16, 1985
    Assignee: Motorola, Inc.
    Inventor: Francine Y. Robb
  • Patent number: 4526769
    Abstract: A process for producing trichlorosilane and equipment for practicing that process are disclosed. The process is a two stage process which combines the reaction of silicon tetrachloride and hydrogen with silicon with the reaction of hydrogen chloride with silicon. In one embodiment of the invention a two stage reactor is provided with a first stage heated to a temperature of about 500.degree.-700.degree. C. and a second stage maintained at a temperature of about 300.degree.-350.degree. C. Each of the first and second stages of the reactor are charged with silicon particles. A mixture comprising hydrogen and silicon tetrachloride are flowed through the silicon particles in the heated first stage to cause a partial hydrogenation of the silicon tetrachloride. The effluent from the first stage includes trichlorosilane and unreacted hydrogen and silicon tetrachloride. Hydrogen chloride is added to this effluent and the mixture of gases are passed through the silicon particles in the second stage of the reactor.
    Type: Grant
    Filed: July 18, 1983
    Date of Patent: July 2, 1985
    Assignee: Motorola, Inc.
    Inventors: William M. Ingle, Marilyn S. Peffley, H. S. Nagaraja Setty
  • Patent number: 4523976
    Abstract: A method is disclosed for forming openings in polyimide layers and for thereby forming semiconductor devices. The method allows for the forming of openings having tapered side walls and precise dimensional control. First and second layers of polyimide are sequentially formed on a surface. The first layer, in contact with the surface, is fully cured while the second layer is only partially cured. Overlying the second layer is a masking layer which can alternatively be an inorganic material or a resist material. A pattern is formed in the masking layer to expose portions of the upper polyimide layer. The pattern includes openings of predetermined size having a precise critical dimension. Using the patterned masking layer as an etch mask the upper layer of polyimide is isotropically etched in an etchent which etches the partially cured polyimide but which does not etch the fully cured underlying polyimide.
    Type: Grant
    Filed: July 2, 1984
    Date of Patent: June 18, 1985
    Assignee: Motorola, Inc.
    Inventor: Yefim Bukhman
  • Patent number: 4523372
    Abstract: A process is disclosed for fabricating semiconductor devices, and especially for fabricating semiconductor devices having multiple levels of metallization separated by polyimide or other organic materials. The process avoids the sputter etching and redeposition of the lower metal layer during reactive ion etching of openings through the organic layer. Sequential layers overlying the first layer of metallization include a layer of oxide, a layer of organic material, and a second layer of oxide. The second layer of oxide functions as a hard mask for patterning the organic material. The first layer of oxide acts as an etch stop and protective layer to prevent attack of the underlying metal during reactive ion etching of the organic layer. The first layer of oxide is of limited areal extent to avoid subsequent problems with the organic layer.
    Type: Grant
    Filed: May 7, 1984
    Date of Patent: June 18, 1985
    Assignee: Motorola, Inc.
    Inventors: Raymond J. Balda, Yefim Bukhman, Willis R. Goodner
  • Patent number: 4521441
    Abstract: A process is disclosed for doping a semiconductor substrate which achieves a lower sheet resistivity than is otherwise obtainable. A spin-on dopant material is applied to the surface of the semiconductor substrate and subsequently heated to drive off solvents contained in the dopant material. The layer of spin-on dopant material is then plasma treated, preferably in an oxygen plasma, to enhance the diffusion properties of the spin-on material. The substrate and dopant material are then heated to an elevated temperature to accomplish the desired depth of diffusion.
    Type: Grant
    Filed: December 19, 1983
    Date of Patent: June 4, 1985
    Assignee: Motorola, Inc.
    Inventor: Dervin L. Flowers
  • Patent number: 4514489
    Abstract: An improved photolithography process is disclosed wherein photoresist masks are treated to reduce the sticking of photoresist to the mask. In many photolithography processes, a photoresist layer is exposed through a photoresist mask having an opaque patterned layer on a surface of the mask. To prevent adhesion of the photoresist to the mask surface when the mask and photoresist are brought into contact, the mask surface is first treated in a fluorine plasma.
    Type: Grant
    Filed: September 1, 1983
    Date of Patent: April 30, 1985
    Assignee: Motorola, Inc.
    Inventors: Carlos N. Garcia, Bryan C. Rigg, Sally A. Tanner
  • Patent number: 4510015
    Abstract: A method is provided for semiconductor ribbon-to-ribbon conversion in a rigid edge mode. A combination carrier and mask is provided by which the ribbon is secured during the conversion process. The carrier holds the ribbon and simultaneously masks the edges of the ribbon from the heating effects of an impinging energy beam. The energy beam, such as a laser or electron beam, impinges on the ribbon and creates a molten zone which extends through the thickness of the ribbon. During the growth process, the molten zone is caused to move along the length of the ribbon. The mask prevents melting of the extreme edge portions of the ribbon and thus allows a rapid growth rate and a stable molten zone without sophisticated electronic equipment to gate the energy beam at the ribbon edges.
    Type: Grant
    Filed: June 23, 1983
    Date of Patent: April 9, 1985
    Assignee: Motorola, Inc.
    Inventors: Ralph J. Ellis, Richard W. Gurtler, Kalluri R. Sarma
  • Patent number: 4503451
    Abstract: In a channel formed in one surface of a semiconductor substrate having a first conductivity, e.g. N type, a layer of material having a second conductivity type, e.g. P type boron, and a layer of relatively low resistance material such as Tungsten in contact with the first layer but insulated from the substrate. Second conductivity type tubs and the like can be formed adjacent the bus and in direct contact therewith through the first layer.
    Type: Grant
    Filed: July 30, 1982
    Date of Patent: March 5, 1985
    Assignee: Motorola, Inc.
    Inventors: Clarence A. Lund, Michael D. Sugino
  • Patent number: 4497890
    Abstract: A process is disclosed for improving the adhesion of a polymeric resist to a gold metallization surface. The process includes the use of a chelating silane as an adhesion promoter between the resist and the gold metallization surface. The improved resist adhesion to the gold metallization surface is attributed to a complexation or chemisorption mechanism. The adhesion promoters of interest contain moieties capable of acting as chelating or chemisorption sites on the molecular silane, thus creating layer-to-layer bonding with greater strength than that observed where just Van der Waals interactions occur to the gold surface atoms.
    Type: Grant
    Filed: April 8, 1983
    Date of Patent: February 5, 1985
    Assignee: Motorola, Inc.
    Inventor: John N. Helbert