Abstract: An output circuit for outputting a voltage signal to a circuit working with a power supply of a voltage higher than that under which the output circuits works, having an advantage that the voltage signal quickly increases to the potential level of the power supply of the output circuit, an input circuit for receiving a voltage signal from a circuit working with a power supply of a voltage higher than that under which the output circuits works and for forwarding the voltage signal to a circuit working with a power supply of a voltage identical to that under which the input circuit works, having an advantage that the potential level of the forwarded signal is the voltage of the power supply of the input circuit and the an input/output circuit having the foregoing both advantages.

Abstract: A method for controlling emergency states of equipment in a semiconductor fabrication system includes determining whether on-line communication has been restored between a host computer and semiconductor fabrication equipment after an interruption in communication. If on-line communication has been restored, post-restoration emergency state data are received automatically from the equipment. Then it is determined whether the post-restoration emergency state data indicate the equipment is in a warning state. If the post-restoration emergency state data indicate the warning state, it is determined whether the warning state is a critical state. If the warning state is the critical state, a key value of a variable ID corresponding to the equipment is changed to a value indicative of shutting down the equipment. Then the equipment is shut down by inserting the variable ID into an equipment control message and downloading the equipment control message to the equipment.

Abstract: In a method, first and second circuit elements are provided on a surface of a semiconductor substrate; and a hole is formed in the semiconductor substrate between the first and second circuit elements. Then, the semiconductor substrate is divided at the hole to separate the first and second circuit elements from each other.

Abstract: A method for cleaning the inside of a chamber using a radio frequency (RF) plasma, in which all parts within the camber can be completely cleaned. In the cleaning method, the conditions inside the chamber are stabilized. Then, impurities are cleaned from the inside of the chamber using the RF plasma, while varying the pressure in the chamber continuously or in discrete steps.

Abstract: A method for controlling semiconductor fabrication equipment prevents an operator from accidently operating a piece of equipment which is in an interlocked state, since a host computer automatically stores information on any interlocked piece of equipment, and rechecks that information before allowing any product to be introduced into a piece of equipment. Optimal process conditions for each process are registered in the host computer. The registered optimal process condition is compared with process data reported from each piece of equipment. If it is determined that the reported data are in the range of the optimal process conditions in view of the comparison, it is then determined whether or not the reported data also satisfy a specific rule registered in the host computer. If it is determined that the reported data satisfy the specific rule, the process continues.

Abstract: An apparatus for opening/closing a process chamber door of an oven for manufacturing a semiconductor device includes a boss formed at one side of an opening of the process chamber, a shaft which passes freely through the center of the boss, bearings attached to the process chamber and rotatably supporting the ends of the shaft, a driver for rotating the shaft in opposite directions over a predetermined angle, and a door that seals the opening, one side of the door being attached to the shaft so as to be moved when the shaft rotates. Alternatively, the present invention provides a pair of bearings disposed beside one side of an opening of the process chamber, a shaft whose ends are rotatably supported by the bearings, a bracket having one end fixed to the shaft, and another end fixed to the door. A driver also rotates the shaft over a predetermined angle that opens and closes the door.

Abstract: A diffusion system for manufacturing semiconductor devices has an air curtain formed across a furnace opening for preventing the loss of heat energy from inside the furnace. The diffusion system includes the furnace having an opening through which a wafer boat having a plurality of wafers is loaded/unloaded; an air curtain apparatus for spraying a gas across the opening so as to form an air curtain cutting off the atmosphere inside of the furnace from the outside environment; and a controlling unit for controlling the air curtain apparatus by applying on/off signals to the air curtain apparatus. The diffusion system is controlled by the controlling unit so as to form the air curtain at the opening of the furnace while the wafer boat moves in and out of the furnace. After the wafer boat is completely loaded into the furnace, the air curtain is removed.

Abstract: A method for dividing a semiconductor wafer which is covered by an opaque resin in a dicing process includes forming marks on the semiconductor wafer, wherein the marks are distinguished from electrodes which are formed on the semiconductor wafer. According to the method, in a dicing process, separating semiconductor chips from the semiconductor wafer can be precisely achieved.

Abstract: A semiconductor device includes an internal source voltage generating circuit (debooster circuit) provided between an external source voltage EVCC and a ground voltage VSS and for generating an internal source voltage IVCC necessary to drive each of internal circuits in the semiconductor device, a booster circuit provided between the internal source voltage IVCC and the ground voltage VSS, for generating a boosted voltage VBST higher than the internal source voltage IVCC, and a capacitor provided between the boosted voltage VBST and the ground voltage, for stabilizing the boosted voltage VBST. The capacitor comprises a P type semiconductor substrate to which the ground voltage is applied, and an N type well region having therein a P type well region with a memory cell formed therein and to which the internal source voltage IVCC is applied.

Abstract: A memory device includes first, second, and third discharging units, which are connected to a negative voltage node, for discharging the negative voltage to a ground voltage through three steps which are sequentially conductive. The first discharging unit discharges the negative voltage in response to a first signal and a second signal. It does so when the negative voltage is a first voltage level. The second discharging unit discharges the negative voltage in response to the second signal and a third signal. It does so when the negative voltage is a second voltage level. The third discharging unit discharges the negative voltage in response to a fourth signal and a fifth signal. It does so when the negative voltage is a third voltage level.

Abstract: A semiconductor package includes a semiconductor chip having a major surface and first pads formed on the major surface. The semiconductor package also includes a package substrate having (a) opposite first and second major surfaces, (b) a side surface extending between the first and second major surfaces, (c) a pad forming region adjacent to and along the side surface, (d) second pads formed on the pad forming region, (e) external electrodes formed on the first major surface of the package substrate, wherein the second major surface of the package substrate is fixed to the major surface of the semiconductor chip, and wherein the external electrodes are electrically connected to the second pads. The semiconductor package further includes bonding wires electrically connecting the first pads to the second pads and a sealing material covering the bonding wires and first and second pads.

Abstract: A pellicle is mounted onto a mask that express a wafer, by pressing the pellicle to the mask using a mounting system. The pellicle includes a pellicle membrane, and a pellicle frame including a first portion on which the pellicle membrane is attched and a second portion by which the pellicle mounting system establishes contact therewith. A distance between a surface of the first portion and the surface of the mask may be equivalent to a distance between a surface of the second portion and the surface of the mask. The second portion may have a mechanism for prevention the pellicle mounting system from slipping thereon in a direction parallel to the surface of the mask. The pellicle frame may include a contact portion that has an inclined surface that guides the pellicle mounting system to be in contact with the pellicle frame.

Abstract: The compounds are of a class of photosensitive polymers for use in chemically amplified photoresists. These photoresists produce sharp line patterns when exposed with an ArF excimer laser. The polymer composition includes a copolymer and the photoresist composition includes a terpolymer with a photo acid generator. The resulting chemically amplified photoresist compositions have strong resistance to dry etching, possess excellent adhesion to film material, and are capable of being developed using conventional developers.

Abstract: In a semiconductor memory, memory banks each having memory cells are arranged in X and Y directions. Each of the memory banks include a Y decoder for selecting Y-direction addresses of the memory cells and an X decoder for selecting X-direction addresses of the memory cells, predicated on a memory having memory banks operable independent from one another. Items of data specified by a specified number of continuous X addresses and having the same Y addresses are successively written into or read from the memory cells arranged in the X direction, which are specified by X addresses corresponding to 1+knth (where k=0, 1, 2, . . . ) in one of the banks. After all the data have been written into or read from the specified memory cells, the corresponding data are successively written into or read from the memory cells specified by X addresses corresponding to 2+knth in another one of the banks.

Abstract: A semiconductor device includes a semiconductor substrate with an active region, an oxide film that covers the active region of the semiconductor substrate, a first borophosphosilicate glass film that covers the oxide film, and a second borophosphosilicate glass film that covers the first insulating film. The first borophosphosilicate glass film has a boron concentration which is lower than that of the second borophosphosilicate glass film, and thus prevents out diffusion of phosphorus from the second borophosphosilicate glass film to the semiconductor substrate.

Abstract: A photo mask of a semiconductor device includes a transmission preventing layer formed of a molybdenum alloy, which is a solid solution of a metal atom such as chrome in molybdenum, on a light transmitting substrate. Also, the molybdenum alloy may be a molybdenum vanadium alloy, a molybdenum niobium alloy, a molybdenum tantalum alloy, or a molybdenum tungsten alloy, which is a solid solution of vanadium, niobium, tantalum, or tungsten in molybdenum, respectively. The photo mask provides high resolution during a photolithography process by obtaining a thinner transmission preventing layer.

Abstract: A semiconductor device e.g. a gate array, a mask ROM or the like produced by supplementing one or more upper-layer interconnections to units selected out of those previously produced in a half-finished semiconductor device, wherein the upper-layer interconnections are connected exclusively with the selected ones of the foregoing units and are isolated from the unselected ones of the foregoing units, by a space or an insulator layer produced between the upper-layer interconnection and a layer in which conductive paths are produced for connecting the upper-layer interconnection and the foregoing units.

Abstract: A semiconductor memory device for a package-state voltage test has a plurality of bonding pads that are electrically connected to an external device in a package state, at least one internal DC voltage generator, at least one switch connected between one of the bonding pads and the internal DC voltage generator. The switch is on during a test mode and is off during a normal mode. The switch controller is connected between at least two of the plurality of bonding pads and serves to control the switch in response to an external switching signal in the test mode. Because of this design, a number of DC voltage tests can be performed without increasing chip size since a general control pad also serves as a DC voltage test pad.

Abstract: A drive control circuit of a charged pump circuit has a power source voltage detecting circuit for detecting a power source voltage, a control circuit for changing the number of the drive steps of the charged pump circuit in accordance with the detected output of the power source voltage detecting circuit, and a by-pass circuit for allowing an output at the last step to be by-passed towards an output side of the drive steps in accordance with a change in the number of drive steps of the charged pump circuit.

Abstract: A method of manufacturing a barrier metal film of a semiconductor device includes, after a barrier metal film is annealed, performing an oxygen-annealing in-situ immediately after the annealing. By forming the barrier metal film in this way, an amorphous oxide film is formed only at a predetermined depth from the surface of the barrier metal film, so that a junction spike caused by the diffusion of interconnection material into the barrier metal film can be effectively prevented. This method of manufacturing may also be used when manufacturing an interconnection film of a semiconductor device.