Abstract: A semiconductor integrated circuit device, which is intended to prevent the characteristic degradation, includes multiple limiter circuits which are laid out by being scattered across a semiconductor substrate to produce an internal power voltage of a certain voltage level. Each limiter circuit is laid out so as to have its transistor formation area located just beneath the formation area of a bump electrode which puts in an externally supplied power voltage. The scattered layout of limiter circuits avoids the concentration of current to one limiter circuit and alleviates the harmful heat-up of the limiter circuits and their periphery. The shorter wiring length from the bump electrode to the transistor results in a smaller wiring resistance, alleviating the power voltage drop on the wiring.

Abstract: In a liquid crystal display device having a flexible printed circuit board which includes a laminated structure of a pair of flexible films, a plurality of first conductive layers interposed between inner surfaces of the flexible films to be spaced from each other, and a plurality of groups of terminals formed on an outer surface of one of flexible films opposite to the respective first conductive layers, and a liquid crystal display panel which includes a plurality of groups of wirings formed on one of a pair of substrates thereof and connected to the plurality of groups of terminals respectively, the present invention interposes second conductive layers at respective portions spacing the plurality of first conductive layers between the inner surfaces of the flexible films and prevents the one of the pair of substrates from being cracked when the plurality of terminals of the flexible printed circuit board are connected to the groups of wiring of the one of the substrates by compression bonding thereby.

Abstract: A spotting pin 10 capable of spotting equal amounts of a solution in a sequential manner comprises a first member 11 having a solution holding portion 13 formed at the tip thereof for holding a predetermined amount of solution, and a second member 12 having a solution supply portion 14 for holding the solution by a capillary action, the second member adapted to slide along the first member. As the solution supply portion 14 is brought into contact with the solution holding portion 13, the solution enters the solution holding portion 13 from the solution supply portion 14 by a capillary action. As the solution supply portion 14 and the solution holding portion 13 are separated from each other, a predetermined amount of the solution can be carried in the solution holding portion 13. Then, as the solution holding portion 13 is brought into contact with a water-absorbing support 21, a spot 22 of a predetermined amount of the solution can be formed thereon.

Abstract: In a semiconductor integrated circuit device, a circuit block has a first MOS transistor, and a leakage current control circuit having a second MOS transistor and a current source, a source and drain circuit of the second MOS transistor is formed between the power supply line of the circuit block and a voltage point where operating voltage is supplied. This current source is connected to the power supply line and in a first state, the power supply line is driven to a first voltage by the second MOS transistor. In a second state, the power supply line is controlled at a second voltage by current flow in the current source and, the voltage applied across the source and drain of the first MOS transistor in the second state is smaller than the voltage applied across the source and drain of the first MOS transistor in the first state.

Abstract: A nonvolatile semiconductor memory device configured by a select MOS transistor provided with a gate insulator film and a select gate electrode, as well as a memory MOS transistor provided with a capacitor insulator film comprising a lower potential barrier film, a charge trapping film, and an upper potential barrier film, as well as a memory gate electrode. The charge trapping film is formed with a silicon oxynitride film and the upper potential barrier film is omitted or its thickness is limited to 1 nm and under to prevent the Gm degradation to be caused by the silicon oxynitride film, thereby lowering the erasure gate voltage. The charge trapping film is formed with a silicon oxynitride film used as a main charge trapping film and a silicon nitride film formed on or beneath the silicon oxynitride film so as to form a potential barrier effective only for holes. And, a hot-hole erasing method is employed to lower the erasure voltage.

Abstract: In a liquid crystal display device comprising a substrate which has an organic material film (e.g. a leveling layer, or an alignment film) and a conductive oxide film (e.g. an electrode) covering at least a part of the organic material film both formed on an inner surface thereof facing a liquid crystal layer, the present invention provides the conductive oxide film formed at a temperature being neither higher than a thermal decomposition temperature of the organic material film nor lower than a heat deflection temperature of the organic material film, so as to prevent blebs from foaming from the organic material film and appearing in the liquid crystal layer even after a long term storage of the liquid crystal display device or even external force applied to the liquid crystal display device.

Abstract: The invention intends to provide a sensor module suitable for miniaturization and reduction in costs, in the radar sensor that uses a millimeter or sub-millimeter wave signal of which frequency is more than 20 GHz. To accomplish this problem, the radar sensor is integrated into a one chip MMIC, in which an active circuit including an oscillator and a mixer is formed with an antenna on one semiconductor substrate. Further, the MMIC is sealed with a resin package. A dielectric lens is formed on the resin package over the antenna to attain a desired beamwidth. Thereby, the lens and the resin package can integrally be formed by a metal mold, thus reducing the cost.

Abstract: Upon formation of semiconductor micro patterns, an interlayer alignment error occurs due to asymmetry of each alignment mark. Prior to alignment of a mask with a wafer, the asymmetry of each alignment mark is measured according to the principle of a scatterometry, and the alignment is performed in consideration of the result of measurement to execute exposure. Thus, high-accuracy alignment can be carried out without sacrificing throughput, and the performance of a semiconductor device is improved. Further, manufacturing yields can be enhanced and a reduction in cost can be realized.

Abstract: In the multiple access storage system, when there is a data access request designated by a data frame transmitted from a host computer to a storage blade SB#0 through a network for data, the data frame is transferred to SB#2 having possibility of presence of data corresponding to the data access request if the data is not found in SB#0. If the data is not found in SB#2 either and the number of transmission times of the data frame between SBs as counted in the data frame is not smaller than the threshold of the number of transmission times set as an equal value in each SB, SB#2 broadcasts the data frame to all SBs having possibility of presence of the data. If the number of transmission times is smaller than the threshold, SB#2 transfers the data frame to another SB having possibility of presence of the data.

Abstract: A main logical unit and a standby logical unit are defined by a process controller in a shared main memory multiprocessor, and an information storage space accessible from both logical units is provided. The main logical unit stores address information onto that information storage space by indicating a memory area it controls as the main memory area. When failover or cloning becomes necessary, the standby logical unit searches the information on the applicable address. Then from the applicable information, it also searches information on the main memory area controlled by the main logical unit to establish in itself and forms a processing environment and state identical to the main logical unit such that the standby logical unit takes over all or a portion of the processing of the main logical unit. This enables the construction of a server system of high operability to overcome failures and poor response times by failover and cloning, etc.

Abstract: By introducing the concept of negation into an association rule, the number of combinations of items, serving as candidates of the association rule containing negative items, becomes enormous for mining. The invention sorts out frequent itemsets to be included in an association rule in advance by ensuing its upper bound of confidence satisfying conditions of a confidence and a confidence increment input by an user. Also, by checking a logic product for each bit of a bit string reflecting the presence of each item in the itemset, the combinations of items as candidates are pruned. The pruning of unnecessary combinations is effectively carried out. The number of combinations of the items for compiling association rules is reduced.

Abstract: A first clamp circuit and a second clamp circuit stacked thereon in vertical respectively for clamping unwanted level voltages are provided between the high potential side power source and low potential side power source and an intermediate node formed by vertical stacking of the first clamp circuit and second clamp circuit is coupled with the power source for internal circuit. Since a capacitor originally provided in the internal circuit is allocated in parallel to the first clamp circuit, impedance is reduced due to existence of the capacitor and potential difference due to over-current flowing in the chip is reduced. Accordingly, potential difference due to over-current flowing into the chip may be reduced and static electricity dielectric strength can be improved by allowing higher over-current. Thereby, impedance when the clamp circuits are stacked in two stages.

Abstract: A ferromagnetic tunnel magnetoresistive film is associated with a high output and whose magnetoresistive ratio is less dependent on a bias voltage. In a three-terminal ferromagnetic tunnel magnetoresistive element, a decrease in an output is suppressed by a bias voltage applied to one of the tunnel junctions. By employing half-metallic ferromagnets in the element, the output can be enhanced and the dependency on the applied bias voltage can be reduced.

Abstract: Conventionally, in the wavelength locking optical system, the wavelength as detected is deviated from a targeted range owing to the change of the peripheral temperature resulting from the temperature characteristics of the wavelength error detection device. To solve this prior issue, it is arranged such that a portion of the wavelength error detection device, through which portion light-beams passes, contacts a material of high heat conductivity.

Abstract: A communication relay system is connected to a line switched mobile communication system adapted to accommodate therein mobile terminals through radio channels and a packet switched mobile communication system adapted to accommodate therein the mobile terminals through radio channels. When a connection request has been made to a portable terminal, the communication relay system judges whether the portable terminal of interest is connected either to the line switched mobile communication system or to the packet switched mobile communication system.

Abstract: Light-emitting elements can be accurately directly opposed to the entrance surface of a light guide at an accurate distance therefrom, and can be mounted on a single side of a printed circuit board together with other electronic components, whereby the number of manufacturing steps and the thickness of a liquid crystal display device can be reduced. The light guide and the printed circuit board are disposed on the back surface of the liquid crystal display panel, and the respective light-emitting elements are inserted through through-holes formed to extend through the printed circuit board, with the light-emitting portions of the respective light-emitting elements opposed to the entrance surface of the light guide. The light-emitting elements, together with the other electronic components, are mounted on the printed circuit board from one side. Electrodes of the light-emitting elements are bridged and secured to a mounting surface of the printed circuit board.

Abstract: The invention provides a semiconductor integrated circuit device on which a RAM macro capable of selecting an operation mode adapted to improved ease of use, response, or low power consumption or selecting an input setup value is mounted. In a first operation mode of a RAM macro, a timing of receiving an input signal is set as a first timing. In a second operation mode, a timing of receiving an input signal is set to a second timing later than the first timing. In a semiconductor integrated circuit device including an input circuit for receiving an input signal and a decoder circuit for decoding an output signal of the input circuit, the input circuit is activated on the basis of a first signal and the decoder circuit is activated on the basis of a second signal.

Abstract: In a communicating method between data processing apparatuses using the Sockets API or the MPI API, the apparatus on the receiving side informs the apparatus on the sending side of a data length threshold, which makes the apparatus on the sending side to decide between sending data to a pre-registered pre-allocated buffer on the apparatus on the receiving side, or having the memory region that is the final destination of the data transfer registered and then sending the data to this memory region. When the length of the data to be sent does not exceed the threshold, sending to the pre-allocated buffer is selected, and the data transfer operation is completed by copying the received data from the pre-allocated buffer to the final destination of this transfer. In case the length of the data to be sent exceeds the threshold, the data is sent directly to the final destination of this transfer.

Abstract: The present invention provides a semiconductor device and a manufacturing method thereof which can realize fine processing while preventing a warp of a semiconductor wafer. In forming a plurality of semiconductor elements on a semiconductor wafer, grooves for attenuating stress are formed in scribe regions defined between semiconductor element forming regions. Here, the grooves are formed in the scribe regions except for alignment pattern forming regions such that the alignment pattern forming regions remain in the scribe regions. On the alignment pattern forming regions of the scribe regions, an alignment pattern or a TEG pattern which is used in a photolithography step is formed.

Abstract: A portable toilet, suitable in disasters, leisure activities, and others. The portable toilet includes a pail and a seat structure detachably mounted at the opening of the pail. The seat structure has a base, a seat and a cover. A metal ring band is detachably mounted to the pail with a fastener. Parallel metal stays protrude horizontally from the outer surface of the metal band ring. A hand grip is formed of an U-shaped metal pipe. The lower ends of each U-shaped metal pipe are securely fixed to ends of each parallel metal stay. The metal band ring of the hand grip is tightly banded around the pail with the fastener. The pipes stand upward from the right and left sides of the pail. When the user sits down on the seat or gets off therefrom, the user is supported with the hands holding the hand grips.