Abstract: A semiconductor integrated circuit device is provided, in which variation in the threshold voltage of a MISFET, for example, a MISFET pair that constitute a sense amplifier, can be reduced. In a logic circuit area over which a logic circuit such as a sense amplifier circuit required to drive a memory cell is formed, n-type active areas having no gate electrode are arranged at both edges of active areas over which a p-channel MISFET pair for constituting a sense amplifier are formed. Assuming that the width between active areas nwp1 and nw1 is L4, the width between active areas nwp2 and nw2 is L6, and the width between active areas nwp1 and nwp2 is L5, (L4−L5), (L6−L5), and (L4−L6) are set equal to almost zero or smaller than twice the minimum processing dimension, so that the variation in shape of the device isolation trenches with the widths L4, L5, and L6 can be reduced, and the threshold voltage difference in the MISFET pair can be reduced.

Abstract: Disclosed is a disk system for controlling divided areas of a cache memory. Identification information that denotes whether data to be accessed is user data or meta data is added to each I/O command issued from a CPU. A disk controller, when receiving such an I/O command, selects a target virtual area from among a plurality of virtual areas set in the cache memory according to the identification information. When new data is to be stored in the cache memory upon the execution of the I/O command, the disk controller records the number of the selected virtual area in the cache memory in correspondence with the new data. A cache data replacement is executed independently for each cache area, thereby a predetermined upper limit size of each cache memory area can be kept.

Abstract: To reduce the volume of a metal container body after the juice or beer contained therein has been consumed, the container body/wall is formed with accordion-shaped portions having horizontal ring-shape hill portions valley portions.

Abstract: Disclosed is a disk control apparatus with excellent scalability realized on the same architecture, in high quality and reliability, regardless of its scale. Each of a plurality of channel interface units and a cache memory unit as well as each of a plurality of disk interface units and the cache memory unit are connected through a switch and a data path network (solid line) in each disk control cluster. Each switch provided outside each disk control cluster is connected to the switch in each disk control cluster through the data path network. A resource management unit is provided outside each disk control cluster and the resource management unit is connected to each of the plurality of channel interface units/disk interface units, as well as to the cache memory unit in each disk control cluster. The resource management unit is also connected to each switch provided outside each disk control cluster through a resource management network (dotted line).

Abstract: The present invention provides a semiconductor integrated circuit device equipped with a negative feedback amplifier circuit or a step-down circuit which realizes stabilization of an output voltage effectively in response to a variation in power supply voltage. A constant current source is used to cause a bias current for setting current consumption to flow in a differential amplifying MOSFET. A capacitor is provided between an external power supply voltage and a predetermined circuit node to thereby detect a reduction in the external power supply voltage. An operating current of the differential amplifying MOSFET is increased through the use of a current flowing in the capacitor due to such an external power variation, thereby executing the operation of stabilizing an output voltage corresponding to the reduction in the external power supply voltage.

Abstract: An image-display device using phosphor can improve the its luminescence efficiency and characteristics of color coordinates by adding an IIA element to a host crystal of ZnS phosphor to form a composite crystal. The image-display device improves the luminescence efficiency and color coordinate characteristics by using a phosphor expressed by Zn(1−x)MIIAxS:MIB, MIII where MIIA is one or more IIA elements in periodic table of elements, MIB is one or more IB elements and MIII is one or more MIIIA elements such as Sc or Y.

Abstract: A centrifugal separator of the invention has a centrifugal rotor (10-1), with symmetric rotation axes, having single sample separation chamber in it for centrifuging samples contained in sample solutions, an upper opening passing through to said sample separation chamber in the upper part, members of frameworks capable of being coupled to said upper opening, a rotation driving means, assuming that the direction of said symmetric rotation axis is the first direction, for driving said centrifugal rotor around said rotation axis in the first direction, wherein assuming that two directions intersecting with said first direction are the second and third directions, the length of said sample preparation chamber in said third direction is longer than the length of said sample preparation chamber in said second direction.

Abstract: A semiconductor device includes a first region having first bit lines, first word lines and first memory cells; a second region having second bit lines, second word lines and second memory cells; a third region having sense amplifiers placed between the first region and the second region; a first conductive layer being over the first region; a second conductive layer being over the second region; and a connecting layer, being over the third region, which electrically connects the first conductive layer with the second conductive layer. The sense amplifiers amplify differences in voltage between the first bit lines and the second bit lines. Each of the first memory cells includes a first storage capacitor having an electrode connected to the first conductive layer. Each of the second memory cells includes a second storage capacitor having an electrode connected to the second conductive layer.

Abstract: Method for drying a microstructure member having many micro concavities in a surface, the micro concavities containing water, includes adjusting the temperature of liquid inside the micro concavities to a temperature in the range of the cloud point of a surfactant ±1° C., and supplying a mixture of the surfactant and a hydrophobic solvent adjusted to a temperature in the range of the cloud point ±1° C. into the micro concavities to remove part or all of the water; heating the liquid inside the micro concavities to a temperature exceeding the cloud point +1° C., and supplying the hydrophobic solvent controlled to a temperature exceeding the cloud point +1° C. into the micro concavities to replace the liquid in the concavities with the hydrophobic solvent; and placing the resulting microstructure member with the concavities into contact with liquid or supercritical carbon dioxide to replace the hydrophobic solvent with the liquid or supercritical carbon dioxide.

Abstract: Disclosed herewith is a semiconductor device improved to prevent withstand voltage defects that might occur in each MOSFET used therein and a system to be designed easily and prevented from withstand voltage defects that might occur in each semiconductor used therein. The system includes the first and second input circuits, each being constituted by MOSFETs manufactured in the same process. The first input circuit receives a voltage of a first signal inputted from a first external terminal and divided by first and second resistor means while the AC component of the input signal is transmitted to the input circuit through a capacitor disposed in parallel to the first resistor means. The second input circuit receives a second input signal inputted from a second external terminal and reduced in signal amplitude so as to become smaller than that of the first input signal.

Abstract: In a dynamic-type semiconductor integrated circuit in which precharge and evaluation operations are preformed per cycle, an IDDQ test and a light detection test can be conducted during an evaluation period for facilitating diagnosis and failure analysis so as to increase test accuracy. The dynamic-type semiconductor integrated circuit operates in a normal operation mode or a test mode, wherein a switch therebetween is triggered by a mode selection signal. In the normal operation mode, the pulse width of an internal activation signal is controlled to be constant, i.e., invariable with an operation cycle time length. In the test mode, the pulse width of the internal activation signal is controlled to vary according to an operation cycle time length.

Abstract: The present invention provides a semiconductor integrated circuit device equipped with an input circuit capable of stably performing a high-speed operation up to a low voltage. A rail to rail circuit constitutes a differential input circuit, and a circuit similar to such a differential input circuit is used to constitute a bias circuit. A pair of output terminals of a differential circuit constituting such a bias circuit is commonly connected to form a bias voltage corresponding to a middle point. The bias voltage is supplied to the gates of current source MOSFET and the gates of cascode-connected MOSFETs in the differential input circuit, and the gates of the corresponding current source MOSFETs and cascode-connected MOSFETs in the bias circuit corresponding to itself.

Abstract: A semiconductor integrated circuit device which shortens the time required for testing a divided logic circuit to reduce test cost and a fault-detecting method therefor. The logic circuit is divided into N logic blocks using N+1 scan paths comprises of scan flip-flops each having selectors for selectively picking up the output signals of storage elements which are fed back to the storage elements. A common scan operation may then be carried out on these logic blocks (Logic 1-to Logic N), and a testing operation may be continuously carried out on the logic blocks. The present invention preferably eliminates the overlaps in conventional scan operations, resulting in a shorter test time.

Abstract: The irregularities of coloring concentration which is generated between dyed media when a color filter substrate which is prepared in a manufacturing method of a liquid crystal display device is manufactured by supplying ink to dyed media formed on a main surface of the color filter substrate using an ink jet method. In the present invention, as color filter ink which is supplied to the dyed media formed on the color filter substrate using the inkjet method, liquid which contains dye which colors the dyed media, solvent (for example, water) which has an affinity for the dye, a volatility-adjusting agent (for example, glycerin) which lowers the volatility of the ink to a level below the volatility of the solvent, and a dyeing-promoter agent (for example, N-methyl-2-pyrrolidone) which exhibits a higher affinity for the dye and the dyed media than the volatility adjusting agent. Then, the dyed media is colored with this ink.

Abstract: A method or an apparatus for selecting oocytes or eggs based on at least one objective criterion, such as membrane potential, comprises a step or means for selecting a plurality of oocytes or eggs having a certain size with a filter or the like, and a step or means for measuring a membrane potential of each of the oocytes or eggs thereby sorting out those with a membrane potential within a specified range. The selected oocytes or eggs are sold or transferred together with the measurement information or an injected sample of interest.

Abstract: Generation of stain-like display defects is prevented. There are provided in a liquid crystal-side pixel region of one substrate of respective substrates that are disposed to oppose each other with liquid crystals interposed therebetween a thin-film transistor being driven by a scan signal from a gate signal line, a pixel electrode to which an image signal from a drain signal line is supplied from this thin-film transistor, a protective film that is formed to also cover the thin-film transistor and the pixel electrode, and a resin film as formed on an upper surface of this protective film.

Abstract: Gate oxide films, gate electrodes, base regions and emitter regions, which constitute IGBTs, are formed on a semiconductor wafer. A silicon oxide film is formed on the gate electrodes. Further, an emitter electrode is formed thereabove, and a passivation film is formed over the emitter electrode. Thereafter, an internal area of a back surface of the semiconductor wafer is polished to form a protrusion at its outer peripheral portion. Afterwards, an impurity is injected from the back surface of the semiconductor wafer to form a collector region. After a collector electrode is further formed, the semiconductor wafer is mounted on a stage smaller than the internal area and subjected to dicing along scribe areas. Thus, the strength of the semiconductor wafer is held by the protrusion, and cracking or the like of the semiconductor wafer can be reduced owing to the execution of the dicing in the above-described manner.

Abstract: The present invention provides a semiconductor integrated circuit device equipped with a negative feedback amplifier circuit or a step-down circuit which realizes stabilization of an output voltage effectively in response to a variation in power supply voltage. A constant current source is used to cause a bias current for setting current consumption to flow in a differential amplifying MOSFET. A capacitor is provided between an external power supply voltage and a predetermined circuit node to thereby detect a reduction in the external power supply voltage. An operating current of the differential amplifying MOSFET is increased through the use of a current flowing in the capacitor due to such an external power variation, thereby executing the operation of stabilizing an output voltage corresponding to the reduction in the external power supply voltage.

Abstract: A liquid crystal display device with a pair of substrates with a liquid crystal layer therebetween, a pair of electrodes disposed adjacent to each other in each pixel region of a liquid crystal side surface of one of the pair of substrates, at least one of the pair of electrodes being formed on a protective film comprised of an organic film and is in contact with an orientation film, wherein a film thickness of the orientation film overlying the protective film is greater than a film thickness of the orientation film overlying an electrodes being formed on the protective film.

Abstract: For preventing light from leaking into pixels located at a periphery of a display region of a liquid crystal display device which has a first conductive layer being extended outside a liquid crystal sealing region formed at an at least one of first and second substrates thereof, an insulating layer covering the first conductive layer, and a terminal contacting the first conductive layer and being extended on the insulating layer at an outside of the display region thereof, a second conductive layer is provided having a different electrical potential from that of the first conductive layer and being formed between the display region and the terminal on the insulating layer.