Patents Represented by Attorney, Agent or Law Firm Juan Carlos A. Marquez, Esq.
  • Patent number: 6789093
    Abstract: A method and apparatus for providing an interpretation service are disclosed. The method includes the steps of receiving an incoming telephone call from a user, forming a plurality of databases, receiving at least one user information item via the incoming telephone call, searching at least one of the plurality of databases for at least one sentence correspondent to the at least one information item, outputting a translation from at least one of the plurality of databases of the at least one sentence correspondent to the at least one information item, and outputting, in audio on the incoming telephone call, the translation. The apparatus includes an interpreter and a registration service. The registration service includes a private information manager that receives an incoming telephone call from a user, wherein the private information manager manages a plurality of databases, wherein the plurality of databases includes at least one database of sentences registered to the individual user.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: September 7, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Yasunari Obuchi, Atsuko Koizumi, Yoshinori Kitahara, Seiki Mizutani
  • Patent number: 6787451
    Abstract: In a method for manufacturing an FET having a gate insulation film with an SiO2 equivalent thickness of 2 nm or more and capable of suppressing the leak current to {fraction (1/100)} or less compared with existent SiO2 films, an SiO2 film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2 film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: September 7, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Yasuhiro Shimamoto, Katsunori Obata, Kazuyoshi Torii, Masahiko Hiratani
  • Patent number: 6788364
    Abstract: Light leakage within pixel area is prevented. A liquid crystal display device includes a light reflection area forming pixel electrode and a reflection film in one portion of a pixel area on a liquid crystal side face of one substrate oppositely arranged through the liquid crystal. A light transmission area forms the pixel electrode in another portion. The pixel electrode as the reflection film is formed on the upper face except for an opening portion of an insulating film. The opening portion is formed in a light transmission area. The opening portion of the insulating film has a fan-shaped taper from the substrate side to the liquid crystal side on the side wall face of this opening portion. At least one portion of this taper is not covered with the pixel electrode used as the reflection film, but is exposed. The insulating film has a light absorption property in at least the taper portion.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: September 7, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Hiroko Hayata, Masayuki Hikiba, Hitoshi Komeno
  • Patent number: 6787835
    Abstract: A high integration dynamic random access memory is provided by this invention. Furthermore, a write method is provided such that the cell size of two- and three-transistor gain cell memories is reduced. A dynamic memory incorporating a thin-channel transistor as the write element such that long data storage retention is achieved in the memory devices of this invention. A dynamic memory cell having low operating power and high density is also realized by this invention.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: September 7, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Bryan Atwood, Kazuo Yano, Tomoyuki Ishii, Taro Osabe, Kazumasa Yanagisawa, Takeshi Sakata
  • Patent number: 6787459
    Abstract: There is provided a method of fabricating a semiconductor device whereby fine patterns are formed with high dimensional accuracy by means of multiple exposures, using a phase shift mask and a trim mask. Phases are periodically assigned to shifter patterns within a given range from patterns generated with the phase shift mask, respectively.
    Type: Grant
    Filed: November 15, 2002
    Date of Patent: September 7, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Akemi Moniwa, Takuya Hagiwara, Keitaro Katabuchi, Hiroshi Fukuda, Mineko Adachi
  • Patent number: 6787349
    Abstract: The present invention provides a high-sensitive, inexpensive biochip reader for reading a biochip as compared to a fluorescence method. The biochip reader is provided with an X-Y stage (3) for mounting a biochip (6) and scanning the biochip (6) in a two-dimensional manner, a controller (4) for the X-Y stage, a magnetic sensor (1) for reading the magnetic field strength, an ohmmeter (2), and a computer (5) for signal processing. As a result, a high-performance, inexpensive biochip reader can be provided without using an expensive laser or an expensive optical system, by employing a magnetic sensor and a disk driving mechanism generally used in a hard disk drive and the like.
    Type: Grant
    Filed: July 19, 2001
    Date of Patent: September 7, 2004
    Assignee: Hitachi Software Engineering Co., Ltd.
    Inventors: Kenji Yamamoto, Mitsuhiro Tachibana, Katsuya Mizuno
  • Patent number: 6785715
    Abstract: A storage subsystem that directly interfaces with a network, provides connections for routers with a conventional multi-path function, and performs access load balancing among a plurality of input/output ports. Each channel controller is assigned with a channel controller network address, and a storage device is assigned with a storage device address (different from the network addresses of the channel controllers). Upon receiving a packet addressed to the storage device address from an external network device, a pseudo storage load routing function responds by notifying the external network device that the packet has been transmitted to the storage device with the storage device address, while performing input/output processing indicated by the packet for the storage device with the storage device address.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: August 31, 2004
    Assignee: Hitachi, Ltd.
    Inventor: Makio Mizuno
  • Patent number: 6785165
    Abstract: A semiconductor device including a nonvolatile memory unit and a variable logic unit mounted on a chip is configured to achieve higher speed operation at a lower voltage. The semiconductor device includes a nonvolatile memory unit comprising a plurality of rewritable nonvolatile memory cells and a variable logic unit whose logical functions are determined, according to logic constitution definition data to be loaded into storage cells thereof. A nonvolatile memory cell essentially has a split gate structure composed of a selecting MOS transistor and a memory MOS transistor and constructed such that the dielectric withstand voltage of the gate of the selecting MOS transistor is lower than that of the memory MOS transistor or the gate insulation layer of the selecting MOS transistor is thinner than that of a high-voltage-tolerant MOS transistor. Because the selecting MOS transistor has a high Gm, a sufficiently great current for reading can be obtained.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: August 31, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Takayuki Kawahara, Nozomu Matsuzaki, Terumi Sawase, Masaharu Kubo
  • Patent number: 6782854
    Abstract: A valve timing control device includes a rotation member for opening and closing values, a rotation transmitting member rotatably mounted on the rotation member, a fluid chamber defined between the rotation member and the rotation transmitting member, a vane fitted into a vane groove formed on the rotation member or the rotation transmitting member so as to divide the fluid chamber into a advance angle pressure chamber and a retard angle pressure chamber, the vane groove having contacting portions contacted with the vane and an elastic member disposed between the vane and the rotation member or the rotation transmitting member, wherein the radial length between the bottom portion of the vane groove and a bottom portion side end portion of the contacting portion is larger than a radial length between the bottom portion of the vane groove and an engaging portion of the vane engaged with the elastic member.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: August 31, 2004
    Assignee: Aisin Seiki Kabushiki Kaisha
    Inventors: Motoo Nakamura, Shigeru Nakajima
  • Patent number: 6782018
    Abstract: This invention is provided to reduce wavefront aberrations caused by the filling of a transparent resin intended to prevent degradation of a diode laser in a hermetically sealed package. A parallel-plane plate is arranged between a diode laser and an objective lens, and a transparent resin is filled into a space formed between the diode laser and the parallel-plane plate. With this invention, degradations of the diode lasers can be prevented and the wavefront aberrations can be reduced.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: August 24, 2004
    Assignee: Hitachi, Litd.
    Inventors: Kimio Tatsuno, Masahide Tokuda, Shigeharu Kimura, Takeshi Shimano, Hirohisa Sano
  • Patent number: 6781944
    Abstract: In an optical head of a DVD drive, a light-emitting device and light-receiving devices are disposed on one face of a substrate, and on the other face of the substrate, a diffraction light separating device, a &lgr;/4 plate, and a dielectric plate having a converging focus lens are sequentially, hierarchically integrated. With the configuration, a laser beam (transmission beam) emitted from the front light-outgoing end of the semiconductor laser device sequentially passes through the diffraction light separating device, &lgr;/4 wave plate, and dielectric plate having the converging focus lens to form an image on a recording face of a recording medium (optical recording medium). A reflected beam reflected by the recording face returns reversely along the optical path through which the transmission beam has traveled, the phase of the reflected beam is changed by the &lgr;/4 wave plate, and the phase-changed reflected beam is separated into two primary diffracted beams in two directions.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: August 24, 2004
    Assignee: Hitachi, Ltd.
    Inventor: Toshiaki Tanaka
  • Patent number: 6780781
    Abstract: A method for manufacturing an electronic device is provided. In one example of the method, the method prevents deformation of a resist mask caused by the irradiation of exposure light. The resist mask has a resist as an opaque element, and can afford mask patterns undergoing little change even with an increase in the number of wafers subjected to exposure processing. The resist mask maintains a high dimensional accuracy. A photomask pattern is formed using as an opaque element a resist comprising a base resin and Si incorporated therein or a resist with a metal such as Si incorporated thereby by a silylation process, to improve the resistance to active oxygen. The deformation of a resist opaque pattern in a photomask is prevented. The dimensional accuracy of patterns transferred onto a Si wafer is improved in repeated use of the photomask.
    Type: Grant
    Filed: May 27, 2003
    Date of Patent: August 24, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Takahiro Odaka, Toshihiko Tanaka, Takashi Hattori, Hiroshi Fukuda
  • Patent number: 6779190
    Abstract: The disk carrier device comprises a carrier roller having a tapered surface with the diameter thereof becoming smaller gradually from the opposite ends towards the center, and a disk guide member integrally formed with a pair of tilted protrusions in the front and rear parts thereof which become gradually lower from the opposite ends towards the center. It is constructed such that the carrier roller is arranged between the pair of tilted protrusions to resiliently clamp the disk between the both tilted protrusions and the carrier roller to thereby carry the disk by the rotation of the carrier roller.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: August 17, 2004
    Assignee: Tanashin Denki Co., Ltd.
    Inventors: Shigeru Akatani, Takashi Yamanaka
  • Patent number: 6778929
    Abstract: Estimation method for obtaining estimation results of meteorological quantities in a specified area during a specified future period, including steps of: provisionally creating a meteorological time-series model from historical data of the meteorological quantities observed in the specified area; adjusting parameters of the created time-series model on the basis of long-range weather forecast data for wider area, which contains future meteorological tendency relative to normal years, to adjust the created time-series model; and conducting simulation using the adjusted time-series model to obtain the estimation results.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: August 17, 2004
    Assignee: Hitachi, Ltd.
    Inventor: Masashi Egi
  • Patent number: 6777337
    Abstract: In a production process of a semiconductor device, planarizing of a wafer surface pattern can be performed to attain high planarity, good uniformity in the removal amount and improved controllability. This process include a step of planarizing a semiconductor wafer, from which at least two different films have been exposed, by polishing with a grindstone and a dispersant-containing processing liquid.
    Type: Grant
    Filed: July 24, 2001
    Date of Patent: August 17, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Kan Yasui, Souichi Katagiri, Masayuki Nagasawa, Ui Yamaguchi, Yoshio Kawamura
  • Patent number: 6774831
    Abstract: An analog switch and an analog multiplexer are realized by which electron charges which have been stored in a stray capacitance provided on the output side thereof before a switch is conducted do not give an adverse influence to a level of such an analog input voltage which is subsequently entered after the switch has been switched. An analog switch circuit is arranged by insulating gate type transistors and a voltage follower which is parallel-connected to these insulating type transistors. When the analog switch circuit is turned ON, the voltage follower is firstly brought into an active state, and thereafter, these insulating gate type transistors are brought into conductive conditions.
    Type: Grant
    Filed: April 22, 2003
    Date of Patent: August 10, 2004
    Assignees: Renesas Technology Corp., Hitachi Hokkai Semiconductor, Ltd.
    Inventor: Yasuyuki Saito
  • Patent number: 6775226
    Abstract: An information recording medium, which comprises three thin films of different compositions, comprising first and second interference layers and a first interface layer, stacked in this order from the laser beam incident side of a recording layer, the refractive index of the second interference layer being lower than that of any one of the first interference layer and the recording layer, the first interface layer being provided in contact with the recording layer and between the second interference layer and the recording layer, the second interference layer containing oxygen, and an oxygen barrier layer having a smaller oxygen content than that of the second interference layer being provided in contact with the second interference layer and between the second and first interface layers, can control diffusion of oxygen from the second interference layer into the recording layer and prevents deterioration of overwriting at the time of many runs of overwriting and lowering of storage life.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: August 10, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Makoto Miyamoto, Junko Ushiyama, Keikichi Andoo
  • Patent number: 6774695
    Abstract: A level conversion circuit is composed of a level shift circuit for supplying a level-converted signal in the same phase as the input signal and a signal in the reverse phase thereto and a follow-up circuit responsive to the earlier of the output signals of the level shift circuit for generating an output signal, wherein the follow-up circuit consists of an inverter circuit in which two p-channel type MOS transistors and two n-channel type MOS transistors are connected in series between a first voltage terminal and a second voltage terminal, of which one pair is used as input transistors and the remaining pair of transistors are subjected to feedback based on the output signal of the level shift circuit to be quickly responsive to the next variation.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: August 10, 2004
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Hirokatsu Hayashi, Toshiro Takahashi
  • Patent number: 6775724
    Abstract: A synchronization control apparatus and method enables synchronization control which can flexibly accommodate various frequencies using a simple circuit construction. A storage device that has a predetermined capacity, such as a FIFO, stores externally input data. A CPU controls an output frequency at which data stored in the storage device are output, based on an average frequency which is an average of the output frequency and on a coefficient for setting the average frequency at a fixed value, the first frequency controlling device calculating the average of the output frequency whenever a timing signal is input in accordance with a predetermined cycle and determining the coefficient depending on a free capacity of the storage device at a time of inputting of the timing signal.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: August 10, 2004
    Assignee: Yamaha Corporation
    Inventors: Masafumi Toshitani, Hitoshi Koseki
  • Patent number: 6775621
    Abstract: The present invention provides a hybridization detection method capable of quantitatively determining the degree of the hybridization between a sample biopolymer and a probe biopolymer. In the method, the amount of a fluorescently labeled probe immobilized on a substrate as a spot is quantitatively determined by determining the fluorescence emitted from a fluorescent material labeling the probe, and the amount of a fluorescently labeled sample hybridized to the probe is quantitatively determined by determining the fluorescence emitted from the fluorescent material labeling the sample. The difference between the amount of the probe and the amount of the sample is normalized with the amount of the probe. Based on the normalized value, the amount of the sample hybridized to the probe can be determined relative to the amount of the probe spotted on the substrate.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: August 10, 2004
    Assignee: Hitachi Software Engineering Co., Ltd.
    Inventors: Noriko Yurino, Kenji Yamamoto, Toshiaki Ito, Toshimasa Watanabe