Patents Represented by Attorney Julius J. Zaskalicky
  • Patent number: 4099998
    Abstract: Zener diodes of selectively variable breakdown voltages ranging from a few voltages to several hundred volts are fabricated in monolithic integrated circuits by locating the edge of a P-N junction at the surface of a substrate within the gradient region of P-type diffusion. Methods for making the same are also described.
    Type: Grant
    Filed: August 20, 1976
    Date of Patent: July 11, 1978
    Assignee: General Electric Company
    Inventors: Armand P. Ferro, Bruno F. Kurz, deceased
  • Patent number: 4093909
    Abstract: A method and apparatus for operating a smiconductor integrated circuit at minimum power from a voltage source, including deriving a semiconductor process parameter dependent reference voltage within the integrated circuit, comparing the magnitude of the reference voltage and the voltage source and maintaining the magnitude of the voltage source greater than the reference voltage.
    Type: Grant
    Filed: July 21, 1976
    Date of Patent: June 6, 1978
    Assignee: General Electric Company
    Inventors: Donald L. Watrous, Daniel W. Dobberphul
  • Patent number: 4084257
    Abstract: An analog memory apparatus for storing and retrieving a sequence of samples of an analog signal is described. The apparatus includes a plurality of storage devices each storing each of the samples of the sequence with appropriate sign in accordance with a predetermined code. The samples stored in each device represent a respective algebraic sum of the samples of the sequence. To retrieve the samples of the analog signal the different algebraic sums of samples stored in the devices are algebraically summed in accordance with the predetermined code.
    Type: Grant
    Filed: May 19, 1977
    Date of Patent: April 11, 1978
    Assignee: General Electric Company
    Inventors: Hubert K. Burke, Gerald J. Michon
  • Patent number: 4084256
    Abstract: An analog multiplier for multiplying each sample of an input sequence of samples of an analog signal by a respective multiplying coefficient of a series of coefficients is provided. The multiplier includes a plurality of charge storage cells, each cell including a first and a second storage region. Means are provided for introducing into each of the charge storage cells a respective quantity of charge representing a respective sample of a signal. The quantity of charge is divided between the first and second storage regions of a cell in proportion to the ratio of the width of the first storage region to width of the second storage region thereof. Means are provided for altering the charge in each of the second storage regions of each of the cells.
    Type: Grant
    Filed: December 16, 1976
    Date of Patent: April 11, 1978
    Assignee: General Electric Company
    Inventors: William E. Engeler, Howard S. Goldberg
  • Patent number: 4060821
    Abstract: A novel grid structure for a field controlled thyristor includes a current controlling grid structure interdigitated with a cathode structure in which the surface area of the cathode structure is substantially greater than that of the grid structure. High forward blocking voltage gain (anode voltage/grid voltage) and low on-state losses in a turn-off type field controlled thyristor are accomplished by providing a surface grid portion and a buried portion which are connected to the surface grid structure and substantially underlies the cathode structure. The buried grid structure is constructed in a manner to provide a high aspect ratio for the channel region.
    Type: Grant
    Filed: June 21, 1976
    Date of Patent: November 29, 1977
    Assignee: General Electric Co.
    Inventors: Douglas E. Houston, Surinder Krishna
  • Patent number: 4060783
    Abstract: A low cost magnetic circuit and method of making the same are disclosed. The magnetic circuit comprises an integral magnetic core having at least four legs in a closed magnetic path, at least one leg thereof with a circular cross section and a bobbin rotatably disposed about the circular portion for containing a coil winding. The coil is formed by rotating the bobbin while holding the core stationary.
    Type: Grant
    Filed: March 11, 1975
    Date of Patent: November 29, 1977
    Assignee: General Electric Co.
    Inventor: John D. Harnden, Jr.
  • Patent number: 4058717
    Abstract: A plurality of charge storage cells, each including first and second storage regions, are provided in a semiconductor substrate. Means are provided responsive to a scanning signal for introducing into each of the first charge storage regions a respective quantity of charge proportional to a respective sample of an analog signal. Means are provided responsive to the bits of one value of a digital reference word for maintaining storage of the analog samples in the first storage regions of the cells associated with such bits of one value. Means are provided responsive to bits of the other value of the digital reference word for transferring the analog samples to the second storage regions of the cells associated with such bits of the other value.
    Type: Grant
    Filed: July 6, 1976
    Date of Patent: November 15, 1977
    Assignee: General Electric Company
    Inventor: William E. Engeler
  • Patent number: 4057895
    Abstract: A method of forming a conductive member of N-type conductivity polycrystalline silicon on the surface of an insulating substrate with at least one side thereof sloping gradually to the surface of the insulating substrate utilizing the location dependent diffusivity of doping impurities in the polycrystalline silicon formed on the surface of the insulating substrates and also utilizing the etch inhibiting properties of polycrystalline silicon doped with boron impurities.
    Type: Grant
    Filed: September 20, 1976
    Date of Patent: November 15, 1977
    Assignee: General Electric Company
    Inventor: Mario Ghezzo
  • Patent number: 4058716
    Abstract: A plurality of charge storage cells, each including first and second storage regions, are provided in a semiconductor substrate. Means are provided responsive to a scanning signal for introducing into each of the cells a respective quantity of charge proportional to a respective sample of an analog signal. Each quantity of charge includes first and second portions of equal value. Each first portion is solely contained in the first storage region of a respective cell and each second portion is contained in the second storage region of a respective cell. Means are provided responsive to the bits of one value of a digital reference word for transferring the first portions of said quantities of charge into the second storage regions in the cells associated with such bits of one value.
    Type: Grant
    Filed: July 6, 1976
    Date of Patent: November 15, 1977
    Assignee: General Electric Company
    Inventor: Howard S. Goldberg
  • Patent number: 4048525
    Abstract: The output circuit includes a high gain differential amplifier having an inverting input terminal, a non-inverting input terminal and an output terminal with a feedback capacitance connected between the output terminal and the inverting input terminal. The input terminals are connected to first and second commonly phased lines of the charge transfer transversal filter. A first switchable impedance means is connected between the first line and the output terminal. A second switchable impedance means is connected between the second line and a d-c source of voltage. The lines are charged periodically to the voltage of the source by the first and second switchable impedance means prior to the transfer of charge in a cycle of operation of the filter and are then isolated from the source during the transfer of charge in the filter by the first and second switchable impedance means.
    Type: Grant
    Filed: September 2, 1975
    Date of Patent: September 13, 1977
    Assignee: General Electric Company
    Inventors: Howard S. Goldberg, William E. Engeler
  • Patent number: 4048590
    Abstract: A semiconductor integrated oscillator circuit requiring higher impedances than are practical by integrated circuit technology and generally provided by discrete components external to the circuit are functionally provided in the integrated circuit by a "current mirror" circuit which provides the bias function separate from the signal function.
    Type: Grant
    Filed: July 21, 1976
    Date of Patent: September 13, 1977
    Assignee: General Electric Company
    Inventor: Daniel W. Dobberpuhl
  • Patent number: 4040893
    Abstract: A method of etching a layer of material on the surface of a substrate of silicon dioxide utilizes an etch mask constituted of a binary silicate glass. The binary silicate glass is removed subsequent to the etching of the layer without affecting the substrate of silicon dioxide.
    Type: Grant
    Filed: April 12, 1976
    Date of Patent: August 9, 1977
    Assignee: General Electric Company
    Inventor: Mario Ghezzo
  • Patent number: 4040892
    Abstract: A method of etching a desired pattern in a layer of material including a major constituent of tin oxide is provided. A film of material which is resistant to the etching action of hot concentrated hydroiodic acid is formed on the layer and patterned. Portions of the layer uncovered by the patterned film are etched with hot concentrated hydroiodic acid.
    Type: Grant
    Filed: April 12, 1976
    Date of Patent: August 9, 1977
    Assignee: General Electric Company
    Inventors: Paul L. Sargent, Mario Ghezzo
  • Patent number: 4037245
    Abstract: An electric field controlled semiconductor diode comprises a semiconductor substrate with a uniform anode injecting region formed in one major surface of the substrate and a current controlling surface grid formed in the other major surface. The interstices of the grid include a cathode region of high injection efficiency. Means for controlling flow of electrical current between the anode and cathode regions is also described.
    Type: Grant
    Filed: November 28, 1975
    Date of Patent: July 19, 1977
    Assignee: General Electric Company
    Inventor: Armand P. Ferro
  • Patent number: 4032867
    Abstract: In a charge transfer transversal filter a semiconductor substrate is provided with main and parallel portions. A group of serially arranged electrodes insulatingly overlie and are uniformly spaced from the channel portions. The electrodes form with the substrate a plurality of stages of first and second charge transfer shift register over the main and parallel channel portions of the substrate, respectively. One electrode of each of the stages of the shift registers has a split along the length dimension thereof over the main channel portion dividing each of the one electrodes over the main channel portion into a first part and a second part with a third part overlying the parallel channel portion. The first parts of the one electrodes are connected to a first conductive line and the second and third parts of the one electrodes are connected to a second conductive line. The area of the first parts of the one electrodes being equal to the sum of the areas of the second and third parts of the one electrode.
    Type: Grant
    Filed: September 2, 1975
    Date of Patent: June 28, 1977
    Assignee: General Electric Company
    Inventors: William E. Engeler, Richard D. Baertsch
  • Patent number: 4032948
    Abstract: Methods for storing and transferring electrical charges between adjacently spaced storage regions in semiconductor substrate are disclosed. In one embodiment, a plurality of adjacently spaced conductor members are insulatingly disposed over a major surface of a semiconductor substrate. Each storage region is separated from each other storage region by an electrical barrier region underlying the spacing between the adjacent conductor members. These barrier regions are controllably lowered by an electrode interposed between adjacent conductor members. Electrical charges stored in one storage region are transferred to an adjacent storage region by applying a voltage signal to the interposed electrode to lower the barrier region between the adjacent storage regions. Direction of charge transfer is controlled by the relative surface potentials of the adjacent storage regions and the magnitude of transfer is controlled by the height of the barrier region when lowered.
    Type: Grant
    Filed: February 12, 1973
    Date of Patent: June 28, 1977
    Assignee: General Electric Company
    Inventors: William E. Engeler, Jerome J. Tiemann
  • Patent number: 4024562
    Abstract: An array of radiation sensing devices, each including a pair of conductor-insulator-semiconductor capacitors, arranged in rows and columns in which the row stripes or lines form row connected capacitors in relation to selected surface regions of a semiconductor substrate and in which the column stripes or lines form column connected capacitors in relation to the selected surface regions. Each of the row stripes overlies first portions of the selected surface regions of a respective row. Each of the column stripes overlies entirely the selected surface regions of a respective column.
    Type: Grant
    Filed: April 27, 1976
    Date of Patent: May 17, 1977
    Assignee: General Electric Company
    Inventors: Dale M. Brown, Mario Ghezzo, Marvin Garfinkel
  • Patent number: 4012767
    Abstract: In a semiconductor device low impedance ohmic connection is provided between a first conductor constituted of a metallic oxide material and a second conductor constituted of aluminum by the inclusion between the two conductors of a conductive interface member making low impedance ohmic contact to each of the first and second conductors.
    Type: Grant
    Filed: February 25, 1976
    Date of Patent: March 15, 1977
    Assignee: General Electric Company
    Inventors: Dale M. Brown, Marvin Garfinkel, Mario Ghezzo
  • Patent number: 4011442
    Abstract: In optical imaging apparatus a semiconductor substrate in which a pattern of charge is produced in a plurality of charge storage sites therein in accordance with a spatial pattern of radiation, output means are provided for deriving an output comprising signals proportional to the algebraic sums of selected combinations of the charge in the plurality of charge storage sites.
    Type: Grant
    Filed: December 22, 1975
    Date of Patent: March 8, 1977
    Assignee: General Electric Company
    Inventor: William E. Engeler
  • Patent number: 4011441
    Abstract: Relates to an imaging array of charge storage devices each including a pair of closely coupled conductor-insulator-semiconductor cells, one a row line connected cell and the other a column line connected cell. By transferring signal charge in a row of devices simultaneously between the cells of each device and reading out the resultant signal on the row line common to the devices, a spatial transform of an image is directly read from the array.
    Type: Grant
    Filed: December 22, 1975
    Date of Patent: March 8, 1977
    Assignee: General Electric Company
    Inventors: Gerald J. Michon, Hubert K. Burke