Abstract: A reflective photomask includes a phase shift object on a substrate, a reflective layer stacked on the substrate and the phase shift object, a capping layer on the reflective layer, the capping layer including at least one surface portion having a bent shape, and a light absorption pattern on the capping layer, the light absorption pattern including at least one slit exposing the surface portion of the capping layer having the bent shape.

Abstract: A semiconductor device, and a method of forming the same, includes forming a cell bit line pattern and a peripheral gate pattern on a semiconductor substrate. The cell bit line pattern may be formed on an inactive region adjacent to a cell active region of the semiconductor substrate. The peripheral gate pattern may be disposed on a peripheral active region of the semiconductor substrate. A cell contact plug may be formed between the cell bit line pattern and the cell active region. A peripheral contact plug may be formed on the peripheral active region on a side of the peripheral gate pattern. An insulating layer may be formed to expose top surfaces of the cell bit line pattern, the peripheral gate pattern, and the cell and peripheral contact plugs at substantially the same level.

Abstract: A red phosphor, including a first phosphor represented by Formula 1 (Y1-x1Mx1)2-y1O3:Euy1??(1). In Formula 1, M includes at least one of Gd, La, Sc, and Lu, and x1 and y1 satisfy the relations: 0.00?x1?0.8 and 0.025?y1?0.20.

Abstract: A hydrogen generator and a method of operating the hydrogen generator. The hydrogen generator includes: a cylindrical reformer catalyst; and a cylindrical shift catalyst disposed inside of the reformer catalyst; a separation wall provided between the reformer catalyst and the shift catalyst; a cylinder that is disposed inside of the reformer catalyst, and comprises, on an outer surface thereof, a plurality of first nozzles to direct a plurality of flames to the reformer catalyst and a plurality of second nozzles to direct a plurality of flames to the shift catalyst; and a combustion fuel supply valve that selectively guides a combustion fuel to the first nozzles and or the second nozzles.

Abstract: A method of forming minute patterns in a semiconductor device, and more particularly, a method of forming minute patterns in a semiconductor device having an even number of insert patterns between basic patterns by double patterning including insert patterns between a first basic pattern and a second basic pattern which are transversely separated from each other on a semiconductor substrate, wherein a first insert pattern and a second insert pattern are alternately repeated to form the insert patterns, the method includes the operation of performing a partial etching toward the second insert pattern adjacent to the second basic pattern, or the operation of forming a shielding layer pattern, thereby forming the even number of insert patterns.

Abstract: A semiconductor device may include a semiconductor layer having a convex portion and a concave portion surrounding the convex portion. The semiconductor device may further include a protrusion type isolation layer filling the concave portion and extending upward so that an uppermost surface of the isolation layer is a at level higher that an uppermost surface of the convex portion.

Abstract: A hierarchical mesoporous carbon is provided in which a total volume of mesopores of the hierarchical mesoporous carbon is 80% or greater of a total volume of pores of the hierarchical mesoporous carbon; a volume of mesopores with a average diameter greater than 20 nm and no greater than 50 nm is 3% or greater of the total volume of the pores; and a volume of mesopores with a average diameter greater than 2 nm and no greater than 10 nm is 65% or greater of the total volume of the pores. The hierarchical mesoporous carbon, which also contains macropores, has an optimized mesoporous distribution characteristic, and has an increased total volume of pores, thereby having a significantly improved catalytic activity when used as a catalyst support. When such a supported catalyst including the hierarchical mesoporous carbon as a support is used in a fuel cell, supply of fuel and transporting of byproducts are facilitated.

Abstract: A pixel, an organic light emitting display using the pixel, and a driving method thereof may compensate for degradation of an organic light emitting diode. The pixel includes the organic light emitting diode and a drive transistor that supplies an electric current to the organic light emitting diode. A pixel circuit compensates a threshold voltage of the drive transistor. A compensator controls the voltage of the gate electrode of the drive transistor in order to compensate a degradation of the organic light emitting diode.

Abstract: In an etching composition for an under-bump metallurgy (UBM) layer and a method of forming a bump structure, the etching composition includes about 40% by weight to about 90% by weight of hydrogen peroxide (H2O2), about 1% by weight to about 20% by weight of an aqueous basic solution including ammonium hydroxide (NH4OH) or tetraalkylammonium hydroxide, about 0.01% by weight to about 10% by weight of an alcohol compound, and about 2% by weight to 30% by weight of an ethylenediamine-based chelating agent. The etching composition may effectively etch the UBM layer including titanium or titanium tungsten and remove impurities. A method of forming a bump structure may employ such an etching composition.

Abstract: A non-volatile semiconductor memory device capable of reducing program disturb and a method of programming the same are provided. A bit line connected to a non-selected memory cell in the same block as a selected memory cell enters a floating state by inactivating a bit line selection switch, so that voltage levels of an first conductivity type channel and a source/drain terminal formed in a pocket second conductivity type well below a memory transistor have an intermediate level of a voltage level of a selection line and the pocket P type well. Therefore, program disturb caused by FN tunneling and junction hot electrons can be inhibited.

Abstract: A nonvolatile memory device having a plurality of multi-level memory cells, the plurality being at least two, may be programmed by writing a least significant bit for each multi-level memory cell of the plurality of memory cells and, after the least significant bit has been written for each multi-level memory cell of the plurality of memory cells, writing a next significant bit for each multi-level memory cell.

Abstract: A light guide member capable of guiding light received from at least a first light source and second light source, wherein the first light source is spaced a distance D3 from the second light source. The light guide member may include a first side including a plurality of first grooves extending along a first direction and a plurality of second grooves extending along the first direction, wherein the first grooves may have a first pitch and the second grooves have a second pitch, the first pitch being different from the second pitch.

Abstract: A phase-change memory device and its firing method are provided. The firing method of the phase-change memory device includes applying a writing current to phase-change memory cells, identifying a state of the phase-change memory cells after applying the writing current, and applying a firing current, in which an additional current is added to the writing current, to the phase-change memory cells in accordance with the state.

Abstract: A monopolar membrane-electrode assembly includes an electrolyte membrane with a plurality of cell regions, an anode supporting body and a cathode supporting body on both sides of the electrolyte membrane, respectively having a plurality of apertures corresponding to the cell regions, a plurality of anode and cathode current collectors, each including a current collecting portion to correspond to each aperture of the respective anode or cathode supporting body to collect current, a conducting portion connected to a side of the current collecting portion, and a connecting line that connects the conducting portion to an outside terminal, a plurality of anode and cathode electrodes respectively formed on the and the cathode current collecting portions, and a circuit unit connected to the connecting lines of the anode current collectors and the cathode current collectors, wherein the cells are connected in series or parallel, or electrically separated through the circuit unit.

Abstract: A pixel including an OLED, the pixel including a first transistor coupled between a data line and a first node, the first transistor being turned on by a low signal on an i-th scan line, a second transistor coupled between a first power source and a fifth transistor, a third transistor coupled between the gate electrode of the second transistor and an electrode of the second transistor that is coupled to the fifth transistor, the third transistor being turned on by a low signal on an (i?1)-th scan line, a fourth transistor coupled between a first reference voltage and the first node, the fourth transistor being turned on by the low signal on the (i?1)-th scan line, a storage capacitor coupled between the first node and the second node, and a compensator controlling a voltage of the second node corresponding to degradation of the OLED.

Abstract: A driving method of a plasma display device including a plurality of first electrodes divided into a plurality of groups including first and second groups, a plurality of second electrodes, and a plurality of third electrodes that intersect the plurality of first and second electrodes, may include dividing one frame into a plurality of subfields, each subfield including a reset period, an address period and a sustain period so as to be driven by a time division method, supplying a scan pulse and a scan reference voltage to the first group during a first address period in the address period, supplying a compensation pulse to at least one of the first and second groups during an address compensation period in the address period, and supplying the scan pulse and the scan reference voltage to the second group during a second address period in the address period.

Abstract: A method of forming a capacitor includes forming a cylindrical lower electrode structure having an internal support structure on a substrate, forming a dielectric layer on the cylindrical lower electrode structure and the support structure, and forming an upper electrode on the dielectric layer.

Abstract: A method of correcting patterns includes attaining a correcting amount distribution map using a photo mask, the photo mask including a transparent substrate having first and second surfaces opposite to each other and a mask pattern on the first surface, attaining a plurality of shadowing maps based on the correction amount distribution map, each of the shadowing maps including a unit section having a different plane area, and forming a plurality of shadowing regions with shadowing elements in the transparent substrate of the photo mask using respective shadowing maps.

Abstract: Provided are a catalyst for oxidizing carbon monoxide and a method of preparing the same. The catalyst for oxidizing carbon monoxide includes platinum and a transition metal which exists in a bimetallic phase, and the bimetallic phase of the platinum and the transition metal is supported by a support including a vacancy of oxygen. The catalyst for oxidizing carbon monoxide shows much higher activity than a conventional catalyst for oxidizing carbon monoxide even at a relatively low temperature.

Abstract: A method of fabricating a semiconductor integrated circuit includes forming a first dielectric layer on a semiconductor substrate, patterning the first dielectric layer to form a first patterned dielectric layer, forming a non-single crystal seed layer on the first patterned dielectric layer, removing a portion of the seed layer to form a patterned seed layer, forming a second dielectric layer on the first patterned dielectric layer and the patterned seed layer, removing portions of the second dielectric layer to form a second patterned dielectric layer, irradiating the patterned seed layer to single-crystallize the patterned seed layer, removing portions of the first patterned dielectric layer and the second patterned dielectric layer such that the single-crystallized seed layer protrudes in the vertical direction with respect to the first and/or the second patterned dielectric layer, and forming a gate electrode in contact with the single-crystal active pattern.