Abstract: The present invention relates to a composite of resin and fillers used in electronic parts and structural parts, and to a process for producing the same, and the object of the present invention is to provide a resin composite with a molded body having high dimensional accuracy, being free of surface defects attributable to a mold used for molding and being capable of easy forming and mass production, as well as a process for producing the same. The process for producing a resin composite according to the present invention comprises a step of mixing fillers of an average particle diameter of 40 .mu.m or less with thermosetting resin, a step of compression molding this mixed powder into a predetermined shape at ordinary temperature, and a step of allowing the compression molded body after released from the mold to be hardened by heating at 100 to 250.degree. C. to give a hardened molded body.

Abstract: A semiconductor integrated circuit can precisely identify the level of an external input signal by stably supplying an internally stepped down voltage.

Abstract: A program for rewriting data in an address region B is written in an address region A which can be rewritten by an external PROM writer. After resetting the microcomputer and rewriting the program in address region A, the reset state is cancelled and the last address in address region A of the EEPROM (1) is then stored in a register (17). An address detector (18) prohibits rewriting in address region A based on an address value stored in the register (17).

Abstract: An external clock signal CK is input to a buffer, which generates an internal clock signal CLK having a skew of D1 with respect to the external clock signal CK. The internal clock signal is input first to a delay circuit which has a delay time A, then to a delay array which provides a delay time D2, and finally to a delay circuit which has a delay time of D2. The delay circuit generates a corrected internal clock signal CK' which is synchronous with the external clock signal CK. The delay array is composed of delay units, each having a state-holding section. The state-holding section of any delay unit that has passed a forward pulse is set in a predetermined state. Once its state-holding section is set in the predetermined state, the delay unit provides a correct delay time of 2.times..DELTA..

Abstract: A word line is connected to a control gate of memory cell transistor, and a bit line and a source line are connected to a drain and a source of the memory cell transistor, respectively. A write clock having a certain crest value is applied to the source line, and an earth potential or a power supply potential is applied to the bit line in response to a read clock having a phase which is opposite to that of the write clock. A row selection clock which synchronizes with the write clock and a crest value of which is de-escalated is applied to the word line.

Abstract: A card read/write apparatus for reading or writing information from or into an IC memory region of a card comprises a card carriage formed with an IC exposure opening through which the IC memory region of the card is exposed when the card is placed on the card carriage, and a contact device having contact pins that is protruded into or retracted from the IC exposure aperture while being maintained to be in parallel with the IC memory region of the card so as to contact with or move away from the IC memory region of the card which is exposed from the IC exposure aperture.

Abstract: A Type III PCMCIA communications card for insertion in a slot in a host computer comprises a housing including a top wall and longitudinal, parallel side walls depending from the top wall, the longitudinal side walls and top wall defining an internal cavity enclosed by a bottom cover panel. The housing further has a forward end, a rear margin and a rear end surface, the rear margin of the housing defining at least one substantially longitudinally oriented receptacle extending forwardly from the rear end surface and sized and configured to receive a standard RJ-type modular plug. A substrate, mounted within the cavity of the housing, supports electronic components for carrying out the communications function.

Abstract: A wrist band antenna prevents connection failure and/or breakdown due to attachment/detachment of a loop antenna and has a receivable frequency band which is not affected by the thickness of the wearer's arm. A U-shaped antenna structure is mounted inside a wrist band part which is part of the wrist band divided at the center fastening structure. The U-shaped structure functions as an independent antenna on at least one part of the wrist band. The antenna is buried in the wrist band part so that the two ends of its U-shaped structure face toward a receiver main body. When each of two contact pins on the ends of the U-shaped structure connect the wrist band with the receiver main body, a terminal spring on a reception circuit substrate of the receiver main body is pressed. This causes the receiving signal from the antenna to be conveyed to the receiver main body.

Abstract: The Blood Infusion Control System of the present invention integrates components of rapid infusion systems with a computer controller designed to synchronize two infusion pumps in a manner that produces a pre-selected patient hematocrit (HCT*) while reporting the patient's estimated blood volume (BV.sub.E). In order to attain HCT*, the Blood Replacement Controller (BRC) drives a dual-pump assembly to deliver streams of asanguinous fluid and blood through flexible conduits into intravenous (IV) catheters to mix with the patient's blood volume having an initial hematocrit (HCT.sub.i). The BRC utilizes measured patient data as feedback input to control flowrates of the two-pump infusion assembly. The patient's estimated blood volume is extrapolated from hematocrit changes in response to the fluid and blood infusion.

Abstract: It is an object of the present invention to provide a portable terminal which reduces an antenna standing-wave ratio and absorbs reflected waves without inserting an isolator so that a stable operation can be obtained efficiently with a compact, low-price body.

Abstract: A magnetic carrier for use in a developer for developing latent electrostatic images is composed of magnetic carrier particles with a particle size of 35 .mu.m or less in an amount of 15 wt. % or more, and a developer is composed of the above carrier and a toner. An image formation method is composed of the steps of (a) uniformly charging the surface of a photoconductor to a predetermined polarity, (b) forming latent electrostatic images including low potential portions and high potential portions on the photoconductor by subjecting the charged surface of the photoconductor to selective light radiation corresponding to light images, thereby selectively reducing the potential of the surface of the photoconductor, and (c) developing the thus formed latent electrostatic images to visible toner images by bringing the developer into contact with the latent-electrostatic-images-bearing photoconductor.

Abstract: A nitride compound semiconductor light emitting element comprises a substrate, a nitride compound semiconductor n-type layer, a mask layer having a predetermined opening, a nitride compound semiconductor buffer layer epitaxially grown on said n-type layer exclusively at said opening. The buffer layer has a recess on its top face so that a thickness of said buffer layer is thinner above a central portion of the opening and thicker above edge portions of the opening. A nitride compound semiconductor active layer is selectively formed on the recess of the buffer layer to be thicker at the central portion of the recess and thinner at the edges of the recess. A nitride compound semiconductor burying layer overlays the mask layer and the active layer to cover the active layer.

Abstract: A memory cell array is composed of N (1.ltoreq.N.ltoreq.Nmax) blocks. A redundancy memory is always composed of Nmax blocks. A block decoder selects one of the N blocks of the memory cell array based on a block address signal. A redundancy memory decoder selects one of the Nmax blocks of the redundancy memory based on a redundancy memory selection address signal. When the number of blocks of the memory cell array and the number of blocks of the redundancy memory are different from each other, the N blocks of the memory cell array are in a one to one correspondence with N blocks of the Nmax blocks of the redundancy memory and the redundancy memory decoder selects one of the N blocks of the redundancy memory. The other blocks than the N blocks of the redundancy memory are left unused.

Abstract: There is Provided a decorative member having a coat of a hard carbon layer on a surface of a ceramic base, wherein the hard carbon layer has peaks in the ranges of wave numbers 1160.+-.40 cm.sup.-1, 1340.+-.40 cm.sup.-1 and 1500.+-.60 cm.sup.-1 of Raman spectra, and maximum intensity H.sub.1 of the peak residing in the range of 1160.+-.40 cm.sup.-1, maximum intensity H.sub.2 residing of 1340.+-.40 cm.sup.-1 cm.sup.-1 and maximum intensity H.sub.3 residing 1500.+-.60 cm.sup.-1 satisfy the following relations: 0.02.ltoreq.H.sub.1 /H.sub.2 .ltoreq.1.0 and H.sub.2 <H.sub.3, said member showing an excellent corrosion resistance, having no oozing out of a solution of a metal causing allergy on a human body and having a required mechanical properties.

Abstract: A wiring board of the present invention is equipped with a laminated waveguide as a high-frequency signal transmission line.

Abstract: A method of manufacturing a semiconductor monocrystalline mirror-surface wafer includes at least a gas phase etching process and a mirror-surface polishing process. The mirror-surface polishing process is composed of coarse polishing and finishing polishing, and only the coarse polishing is performed prior to the gas phase etching process, while the finishing polishing is carried out after the gas phase etching process. In addition, a heat treatment process is performed after the gas phase etching process but before the final cleaning process. The heat treatment process also serves as a donor-annihilation heat treatment process. The method can manufacture semiconductor monocrystalline mirror-surface wafers having a high degree of flatness, while resolving the problems involved in the conventional method; i.e., haze produced on a wafer surface, the introduction of strain and defects in the surface, high cost, and low productivity.

Abstract: To provide an effective method of nondestructively and easily judging plasticization of steel used in a real construction. A magnetic sensor 10 is made to scan along the surface of steel to detect a magnetic field caused by a magnetic anisotropy induced by plastic deformation of the steel, and the existence and position of the plasticization is judged from the state of distribution of the magnetic field. As a magnetic sensor, a differential type one comprised of detection coils 10a and 10b, the winding directions of which are opposite to each other, is used to compensate a magnetic field intrinsic to the steel.

Abstract: An image scanner arrangement having a scanner, a document feeder scanning portion and a flat scanning bed. A single white plate is provided between the document feeder scanning portion and flat bed. Before scanning, the scanner scans the white plate to provide image data for testing. If this image data contains white pixels not less than 90%, a controller determines that a lamp of a light source of the scanner illuminates appropriately. After confirming that the light source is in a good condition, the scanning starts. The single white plate is utilized regardless of scanning being performed with the document feeder scanning portion or the flat scanning bed.

Abstract: An all digital control method for motor drivers eliminates physical motor current sensing. The motor and the driver are modeled to estimate the actual current and the estimated current is used to perform motor control. This provides simplified driver circuitry. Driver non-linearity due to driver dead time may be compensated and minimum driver on times are accommodated while providing good waveform fidelity, minimized motor heating and increased motor system damping.

Abstract: The semiconductor image sensor device of the multiple chip mount type is constructed such that electrical and mechanical connections are carried out concurrently among chips. Coupling chips 4 are utilized to couple a plurality of semiconductor image sensor chips 1 with each other, and the couple one semiconductor image sensor chip 1 to a driver substrate 3 which mounts thereon a semiconductor driving chip 2 for driving the semiconductor image sensor chips 1.