Abstract: A method and apparatus for reverting a disk drive to an earlier point in time is disclosed. Changes made to the drive are saved in a circular history buffer which includes the old data, the time it was replaced by new data, and the original location of the data. The circular history buffer may also be implemented by saving new data elements into new locations and leaving the old data elements in their original locations. References to the new data elements are mapped to the new location. The disk drive is reverted to an earlier point in time by replacing the new data elements with the original data elements retrieved from the history buffer, or in the case of the other embodiment, reads to the disk are mapped to the old data elements stilled stored in their original locations. The method and apparatus may be implemented as part of an operating system, or as a separate program, or in the controller for the disk drive. The method and apparatus are applicable to other forms of data storage as well.

Abstract: A method of forming a CMOS sensor. Shallow first doped regions are formed in a provided substrate beside a gate electrode which is on the substrate. One of the shallow first doped region is defined as a source/drain area. Another of the shallow first doped region is defined as a sensor area. A spacer is formed on the sidewall of the gate electrode. A second doped region is formed within the predetermined sensor area by implanting. In the predetermined sensor area, the second doped region is deeper than the first doped region. The sensor region is composed of the first doped region and the second doped region.

Abstract: A method for in-situ removing photoresist material. An etching process for patterning a passivation layer of a CMOS photosensor is performed on an etching machine. Oxygen is in-situ used to remove the parched photoresist material. The etching process and the in-situ O2 process are performed, for example, on a Tegal-903 etching machine. The Tegal-903 has better stability than an Asher etching machine for removing the parched photoresist material using oxygen plasma. A stable etching rate is thus obtained to prevent the acrylic material layer from being damaged by over-etching and to prevent the photoresist material from remaining.

Abstract: Disclosed is a Chien search circuit for determining roots to an error locator polynomial that is defined by a set of coefficients. The circuit includes N sub-Chien search circuits, each of which is configured to sequentially evaluate a subset of field elements from a specified set of field elements. Each sub-Chien search circuit includes a set of storage elements, a set of constant multipliers, an adder, and a comparator. The set of storage elements stores a set of values, and receives and stores the set of coefficients as the set of values. One storage element is associated with each coefficient. The set of constant multipliers is coupled to receive the set of values from the set of storage elements. One constant multiplier is associated with one storage element. Each of the constant multipliers is associated with a constant field element and is configured to multiply the received value and the constant field element to generate a product.

Abstract: Disclosed is an error detection and correction device for extending error correction time on a data sector beyond the time to receive a next data sector. The error detection and correction device is coupled to sequentially receive a plurality data sectors from a data storage medium. The device includes a buffer and error detection and correction circuitry. The buffer is configured to sequentially receive and store the plurality of data sectors from the data storage medium. The error detection and correction circuitry is configured to sequentially receive the data sectors for sequentially detecting errors in each of the received data sectors. The error detection and correction circuitry corrects the detected errors in the associated sector that is stored in the buffer beyond the time to receive a next data sector in sequence.

Abstract: Disclosed is a semiconductor integrated circuit device having a plurality of metallization levels of patterned metallization lines that are resistant to electromigration voiding, and methods for making the electromigration void resistant metallization lines. The semiconductor integrated circuit device includes a metallization line having a first end and a second end. Oxide feature regions are defined in the metallization line, and the oxide feature regions are arranged along the metallization line between the first end and the second end. Each one of the oxide feature regions are configured to be separated from a previous oxide feature region by about a Blech length or less, and each of the oxide feature regions are configured to define a region of increased metallization atom concentration and a corresponding increased back-flow force. The oxide feature regions therefore define a composite metallization interconnect line, which is well configured to retard electromigration voiding.

Abstract: A method includes operations for creating and formatting FAT partitions beyond the first gigabyte of a disk having more than one gigabyte of data storage space, when the disk is associated with a controller card that does not include an option-ROM with a BIOS. In particular, the method populates at least one variable of each partition boot sector with a non-F6 value which then is detected to cause the use of the partition LBA for formatting the boot sector, rather than the partition CHS. A computer readable medium can also include program instructions for creating and formatting FAT partitions beyond the first gigabyte of a disk having more than one gigabyte of data storage space, when the disk is associated with a controller card that does not include an option-ROM with a BIOS.

Abstract: A method for integrating correction features onto selected design features of an integrated circuit mask. The method includes identifying a minimum dimension in the integrated circuit mask. The minimum dimension is configured to define transistor gate electrode features or any critical feature geometry. The method then includes removing feature geometries that are dimensionally larger than the minimum dimension. After the removing operation, correction features are integrated with selected ends of the transistor electrode features that have the minimum dimension to produce corrected transistor gate electrode features. Then, the method includes the operation of adding the corrected transistor gate electrode features to the removed feature geometries that are dimensionally larger than the minimum dimension to produce a corrected integrated circuit mask.

Abstract: A method and apparatus for compensating non-uniform wafer processing in a plasma processing chamber. The plasma processing chamber has an electrostatic chuck for clamping a wafer. The electrostatic chuck has one or more layers. A first wafer is processed on an electrostatic chuck in a first plasma processing chamber by exposing the first wafer to a plasma. Then, non-uniformity characteristics of the processed first wafer are determined. Based on the non-uniformity characteristics, one or more layers of the electrostatic chuck are configured to substantially compensate for the non-uniformity characteristics. A second wafer is then processed on the configured electrostatic chuck to produce substantially uniform process results.

Abstract: A method for post plasma etch cleaning a semiconductor wafer is provided. The semiconductor wafer has a plurality of layers formed thereon, and one of the plurality of layers is an oxide layer that has an overlying photoresist mask. The method includes plasma etching a via feature in the oxide layer. The plasma etching is configured to generate a polymer film on sidewalls of the via feature. An ashing operation is then performed to remove the photoresist mask. The method then moves to brush scrubbing the oxide layer and the via feature defined in the oxide layer with first chemicals in a first brush station. Brush scrubbing the oxide layer and the via feature follows with DI water in the first brush station. Then, the oxide layer and the via feature are brush scrubbed with second chemicals in a second brush station. In the same second brush station, the oxide layer and the via feature are scrubbed with DI water.

Abstract: A combined handrail-and-frame structure of a baby stroller includes an assembly and an engaging seat wherein the assembly 8 includes an inner seat, a first fastener, a second fastener, a spring, and a housing. A hook with a lead inclined surface is provided in each of the first and second fasteners, and a convex push button is provided at the top of the second fastener. Moreover, a positioning head having an engaging fork is provided at an end of the assembly, and a spring installed in between the first and the second fasteners is also provided. In addition, a slit for clipping the engaging fork and an opening having a first and a second edge is provided in the engaging seat to be hooked up by the hooks for positioning the engaging fork in horizontal and vertical directions. When it comes to detaching, the push button is press to compress the spring, and the two hooks will be unlocked such that the assembly can be separated from the engaging seat.

Abstract: Disclosed is a computer implemented system, method and computer readable media for facilitating intelligent input/output (I2O) message communication between a host computer system and a silicon specific target device without implementing an input/output processor. The system is thus configured to make generic storage silicon appear as though it were an I2O capable device, without implementing an I/O processor and associated hardware. The system includes a block storage operating system module (OSM) for receiving a request from an operating system of the host computer system and generating an intelligent input/output message request. Also included is a host-resident intermediate service module driver (e.g., a RAID driver) for translating the intelligent input/output message request into a silicon specific request that is compatible with the silicon specific target device.

Abstract: A dual purpose camera for alternative use with one of photographic film and a digital image capture module is described. The camera includes a camera body, an electrical interface means disposed within said camera body for interfacing the camera body with a digital image capture module; and a communication means disposed within said camera body for transferring data from the digital image capture module to devices external to the camera body.

Abstract: A method of forming a dual alignment photomask. The method includes the steps of depositing a light-blocking layer over a glass plate, and then patterning the light-blocking layer. Next, a switchable mask layer is deposited over the light-blocking layer and the glass plate, after which the switchable mask layer is patterned. Finally, a protective layer is formed over the switchable mask layer, the light-blocking layer and the glass plate. The switchable mask layer can be changed from a light-passing state to a light-blocking state by simply changing the surrounding temperature. Therefore, through proper setting the temperature, the same photomask can be used to form trenches and vias of dual damascene structures. Thus, some mask-making cost can be saved and errors due to mask misalignment can be avoided.

Abstract: The present invention describes a method and apparatus used in a substrate cleaning system wherein a substrate is placed into a first brush station while a chemical solution is delivered to the first brush station at a desired concentration level. The substrate is then scrubbed in the first brush station. After the substrate is scrubbed in the first brush station the substrate is transferred to a second brush station. The chemical solution used in the first brush station is then delivered to a brush in the second brush station in a ramp up manner in order to clean the brush in the second brush station. The delivery of the chemical solution to the second brush station is then stopped and deionized water is delivered to the second brush station. The substrate is then scrubbed using the deionized water in order to rinse the chemical solution from the substrate prior to transferring the substrate from the second brush station to another processing station.

Abstract: Disclosed is a SCSI host adapter for use in a computer system. The SCSI host adapter is configured to provide the computer system with interconnection with internal and/or external target devices. The SCSI host adapter includes a low voltage differential connector for interconnecting to a low voltage differential bus, and the low voltage differential bus is configured to communicate a first transaction. The SCSI host adapter also includes a single ended connector for interconnecting to a single ended bus, and the single ended bus is configured to communicate a second transaction. Furthermore, the SCSI host adapter includes a transceiver unit that is configured to interface between the low voltage differential bus and the single ended bus and produce a target information signal. The target information signal is configured to indicate whether the first transaction or the second transaction is occurring between the SCSI host adapter and the low voltage differential bus or the single ended bus.

Abstract: A chamber liner for use in a semiconductor process chamber and a semiconductor process chamber containing the chamber liner are disclosed. The process chamber includes a housing having an inner surface defining a chamber in which a vacuum is drawn during processing of a semiconductor wafer. The chamber liner has a plasma confinement shield with a plurality of apertures. An outer sidewall extends upwardly from the plasma confinement shield. An outer flange extends outwardly from the outer sidewall such that the outer flange extends beyond the chamber and into a space at atmospheric pressure. The chamber liner preferably further includes an inner sidewall that extends upwardly from the plasma confinement shield. The plasma confinement shield, the inner and outer sidewalls, and the outer flange are preferably integral with one another.

Abstract: A method for making a digital versatile disc (DVD) includes providing top and bottom substrates, each of the top and bottom substrates being disc-shaped and having a pitted surface. A reflective layer is formed over the pitted surface of the top substrate and a semireflective layer is formed over the pitted surface of the bottom substrate. A wetting promoter is applied over the reflective layer of the top substrate and, if desired, over the semireflective layer of the bottom substrate. The top and bottom substrates are bonded together with an adhesive material using a simple drop technique to form a DVD. The wetting promoter enhances wetting of the adhesive material on the bonded surfaces of the substrates.

Abstract: Disclosed is a method of making a reliable via hole in a semiconductor device layer, and a reliable via structure having internal wall surface layers that are hydrophobic, and thereby are non-moisture absorbing. The inner wall of the via structure has a layer of material having a characteristic of spin on glass (SOG), such that the characteristic is that the outer layer of the SOG oxidizes during photoresist ashing to form a surface layer of silicon dioxide in the via hole wall. In the method, the via structure is placed through a chemical dehydroxylation operation after the ashing operation, such that the layer of silicon dioxide in the via hole wall is converted into a hydrophobic material layer. The conversion is performed by introducing a halogen compound suitable for the chemical hydroxilation operation, wherein the halogen compound may be NH.sub.4 F or CCl.sub.4.

Abstract: A cleaning solution, method, and apparatus for cleaning semiconductor substrates after chemical mechanical polishing of copper films is described. The present invention includes a cleaning solution which combines deionized water, an organic compound, and a fluoride compound in an acidic pH environment for cleaning the surface of a semiconductor substrate after polishing a copper layer. Such methods of cleaning semiconductor substrates after copper CMP alleviate the problems associated with brush loading and surface and subsurface contamination.