Patents Represented by Attorney Martine & Penilla, LLP
  • Patent number: 6716299
    Abstract: An invention is provided for a retaining ring for use in a chemical mechanical planarization system. The retaining ring includes an annular retaining ring capable of holding a flatted wafer in position during a CMP operation. The flatted wafer has a first corner and a second corner disposed on a flatted edge of the wafer. Also included is a plurality of profiled teeth disposed along an interior surface of the annular retaining ring. The profiled teeth are separated from each other such that the first comer and the second corner of the wafer do not contact profiled teeth simultaneously at all orientations of the wafer in the retaining ring. In addition, a surface of each tooth that contacts the wafer is inclined so as to form an angle greater than 90° relative to a polishing surface and away from the center of the wafer.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: April 6, 2004
    Assignee: Lam Research Corporation
    Inventors: Yehiel Gotkis, Aleksander Owczarz, Jeffrey Yung
  • Patent number: 6718456
    Abstract: Disclosed herein is a apparatus and method for packing a 16-bit number into an 8-bit result byte. The method and apparatus utilize a parallel processing right shift circuit and a filter to obtain desired results. The parallel processes are comprised of a plurality of multiplexers capable of discretely analyzing smaller groups of bits. In this manner, higher throughput may be obtained than previously known.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: April 6, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Michael Ott
  • Patent number: 6711775
    Abstract: A method and a system are provided for cleaning a surface of a wafer. The method starts by scrubbing the surface of the wafer with a cleaning brush that applies a chemical solution to the surface of the wafer. In one example, the cleaning brush implements a through the brush (TTB) technique to apply the chemicals. The scrubbing is generally performed in a brush box, with a top cleaning brush and a bottom cleaning brush. The top cleaning brush is then removed from contact with the surface of the wafer. The chemical concentration in the top brush may be maintained at substantially the same concentration that was in the brush during the scrubbing operation. Next, a flow of water (preferably de-ionized water) is delivered to the surface of the wafer. The delivery of water is preferably configured to remove substantially all of the chemical solution from the surface of the wafer before proceeding to a next cleaning operation.
    Type: Grant
    Filed: June 10, 1999
    Date of Patent: March 30, 2004
    Assignee: Lam Research Corporation
    Inventors: Katrina A. Mikhaylich, Mike Ravkin, Don E. Anderson
  • Patent number: 6714612
    Abstract: An apparatus to overcome a metastable state in a communication system employing a common clock period includes a first latch and a second latch, the first latch being clocked by a clock signal and the second latch being clocked by an inverted version of said clock signal, each of the first and second latches receiving a data stream. A delay device delays the output of the second latch by one half of a cycle of the clock signal. A multiplexer outputs the output of the first latch when the received data stream does not exhibit metastability relative to the clock signal and outputs the output of the delay device in the presence of metastability. By latching the data according to the inverted clock, the data is not latched during state transitions thereof and metastability is avoided. The delay device re-synchronizes the latched data with the active edges of the clock signal.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: March 30, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Shailender Chaudry
  • Patent number: 6714949
    Abstract: A first file system configuration may be dynamically migrated (morphed) into a second file system configuration on an object-by-object basis. During the migration operation, objects (directories and files, data and metadata) may be accessed by client applications through, either the first or second file system configurations. That is, objects are transparently shared between co-active first and second file system configurations. Additionally, a file system morph operation already in progress may be canceled with all objects previously morphed to the second file system configuration returned to the first file system configuration.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: March 30, 2004
    Assignee: Adaptec, Inc.
    Inventor: Alexander H. Frey, Jr.
  • Patent number: 6712670
    Abstract: An apparatus for applying a wafer to a polishing belt during a CMP operation includes a spindle having an upper end and a lower end. A wafer carrier is coupled to the lower end of the spindle. A linear force generator is disposed at the upper end of the spindle. A load cell is positioned between the linear force generator and the upper end of the spindle. A controller is coupled to the load cell for controlling the force applied by the linear force generator. A method for applying downward force on a wafer during CMP also is described.
    Type: Grant
    Filed: December 27, 2001
    Date of Patent: March 30, 2004
    Assignee: Lam Research Corporation
    Inventors: Anthony de la Llera, Xuyen Pham, Andrew Siu, Tuan A. Nguyen, Tony Luong
  • Patent number: 6710833
    Abstract: A “Multi-domain Vertical Alignment Liquid Crystal Display” (MVA-LCD) with wide viewing angle is disclosed. The MVA-LCD includes an upper substrate, a lower substrate, a plurality of scan lines provided at the lower substrate in a matrix form and a plurality of data lines, as well as a plurality of pixel cells provided in the pixel areas. The MVA-LCD also includes a plurality of the first means provided in each pixel cell in a parallel form with spaces and a plurality of the second means provided at the upper substrate in a parallel and alternating form with respect to the first means. Moreover, the plurality of the first means and the corresponding plurality of the second means are disposed in a parallel and alternating form and are alternated with respect to each other in spaces. Therefore, the disclination lines are reduced, the transmittance is enhanced, and the response time is shortened.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: March 23, 2004
    Assignee: Hannstar Display Corporation
    Inventor: Yi-fang Wang
  • Patent number: 6709322
    Abstract: A CMP system and methods reduce a cause of differences between an edge profile of a chemical mechanical polished edge of a wafer and a center profile of a chemical mechanical polished central portion of the wafer within the edge. The wafer is mounted on a carrier surface of a wafer carrier so that a wafer axis of rotation is gimballed for universal movement relative to a spindle axis of rotation of a wafer spindle. A retainer ring limits wafer movement on the carrier surface perpendicular to the wafer axis. The retainer ring is mounted on and movable relative to the wafer carrier. A linear bearing is configured with a housing and a shaft so that a direction of permitted movement between the wafer carrier and the retainer ring is only movement parallel to the wafer axis, so that a wafer plane and a retainer ing may be co-planar.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: March 23, 2004
    Assignee: Lam Research Corporation
    Inventors: Miguel Angel Saldana, Damon Vincent Williams
  • Patent number: 6708242
    Abstract: The present invention provides methods for addressing an extended number of peripheral devices over a bus. A bus having an N-bit datapath is provided in a computer system. An extended address space is defined for a set of extended peripheral devices by assigning a bus ID to each extended peripheral device. Each bus ID includes a group ID and a group member ID. Each group ID and group member ID also indicates a priority of said associated device. One or more peripheral devices arbitrate for the bus. In this process, a peripheral device having the highest priority group ID and the highest priority group member ID among the arbitrating devices wins the arbitration. After arbitration, the winning device selects, for transferring data, a device by placing on the bus the bus IDs of the selecting and selected devices.
    Type: Grant
    Filed: August 9, 2000
    Date of Patent: March 16, 2004
    Assignee: Adaptec, Inc.
    Inventors: Charles A. Monia, Lawrence J. Lamers, Ebrahim Hashemi, Andrew J. Roy
  • Patent number: 6708309
    Abstract: A method and system for on-line proofing of documents, including the steps of sending by a client computer a document request to a document server computer, transmitting a proof document from the document server computer to the client computer in response to the document request, sending by the client computer an image data request to an image server computer, transmitting image data from the image server computer to the client computer in response to the image data request, and combining the image data with the proof document.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: March 16, 2004
    Assignee: Roxio, Inc.
    Inventor: Robert E. Blumberg
  • Patent number: 6702202
    Abstract: A fluid delivery device for delivering fluid to the backside of a substrate while minimizing waste. The device includes an inner cylindrical tube having a top opening and a bottom opening. An upper cap overlying a top portion of the inner cylindrical tube is included. The upper cap is moveably disposed over the inner cylindrical tube. The upper cap includes a top with at least one hole defined therein. The top includes a sidewall extending therefrom. A system and a method for reducing an amount of a cleaning chemistry applied to a backside of a wafer during a cleaning operation are also provided.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: March 9, 2004
    Assignee: Lam Research Corporation
    Inventors: John M. Boyd, Carl Woods
  • Patent number: 6697828
    Abstract: A method and apparatus for detecting leading zeros in a number represented by a plurality of four-bit nibbles, each nibble having an associated order of significance, said method comprising is disclosed. The leading zero detector calculates a leading zero count for each nibble in parallel, associates with each nibble count calculation a bit value inversely corresponding to the nibble's order of significance, and selects the nibble count calculation which corresponds to the highest order nibble without all zero values.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: February 24, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Michael Ott
  • Patent number: 6697800
    Abstract: A method of determining a relationship between a search item provided by a user and a plurality of objective items, wherein each objective item in the plurality includes a plurality of objective item properties and the search item includes one or more search item properties, the method comprising: grouping a subset of objective items based on an objective relationship between one or more of the plurality of objective item properties and the one or more search item properties; modifying the subset based on a subjective relationship, wherein the subjective relationship indicates an association between objective items in the subset and the search item, thereby calculating an affinity value between each objective item in the subset and the search item; and ranking the objective items in the modified subset based on the affinity value calculated.
    Type: Grant
    Filed: May 19, 2000
    Date of Patent: February 24, 2004
    Assignee: Roxio, Inc.
    Inventors: Jan F. Jannink, Thomas E. Schirmer, Narayanan Shivakumar
  • Patent number: 6693453
    Abstract: A re-programmable logic array includes at least one input and at least one output. An input capacitive device is coupled to the at least one input. Internal gating devices are coupled to the input capacitive device, and an output capacitive device is coupled to the internal gating devices and the at least one output. Signal generating circuitry for controlling the internal gating devices is further provided. The internal gating devices are designed to be controlled to establish a connection between one of the at least one input and one of the at least one output.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: February 17, 2004
    Assignee: Macronix International Co., Ltd.
    Inventors: Duo Sheng, Min Nan Yen, Ken Liou
  • Patent number: 6692534
    Abstract: The present invention provides an apparatus for booth decoding which stores the most significant bit of the lower half of the number used as the key for booth decoding. By using this stored bit to determine the rightmost booth group corresponding to the upper half of the key, booth decoding may be accomplished more quickly using an apparatus that is simpler and smaller than prior art assemblies.
    Type: Grant
    Filed: September 8, 1999
    Date of Patent: February 17, 2004
    Assignee: Sun Microsystems, Inc.
    Inventors: Yong Wang, Allan Tzeng
  • Patent number: 6688326
    Abstract: A locking fire hydrant includes a fire hydrant body having an outlet port, a valve access hole, and an outer surface with a recess defined therein. The recess is configured to receive a locking cap for closing off the outlet port and the valve access hole. A locking cap for closing off the outlet port and the valve access hole is mounted on the fire hydrant body such that the locking cap is received in the recess defined in the outer surface of the fire hydrant body. The recess shields an interface between the locking cap and the fire hydrant body from access by unauthorized tools. A fire hydrant body, a method for restricting unauthorized access to a fire hydrant, and a method for locking an auxiliary cap to a fire hydrant also are described.
    Type: Grant
    Filed: June 29, 2002
    Date of Patent: February 10, 2004
    Inventor: George Sigelakis
  • Patent number: 6691160
    Abstract: Methods for booting a computer from logically remote end nodes are provided. In one example, after a computer is powered up, a method validates end nodes that are logically remote from the computer. The method then communicates with a validated end node. The method determines what peripheral devices are attached to the validated end node and ascertains what boot images are available on the peripheral devices. A selection of a boot image from the peripheral device can then be made and the method proceeds to boot the computer. The booting process of the computer does not use a native BIOS/ROM of the computer, thus enabling the booting from any operating system, without regard to the type of hardware associated with the native BIOS/ROM. Further, the described methods enable booting from the storage of any end node on a network fabric.
    Type: Grant
    Filed: April 19, 2000
    Date of Patent: February 10, 2004
    Assignee: Adaptec, Inc.
    Inventor: Mark W. Bradley
  • Patent number: 6688727
    Abstract: Dot recording areas Rr1, Rr2, Rr3 in which dots are to be formed, and blank areas Rb1, Rb2 in which dots are not formed exist on the printing paper. When the recording of dots in dot recording area Rr2 is finished on the fourth pass, a positioning sub-scan feed of feed amount SSp1 is performed. In accordance with this positioning sub-scan feed SSp1, the print head is relatively sent to a relative position, where nozzle #1 is positioned above the 32nd line, which is the main scan line at the upper end of the third dot recording area. By carrying out a positioning sub-scan feed such as this, it is possible to shorten the time required for printing compared to when an inter-band sub-scan of a feed amount SSb1 of six dots is also executed in blank area Rb2.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: February 10, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Koichi Otsuki
  • Patent number: 6687399
    Abstract: A stereo synchronizing signal generator for liquid crystal shutter glasses is provided. The stereo synchronizing signal generator includes a signal generating unit to generate preliminary shuttering signals according to an image vertical synchronizing signals and a start signal. A signal delaying unit is provided to delay the preliminary shuttering signals according to a value, which can be changed by users. Then an output unit is provided to transmit the delayed shuttering signals to the liquid crystal shutter glasses. Due to that the signal generating unit generates a predetermined shuttering signal, such as right eye shuttering signal, at the rise edge of the start signal, the shuttering signals can always match up to the right image. Furthermore, the signal delaying unit can adjust the timing of the shuttering signal according to the value of the register, therefore the shuttering signals can always be synchronized with the image.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: February 3, 2004
    Assignee: Silicon Integrated Systems Corp.
    Inventors: Chien-tsung Chuang, Jen-min Yuan, Kwo-woei Yet
  • Patent number: 6686665
    Abstract: A package for semiconductor devices, and methods for making the same are provided. The package includes a low temperature co-fired ceramic body that has a plurality of conductive interconnect layers. The low temperature co-fired ceramic body includes at least one solder ball attach side. A plurality of solder ball attach pads are defined on the solder ball attach side(s) of the low temperature co-fired ceramic body. Each of the solder ball attach pads is in contact with a conductive via that is in electrical communication with at least one of the plurality of conductive interconnect layers, and each solder ball attach pad has metallic content that is limited to silver.
    Type: Grant
    Filed: September 4, 2002
    Date of Patent: February 3, 2004
    Assignee: Zeevo, Inc.
    Inventors: Guilian Gao, David John Lewis, Stephen Thomas Murphy