Patents Represented by Attorney Martine & Penilla, LLP
  • Patent number: 6750453
    Abstract: A source directs broadband modulated light into a region the free atmosphere in which target gas may be present. A gas correlation radiometer responds to light transmitted through the region. Separate radiometer channels respond to a single beam of light after transmission through the region. A beam splitter separates the beam into two beams, one directed into each of the channels. The two channels separately and simultaneously respond to a respective one of the light beams for separately and simultaneously generating signals that together indicate whether the target gas is in the free atmosphere. A method provides an optimal bandpass of an IR filter that filters the light before transmission to the radiometers. Another method uses a null factor in computing an output that determines the concentration of the target gas in the free atmosphere. Long distance detection embodiments may be borne by vehicles such as trucks or aircraft.
    Type: Grant
    Filed: May 25, 2002
    Date of Patent: June 15, 2004
    Assignee: Ophir Corporation
    Inventors: Loren D. Nelson, Martin J. O'Brien
  • Patent number: 6751792
    Abstract: A new method and apparatus for use in post compilation optimizers is presented. The present invention is based on the use of a new graphical representation of code in a linked program called an operands graph. An operands graph combines the best evaluative features of flow graphs in single static-assignment (SSA) form and of value range optimizations. The result is a new ability to evaluate and optimize previously hidden code segments, including code segments only reachable from the various branches of a mutliway branch instructions.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: June 15, 2004
    Assignee: Sun Microsystems, Inc.
    Inventor: Sreekumar Ramakrishnan Nair
  • Patent number: 6751693
    Abstract: The present invention provides a method for assigning addresses to expanded devices in a computer I/O subsystem, which has one or more buses. Each bus has an N-bit data bus for communication. One or more types of expanded devices are provided in the computer I/O subsystem and are coupled to one or more peripheral buses. An expanded address space is defined for the one or more types of expanded devices by partitioning an N-bit data bus into a pair of fields that includes an expanded ID field and an expanded signature field. An address is assigned to each of the expanded devices by assigning an expanded signature to each type of the expanded devices. In addition, an expanded ID is assigned to each expanded device within each type of the expanded devices, wherein more than two bits are asserted in the address.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: June 15, 2004
    Assignee: Adaptec, Inc.
    Inventors: Charles A. Monia, John S. Packer
  • Patent number: 6749491
    Abstract: An apparatus for reducing non-uniform stretch of a belt used in the CMP system is disclosed. The belt that may be used with the apparatus extends between a first roller and a second roller to define a belt loop with an inner surface and an outer surface to be used for CMP. The apparatus includes a compensating roller that has a first end and a second end where the first end and second end extends a width of the belt. The first end and the second end have a first diameter. The center of the roller has a second diameter that is less than the first diameter. The compensating roller has a symmetrically tapered shape that extends between each of the first end and second end to the center. The compensating roller is positioned inside of the belt loop, and is applied to the inner surface of the belt loop to reduce non-uniform stretch of the belt.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: June 15, 2004
    Assignee: Lam Research Corporation
    Inventors: Yehiel Gotkis, David Wei, Aleksander Owzarz
  • Patent number: 6750155
    Abstract: A chamber for transitioning a semiconductor substrate between modules operating at different pressures is provided. The chamber includes a base defining an outlet. The outlet permits removal of an atmosphere within the chamber to create a vacuum. A substrate support for supporting a semiconductor substrate within the chamber is included. A chamber top having an inlet is included. The inlet is configured to allow for the introduction of a gas into the chamber to displace moisture in a region defined above the substrate support. Sidewalls extending from the base to the chamber top are included. The sidewalls include access ports for entry and exit of a semiconductor substrate from the chamber. A method for conditioning an environment above a region of a semiconductor substrate within a pressure varying interface is also provided.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: June 15, 2004
    Assignee: Lam Research Corporation
    Inventors: Harlan I. Halsey, David E. Jacob
  • Patent number: 6748961
    Abstract: A wafer preparation module is provided. The wafer preparation module includes an enclosure, which contains wafer engaging rollers. The wafer engaging rollers are oriented at an angle and are designed to spin a wafer at an angle during preparation.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: June 15, 2004
    Assignee: Lam Research Corporation
    Inventor: Randolph E. Treur
  • Patent number: 6749483
    Abstract: In a method for determining an endpoint in a chemical mechanical planarization (CMP) operation, the concentration of an oxidizing agent in the slurry byproduct generated during the CMP operation is monitored. The endpoint of the CMP operation is determined based on the concentration of the oxidizing agent in the slurry byproduct. The concentration of the oxidizing agent in the slurry byproduct may be monitored by diverting the slurry byproduct from a surface of a polishing pad, and measuring an optical property of the slurry byproduct diverted from the surface of the polishing pad. A CMP system configured to implement the method for determining an endpoint also is described.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: June 15, 2004
    Assignee: Lam Research Corporation
    Inventor: Joseph P. Simon
  • Patent number: 6747385
    Abstract: A motor structure includes a stator and a rotor. The stator includes a coil assembly which includes a ring-shaped slot having an inner periphery on its inner side and an outer periphery on its outer side away from the inner periphery, a plurality of first teeth mounted around the inner periphery of the ring-shaped slot, and a plurality of second teeth mounted around the outer periphery of the ring-shaped slot; wherein each of the first teeth is arranged to partly fall behind or exceed the corresponding one of the second teeth, and a coil wound in the ring-shaped slot. The rotor includes a circular magnet located above the coil.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: June 8, 2004
    Assignee: Delta Electronics, Inc.
    Inventors: Wen-shi Huang, Kuo-cheng Lin, Chu-hsien Chou, Ming-shi Tsai
  • Patent number: 6747283
    Abstract: An invention is provided for detecting an endpoint during a chemical mechanical polishing (CMP) process. A reflected spectrum data sample is received that comprises a plurality of values corresponding to a plurality of spectrums of light reflected from an illuminated portion of a surface of a wafer. The reflected spectrum data sample is decomposed into noise sub-space values and signal sub-space values, and the noise sub-space values are truncated. In addition, outside spectrum data is extrapolated using a linear combination of the values of the reflected spectrum data sample. In this manner, an endpoint can be determined based on optical interference occurring in the reflected spectrum data.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: June 8, 2004
    Assignee: Lam Research Corporation
    Inventor: Sundar Amartur
  • Patent number: 6747521
    Abstract: An analog memory cell that may be incorporated into a low power oscillator is provided. The analog memory cell stores an analog voltage as a digital signal and converts the digital signal back to an analog voltage to allow continued generation of an accurate constant output voltage regardless of temperature-dependent leakage currents associated with parasitic diodes and non-ideal devices. The accurate constant output voltage provided by the analog memory cell may be used by the low power oscillator to generate an accurate low frequency output signal. This accurate low frequency output signal may be used to maintain long-term timing accuracy in host devices during sleep modes of operation. Incorporation of the analog memory cell in the low power oscillator is fully implementable in a CMOS process.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: June 8, 2004
    Assignee: Zeevo, Inc.
    Inventor: Stephen Allott
  • Patent number: 6748459
    Abstract: An invention is disclosed that maps a Fibre Channel address to a Small Computer System Interface (SCSI) address. A data port is detected on a computer network system and a port target identifier is assigned to the detected data port. Next, a device coupled to the data port is detected and a logical unit identifier is assigned to the detected device. In addition, an Arbitrated Loop Physical Address (AL_PA) is obtained for the device. Further, an address database is constructed that includes a device entry for the detected device. The device entry includes the port target identifier and the logical unit identifier that were assigned to the data port and device. In addition, the device entry associates the AL_PA to the port target identifier and the logical unit identifier of the device.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: June 8, 2004
    Assignee: Adaptec, Inc.
    Inventors: Shing Mark Lin, Yen-Chung Lin
  • Patent number: 6743661
    Abstract: An apparatus and method for flexibly bonding an integrated circuit package to a printed circuit board are provided. The apparatus includes a semiconductor having first and second sides, where the first side defines an inner region and peripheral region. The inner region is surrounded by the peripheral region. An interposer having a substantially similar coefficient of thermal expansion to the semiconductor is included. A dielectric region surrounding the interposer is included. The dielectric region is configured to be partially elastic. A plurality of posts extends transversely through the dielectric region. The post have first and second ends where the first end is configured to be attached to the peripheral region of the semiconductor chip. The second ends of the posts are configured to be attached to an external assembly, wherein the posts are able to absorb stress due to a thermal expansion mismatch between the external assembly and the interposer.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: June 1, 2004
    Assignee: Novellus Systems, Inc.
    Inventor: John Stephen Drewery
  • Patent number: 6745226
    Abstract: A system for transmitting digital data to an active desktop of a user with push pull functionality, the system comprising a digital data transmitter operative to transmit the digital data to the active desktop in blocks which are sequentially transmitted to the active desktop, each block being an incomplete collection of data and being viewable even when less than all of the blocks have been received, receipt of subsequent blocks by the receiver serving to cumulatively improve the quality of the digital data received by the receiver, at least one but not all of the blocks being transmitted to the active desktop in a push manner, and at least one of the remaining blocks being transmitted to the active desktop in a pull manner, when specifically actuated by the user. A method is also described and claimed.
    Type: Grant
    Filed: May 2, 1997
    Date of Patent: June 1, 2004
    Assignee: Roxio, Inc.
    Inventor: Jacob Leon Guedalia
  • Patent number: 6742137
    Abstract: An electronic storage system, such as a file system, may include a storage access routine to store data objects. Data objects stored in the system have an entry in an object index that may be maintained by the storage access routine. The object index includes fault tolerance metadata for each data object that specifies the fault tolerance techniques used in storing a data object, such as a particular RAID level. The fault tolerance metadata maintained for each object allows different data objects to be stored with different fault tolerance techniques on the same storage volume. Additionally, the metadata for a data object may be modified in order to store the object using different fault tolerance techniques.
    Type: Grant
    Filed: August 17, 1999
    Date of Patent: May 25, 2004
    Assignee: Adaptec, Inc.
    Inventor: Alexander H. Frey, Jr.
  • Patent number: 6742023
    Abstract: The invention contained herein describes a use-sensitive system for distribution of data files between users in a networked community of users. The system comprises each user having a distribution application that has at least one data file repository that has the ability to store at least one data file. The distribution application additionally includes a data file transfer server which makes available all data files located in the data file repository for download by other users, a file transfer client, and a user interface for displaying the actions and status of the distribution application to the user. In the system the file transfer client connects to the file transfer server and downloads a data file, and when the downloaded file is placed in the repository, the distribution application automatically makes available the downloaded data file to other distribution applications in the community of users.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: May 25, 2004
    Assignee: Roxio, Inc.
    Inventors: Shawn Fanning, John Fanning, Edward Kessler
  • Patent number: 6736720
    Abstract: Apparatus and methods control the temperature of a wafer for chemical mechanical polishing operations. A wafer carrier has a wafer mounting surface for positioning the wafer adjacent to a thermal energy transfer unit for transferring energy relative to the wafer. A thermal energy detector is oriented adjacent to the wafer mounting surface for detecting the temperature of the wafer. A controller is responsive to the detector for controlling the supply of thermal energy relative to the thermal energy transfer unit. Embodiments include defining separate areas of the wafer, providing separate sections of the thermal energy transfer unit for each separate area, and separately detecting the temperature of each separate area to separately control the supply of thermal energy relative to the thermal energy transfer unit associated with the separate area.
    Type: Grant
    Filed: December 26, 2001
    Date of Patent: May 18, 2004
    Assignee: Lam Research Corporation
    Inventors: Nicolas Bright, David J. Hemker
  • Patent number: 6738821
    Abstract: An Ethernet storage protocol (ESP) enabled network is provided. The network includes a host computer having host interface circuitry for communicating data in an Ethernet network, and the host interface circuitry is configured to receive parallel data from the host computer provided in accordance with a peripheral device protocol, serialize the parallel data, and encapsulate the serialized parallel data into Ethernet frames for transmission over the Ethernet network. The network also includes a target having target interface circuitry for communicating data in the Ethernet network. The target interface circuitry is configured to receive the encapsulated serialized parallel data and reconstruct the serialized parallel data into the peripheral device protocol. The peripheral device protocol is one of a SCSI protocol, an ATAPI protocol, and a UDMA protocol.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: May 18, 2004
    Assignee: Adaptec, Inc.
    Inventors: Andrew W. Wilson, Paul J. von Stamwitz, Laurence B. Boucher
  • Patent number: 6733596
    Abstract: A method for cleaning top and bottom surfaces of a semiconductor substrate is provided. The method includes scrubbing top and bottom surfaces of the semiconductor wafer with top and bottom brushes, respectively. Top and bottom brushes are saturated and supplied with a scrubbing fluid. The top and bottom brushes are squeezed so as to press out excess scrubbing fluid by continuing to apply top and bottom brushes against top and bottom surfaces of the semiconductor substrate, respectively, but without supplying the scrubbing fluid. Top and bottom brushes are respectively moved away from the top and bottom surfaces of the semiconductor substrate. The top brush is rotated so as to prevent dripping onto the top surface of the semiconductor substrate. Top and bottom surfaces of the semiconductor substrate are rinsed using a rinse fluid while continuing to rotate the top brush that was squeezed to press out the excess scrubbing fluid.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: May 11, 2004
    Assignee: Lam Research Corporation
    Inventors: Katrina Mikhaylichenko, Michael Ravkin
  • Patent number: 6732017
    Abstract: A chemical mechanical planarization (CMP) system includes a point of use chemical mixing system. The point of use chemical mixing system includes a first and a second pump, a first and a second flow sensor, a mixer and a controller. The first pump has an input coupled to a first chemical supply and the first flow sensor coupled to the output of the first pump. The second pump has an input coupled to a second chemical supply and the second flow sensor coupled to the output of the second pump. The mixer has inputs coupled to the output of the first and second flow sensors. The controller is configured to receive signals from the first and second flow sensors and to produce control signals for the first and second pumps and the mixer. The controller is further configured to cause a mixture of the first and second chemicals upon a demand from the CMP process.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: May 4, 2004
    Assignee: Lam Research Corp.
    Inventors: Xuyen Pham, Tuan Nguyen, Vien Quach, Ren Zhou
  • Patent number: D490383
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: May 25, 2004
    Assignee: Delta Electronics, Inc.
    Inventors: Li-Kuang Tan, Yu-Hung Huang, Kuo-Cheng Lin, Wen-Shi Huang