Patents Represented by Attorney McGinn & Gibb, PLLC
  • Patent number: 6823187
    Abstract: This mobile station comprises a circuit for repeating measurement of the received power of the carrier frequencies being transmitted from the base station of 1 and/or the received power of the carrier frequencies being used by another cellular system, a circuit for reporting the result of measurement to the base station of 1, a circuit for changing the carrier frequencies for use in communication according to the notification from the base station of 1, and a circuit for changing the frequency of measurement.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: November 23, 2004
    Assignee: NEC Corporation
    Inventor: Kojiro Hamabe
  • Patent number: 6823415
    Abstract: A computer system, includes a mobile computer, a docking station for receiving the mobile computer, a bridge having a first side coupled to the mobile computer and a second side coupled to the docking station, and a flat panel display formed with the docking station for being coupled to the mobile computer via the docking station. The docking station includes a dock housing coupled to a desktop display and including a first bus, and a bridge coupled between the first bus and a second bus, the first bus residing in the dock housing and the second bus for being coupled to the mobile computer.
    Type: Grant
    Filed: August 7, 2000
    Date of Patent: November 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Sameh W. Asaad, Nicholas R. Dono, Ernest Nelson Mandese, Bengt-Olaf Schneider, Kevin W. Warren
  • Patent number: 6822704
    Abstract: An active matrix liquid crystal display device which has color filters disposed on a TFT (Thin-Film Transistor) substrate, and which reduces the effect of light leakage regions over data lines for an increased viewing angle. The liquid crystal display device has the data lines disposed on the TFT substrate at respective gaps between adjacent two of pixel electrodes, for supplying data signals to TFTs to drive pixel electrodes, and a black matrix disposed on the TFT substrate in association with the data lines for blocking light passing in a predetermined viewing angle range through a light leakage region created in the liquid crystal layer depending on a potential difference between adjacent two of the pixel electrodes.
    Type: Grant
    Filed: June 1, 2001
    Date of Patent: November 23, 2004
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Michiaki Sakamoto, Muneo Maruyama, Yuji Yamamoto, Mamoru Okamoto
  • Patent number: 6823261
    Abstract: A monitor system of a vehicle includes an image-measured distance detector for detecting a distance data between a vehicle and a three-dimensional object based on information of an image in front of the vehicle, a laser-measured distance detector for detecting the distance data between the vehicle and the object by projecting a laser beam from the vehicle, and a three-dimensional object recognition device for recognizing the object based on the distance data detected by the image-measured distance detector and the distance data detected by the laser-measured distance detector. The three-dimensional object recognition device recognizes the object by coordinating the distance data and by making the distance data of a horizontal direction ineffective, when the two sets of distance data have a width within a present value and the difference between the distance values of the two sets of distance data is within a preset distance value.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: November 23, 2004
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventor: Hiroyuki Sekiguchi
  • Patent number: 6820240
    Abstract: A method and structure for designing an integrated circuit chip supplies a chip design and partitions elements of the chip design according to similarities in voltage requirements and timing of power states of the elements to create voltage islands. The invention outputs a voltage island specification list comprising power and timing information of each voltage island; and automatically, and without user intervention, synthesizes power supply networks for the voltage islands.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: November 16, 2004
    Assignee: International Business Machines Corporation
    Inventors: Thomas R. Bednar, Scott W. Gould, David E. Lackey, Douglas W. Stout, Paul S. Zuchowski
  • Patent number: 6819967
    Abstract: A system and method for reserving manufacturing capacity to satisfy a customer deliverable order for a product. The system and method uses a relational database tool adapted to receive said customer deliverable order; and a product manager tool operatively connected to said relational database tool, said product manager tool being adapted to obtain a block of part numbers from unallocated part numbers and to supply said block of part number to said relation database.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: November 16, 2004
    Assignee: International Business Machines Corporation
    Inventors: Donald F. Ballas, Jeanne P. S. Bickford, Thomas R. Maheux, Paul G. McLaughlin, Donald L. Poulin
  • Patent number: 6818992
    Abstract: A method for forming a semiconductor structure includes supplying a structure having an exposed last metalization layer, cleaning the last metalization layer, forming a silicide in a top portion of the last metalization layer and forming a terminal over the silicide.
    Type: Grant
    Filed: September 21, 2000
    Date of Patent: November 16, 2004
    Assignee: International Business Machines Corporation
    Inventors: Douglas S. Armbrust, Margaret L. Gibson, Laura Serianni, Eric J. White
  • Patent number: 6817538
    Abstract: A system and method for detecting parallel marketing of an item, include forming at least one of a coating and a code on the item, interrogating the at least one of the coating and said code, and determining from the interrogating whether the item has been transferred from an authorized merchant to an unauthorized merchant.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: November 16, 2004
    Assignee: International Business Machines Corporation
    Inventors: Ali Afzali-Ardakani, Claudius Feger, Marco Martens, Paul Andrew Moskowitz, Alejandro Gabriel Schrott, Charles P. Tresser, Robert Jacob von Gutfeld
  • Patent number: 6817435
    Abstract: A hood hinge structure for hinge connecting together a hinge lower to be fixed to a body and a hinge upper to be fixed to a hood at a hinge axial center, the engine room side of the vehicle body serving as the fixing portion of the hinge lower is formed as a stepped portion which is situated on the lower side, and the fixing portion of the hinge upper is disposed such that it is opposed to the stepped portion. In this structure, even in case where the head of a pedestrian is butted against the hood in the vicinity of the hinge portion due to a collision, the hinge portion is deformed within a relatively long shock-absorbing stroke formed between the hinge portion and stepped portion formed on the engine room side of the vehicle body to thereby be able to absorb the shock sufficiently.
    Type: Grant
    Filed: November 7, 2001
    Date of Patent: November 16, 2004
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventor: Akihide Takeuchi
  • Patent number: 6818926
    Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).
    Type: Grant
    Filed: March 20, 2003
    Date of Patent: November 16, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Norikatsu Koide
  • Patent number: 6818991
    Abstract: The present invention provides an electrically conductive layer comprising a copper alloy which includes at least one of Ag, As, Bi, P, Sb, Si, and Ti in the range of not less than 0.1 percent by weight to not more than a maximum solubility limit to copper, so that the copper alloy is in a solid solution and/or which includes at least one of Mo, Ta and W in a range of not less than 0.1 percent by weight to not more than 1 percent by weight.
    Type: Grant
    Filed: June 1, 2000
    Date of Patent: November 16, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Kuniko Kikuta
  • Patent number: 6819311
    Abstract: The provision of a liquid crystal display driving process which prevents the appearance of motion blur without any increase in circuit size or any reduction in panel numerical aperture. A driving process for a liquid crystal display in which a plurality of scanning lines 2 and a plurality of signal lines 3 are disposed in a grid like arrangement, and display of an image corresponding with image data is performed by selecting any one of the scanning lines 2 at one time, and altering the state of a liquid crystal via the signal line 3, wherein an image data selection period t1 and a black display selection period t2 are set within a time frame shorter than the time necessary for scanning any one of the aforementioned scanning lines 2, and an image corresponding with the aforementioned image data is displayed via the aforementioned signal line 3 during the image data selection period t1, and a monochromatic image is displayed via the aforementioned signal line 3 during the black display selection period t2.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: November 16, 2004
    Assignee: NEC Corporation
    Inventors: Takashi Nose, Hiroshi Hayama
  • Patent number: 6819978
    Abstract: A robot is provided, wherein it is possible to reduce incorrect identification in the case of executing face identification in a place where lighting variations are large such as in a house and in a place where there exists a lighting environment that is bad for identification. A face area of a person is detected from an image picked up at an imaging means and stored, and a face detecting and identifying means identifies a person using face image information stored before then. An identification result reliability calculating means calculates, using information from the imaging means, whether or not a present lighting state is suitable for face identification. When the result of calculation indicates that the lighting state is not suitable for face identification, the robot is moved by a moving means. Thereby, incorrect identification can be reduced.
    Type: Grant
    Filed: December 3, 2002
    Date of Patent: November 16, 2004
    Assignee: NEC Corporation
    Inventor: Junichi Funada
  • Patent number: 6815325
    Abstract: A test method for a semiconductor device in which a bonding pad thereof comprises a first interconnect layer and a second interconnect layer, the bonding pad comprising: a plurality of connection parts, provided within a plurality of slit-shaped trenches formed in an interlayer insulation film, respectively, and connecting the first interconnect layer and the second interconnect layer, the connection parts being disposed in one direction with a prescribed spacing, wherein the method comprising; contacting a test probe for testing the semiconductor device with the bonding pads so as to be in a direction parallel to a longitudinal direction of the connection part.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: November 9, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Junya Ishii
  • Patent number: 6816756
    Abstract: A paint film thickness predicting method for an actual car, which predicts a paint film thickness of an object car in an actual car state, an electrodeposition coating being applied to the object car by using an electrodeposition coating line, has a calculating an analyzed value of the paint film thickness of a constituent member constituting a part of the object car by executing electrodeposition coating analysis by using a computer, and a predicting the paint film thickness of the object car in the actual car state from the analyzed value of the paint film thickness by the computer, wherein the correlation predicting expression stipulates a correlation between the paint film thickness of a mass-produced car in the actual car state and an analyzed value of the paint film thickness of the constituent member.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: November 9, 2004
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventors: Kenei Shin, Toru Komoriya
  • Patent number: 6816120
    Abstract: A cylindrical reflector having a through hole in conformity with the shape of an elemental portion is fitted to the elemental portion in a LAN antenna in which the elemental portion encloses a linear conductor therein and projects from a base table, and further, the reflector is turned to be set at a position at which the directivity is formed in a specific direction. A flat plate or a curved plate forming a reflecting surface of the reflector is arbitrarily set, thus forming a desired radiation pattern of a beam.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: November 9, 2004
    Assignee: NEC Corporation
    Inventor: Akio Kuramoto
  • Patent number: 6816175
    Abstract: The present invention relates to means and a method executable by a computer system for navigation within a tree structure with leaf nodes representing arbitrary types of objects, i.e. of related data treated as a unit. According to the current teaching a travel point representation step is suggested, wherein after selection of at least one non-leaf node as travel point only the path and non-leaf nodes in said tree structure from said travel point to the root of said tree structure is represented in a tree view area. Moreover the complete sub-tree of said travel point is represented in said tree view area. In addition or alternatively after selection of said travel point, a travel box is represented for said travel point, said travel box representing object identifications of all objects of all leaf nodes in said sub tree of said travel point.
    Type: Grant
    Filed: September 15, 1999
    Date of Patent: November 9, 2004
    Assignee: International Business Machines Corporation
    Inventors: Birgit Hamp, Adrian Mueller, Frank Neumann, Annette Opalka, Roland Seiffert
  • Patent number: 6817013
    Abstract: An optimization method and apparatus for converting source code for a program written in a programming language into machine language. The program includes a basic block as a unit to estimate an execution time for the program to be processed, generating a nested tree that represents the connections of the basic blocks using a nesting structure, when a conditional branch is accompanied by a node in the nested tree, employing the execution time estimated by using the basic blocks as units to obtain an execution time at the node of the program when a conditional branching portion of a program is directly executed and when the conditional branching portion is executed in parallel, and defining the node as a parallel execution area group when the execution time required for the parallel execution is shorter or dividing multiple child nodes of the nodes into multiple parallel execution areas.
    Type: Grant
    Filed: October 4, 2001
    Date of Patent: November 9, 2004
    Assignee: International Business Machines Corporation
    Inventors: Kunio Tabata, Hideaki Komatsu
  • Patent number: 6815281
    Abstract: In a DRAM-incorporated semiconductor device (SOC) which has a DRAM section and a logic section being formed on one and the same substrate, with the object of providing, with low cost, a SOC having necessary and sufficient characteristics in the DRAM section, while attaining higher-speed performance of the whole elements, silicide is formed at least on all the surfaces of the source-drain regions (10) and the gate surfaces (6) of transistors in the DRAM section and the logic section, concurrently in one and the same step.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: November 9, 2004
    Assignee: NEC Electronics Corporation
    Inventors: Ken Inoue, Masayuki Hamada
  • Patent number: D498414
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: November 16, 2004
    Assignee: Piolax Inc.
    Inventor: Akira Yoneoka