Patents Represented by Attorney McGinn & Gibb, PLLC
  • Patent number: 6836867
    Abstract: A method of generating a pattern for testing a logic circuit includes judging whether generation of a test pattern is to be undertaken. If it is judged that generation of a test pattern is to be undertaken, a fault is selected for which the test pattern is to be generated. Generation is attempted of at least one test pattern necessary for detecting the selected fault. Fault simulation is carried out to find a test pattern, from among copies of the at least one test pattern, by which the most undetected faults are detected. If at least one test pattern is generated, the test pattern is re-activated.
    Type: Grant
    Filed: September 13, 2001
    Date of Patent: December 28, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Hirofumi Yonetoku
  • Patent number: 6833595
    Abstract: In a semiconductor device in which first and second transistors are configured so as to have the same electric characteristics as each other, a dummy gate is arranged between the first and second transistors in parallel to gates of the first and second transistors, and arrangement of source and drain regions formed on both sides of the gate of the first transistor, and arrangement of source and drain regions formed on both sides of the gate of the second transistor are the same as each other.
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: December 21, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Ritsuko Iwasaki
  • Patent number: 6833566
    Abstract: A light emitting diode has a substrate having a heat radiation conductive member therein, and a light emitting element mounted on the substrate. At least a part of the light emitting element is directly brought into contact and electrically connected with the heat radiation conductive member.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: December 21, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yoshinobu Suehiro, Hideaki Kato, Kunihiro Hadame
  • Patent number: 6834254
    Abstract: When a vehicle travels on an approximately straight lane, a distance data diagnosing section determines a distance measuring capability in a survey area in which the field of view of a laser radar overlaps that of an image as to a three-dimensional object. Then, the distance data diagnosing section determines whether or not the image-measured (laser-measured) distance data of the three-dimensional object exists, and when the image-measured (laser-measured) distance data thereof does not exist, the three-dimensional object is counted to the number of three-dimensional objects without image (without laser radar) and calculates three-dimensional object non-detecting ratios of image (laser radar) from the total number of three-dimensional objects to be determined and the number of three-dimensional objects without image (without laser radar).
    Type: Grant
    Filed: November 14, 2002
    Date of Patent: December 21, 2004
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventor: Hiroyuki Sekiguchi
  • Patent number: 6834155
    Abstract: An image regeneration device for reading out code data of each frame of a moving picture from a record medium, regenerating image data of the frames according to a standard such as MPEG, and transferring the regenerated image data of the frames to a display device which displays the frames in order of reception is presented. The image regeneration device comprises a reading section, a buffer section and a regeneration section. The reading section reads out the code data of the frames and additional information with regard to the code data from sectors of the record medium and stores them in the buffer section. The regeneration section reads out the code data and the additional information from the buffer section, regenerates image data of each frame using the code data according to the standard, and transfers the regenerated image data of the frames to the display device according to a predetermined display order rule.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: December 21, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Atsushi Taniguchi
  • Patent number: 6834165
    Abstract: An optical receiver circuit including a plurality of PIN diodes, each associated with a dedicated element transimpedance amplifier, the outputs of the element transimpedance amplifiers being connected to a summing amplifier which sums the voltages output from the element transimpedance amplifiers. The optical receiver circuit provides the same output voltage value as a single large PIN diode having an active area comparable to the sum of the active areas of the smaller PIN diodes, and thus has the same high sensitivity as the single large PIN diode but a much wider bandwidth.
    Type: Grant
    Filed: January 31, 2001
    Date of Patent: December 21, 2004
    Assignee: International Business Machines Corporation
    Inventor: Kai D. Feng
  • Patent number: 6831726
    Abstract: In a liquid crystal display panel, by adhering the TFT substrate 1 to the color filter (CF) substrate 2 such that the repeating direction of thickness distribution or irregularity distribution of the TFT substrate 1 becomes orthogonal to the repeating direction of thickness distribution or irregularity distribution of the CF substrate 2, a distance between a point at which the thick portion of the TFT substrate 1 overlaps on the thick portion of the CF substrate 2 and a point at which the thin portion of the TFT substrate 1 and the thin portion of the CF substrate 2 are overlapped becomes larger than that in a case where the substrates are adhered each other with the repeating directions thereof being trued up. Therefore, the factor defective of the liquid crystal display panel caused by the overlapping of the thick portions and the overlapping of the thin portions of the substrates, that is, the factor defective of the liquid crystal display panel caused by variation of display, can be reduced.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: December 14, 2004
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Yoshinori Aoyagi, Yuji Tanaka, Hironori Shiba
  • Patent number: 6830354
    Abstract: A relatively small-diameter aperture fluorescent lamp is manufactured easily with high yield and at low cost. An aperture portion is formed in a manner that a thread-like member is inserted into a glass tube having an ultraviolet ray reflection layer and a phosphor layer formed on its inner surface, the glass tube is bent in a predetermined shape by using a bending jig, the thread-like member is pressed to the phosphor layer formed in a predetermined region in the bending member side of the glass tube while both ends thereof are pulled tight, the thread-like member is reciprocated, and phosphor of the phosphor layer in this region is exfoliated.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: December 14, 2004
    Assignee: NEC LCD Technologies, Ltd.
    Inventor: Shin-Ichirou Ono
  • Patent number: 6831305
    Abstract: A group III nitride compound semiconductor light-emitting element of a flip chip bonding type for emitting light with a wavelength not longer than 400 nm is coupled to a Zener diode, and the light-emitting element and the Zener diode coupled to each other are sealed with a metal casing having a window.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: December 14, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Takemasa Yasukawa, Toshiya Uemura, Hideki Mori
  • Patent number: 6832105
    Abstract: A portable cellular phone and a method for displaying image data which enables simplified control on displaying data on a screen of the portable cellular phone. The portable cellular phone is so configured as to use information packaged data constructed by combining data to be displayed with appended data used to provide instructions for displaying data and so that its main control section performs specified displaying operations in response to instructions contained in the appended data and a display section displays the data.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: December 14, 2004
    Assignee: NEC Corporation
    Inventor: Tsutomu Okawa
  • Patent number: 6830992
    Abstract: Disclosed herein are (1) a light-emitting semiconductor device that uses a gallium nitride compound semiconductor (AlxGa1−xN) in which the n-layer of n-type gallium nitride compound semiconductor (AlxGa1−xN) is of double-layer structure including an n-layer of low carrier concentration and an n+-layer of high carrier concentration, the former being adjacent to the i-layer of insulating gallium nitride compound semiconductor (AlxGa1−xN); (2) a light-emitting semiconductor device of similar structure as above in which the i-layer is of double-layer structure including an iL-layer of low impurity concentration containing p-type impurities in comparatively low concentration and an iH-layer of high impurity concentration containing p-type impurities in comparatively high concentration, the former being adjacent to the n-layer; (3) a light-emitting semiconductor device having both of the above-mentioned features and (4) a method of producing a layer of an n-type gallium nitride compound semic
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: December 14, 2004
    Assignees: Toyoda Gosei Co., Ltd., Nagoya University, Japan Science and Technology Corporation
    Inventors: Katsuhide Manabe, Akira Mabuchi, Hisaki Kato, Michinari Sassa, Norikatsu Koide, Shiro Yamazaki, Masafumi Hashimoto, Isamu Akasaki
  • Patent number: 6832367
    Abstract: A method for recording and replaying execution of distributed programs on a computer system in a distributed environment, includes identifying an execution order of critical events of a program, generating groups of critical events of the program, wherein for each group, critical events belonging to the group belong to a common execution thread, and generating for each execution thread a logical thread schedule that identifies a sequence of the groups so as to allow deterministically replaying a non-deterministic arrival of stream socket connection requests, a non-deterministic number of bytes received during message reads, and a non-deterministic binding of stream sockets to local ports.
    Type: Grant
    Filed: March 6, 2000
    Date of Patent: December 14, 2004
    Assignee: International Business Machines Corporation
    Inventors: Jong-Deok Choi, Ravi Konuru, Harini Srinivasan
  • Patent number: 6831014
    Abstract: A method of manufacturing a semiconductor apparatus includes the step (a) to the step (f). In the step (a), an insulation film is formed on a semiconductor substrate. In the step (b), a wiring trench is formed which extends to the insulation film. In the step (c), a first conductive film is formed which covers an inner surface of the wiring trench and covers the insulation film. In the step (d), a second conductive film is formed which fills the wiring trench and covers the first conductive film. In the step (e), the second conductive film is removed by chemical mechanical polishing (CMP) until a surface of the first conductive film is exposed. In the step (f), a surface of the second conductive film is polished by using a first solution such that a first protective film for protecting the second conductive film is formed. In the step (g), the first conductive film and the second conductive film is removed by CMP until a surface of the insulation film is exposed.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: December 14, 2004
    Assignee: NEC Electronics Corporation
    Inventor: Yasuaki Tsuchiya
  • Patent number: 6830948
    Abstract: By using a mask 4, a first Group III nitride compound semiconductor layer 31 is etched, to thereby form an island-like structure such as a dot-like, striped-shaped, or grid-like structure, so as to provide a trench/post. Thus, without removing the mask 4 formed on a top surface of the upper layer of the post, a second Group III nitride compound layer 32 can be epitaxially grown, vertically and laterally, with a sidewall/sidewalls of the trench serving as a nucleus, to thereby bury the trench and also grow the layer in the vertical direction. The second Group III nitride compound layer 32 does not grow epitaxially on the mask 4. In this case, propagation of threading dislocations contained in the first Group III nitride compound semiconductor layer 31 can be prevented in the upper portion of the second Group III nitride compound semiconductor 32 that is formed through lateral epitaxial growth and a region having less threading dislocations can be formed in the buried portion of the trench.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: December 14, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masayoshi Koike, Akira Kojima, Toshio Hiramatsu, Yuta Tezen
  • Patent number: 6830848
    Abstract: A molded electrode into one-piece is obtained by hot pressing an electrode material obtained by mixing a polymer active material, a conductivity-enhancing agent and a plasticizer, and a current collector sheet. The electrode structure permits significant freedom when designing a secondary battery which uses this electrode with a high energy density and a high power density.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: December 14, 2004
    Assignee: NEC Tokin Corporation
    Inventors: Masaki Fujiwara, Yuji Nakagawa, Masato Kurosaki, Shinako Kaneko, Gaku Harada, Toshihiko Nishiyama
  • Patent number: 6831339
    Abstract: A structure (e.g., field effect transistor) and a method for making the structure, include a substrate having a source region, a drain region, and a channel region therebetween, an insulating layer disposed over the channel region, the insulating layer including a layer including aluminum nitride disposed over the channel region, and a gate electrode disposed over the insulating layer.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: December 14, 2004
    Assignee: International Business Machines Corporation
    Inventors: Nestor A. Bojarczuk, Jr., Eduard Cartier, Supratik Guha, Lars-Ake Ragnarsson
  • Patent number: 6830528
    Abstract: A manual transmission for a four-wheel drive vehicle transmits a power to a front drive shaft for driving front wheels and to a rear drive shaft for driving rear wheels through a propeller shaft. A plurality of shift gear trains are formed by drive gears mounted on an input shaft, driven gears meshing with the drive gears and mounted on an output shaft arranged below the input shaft and clutches. The output shaft is hollowed inside to incorporate the front drive shaft therein. An intermediate shaft is rotatably, coaxially disposed with the input shaft and is driven by the output shaft through a connection gear train. The intermediate shaft is coaxially connected with a transfer unit from which power is distributed to the front drive shaft through another connection gear train and at the same time to the rear drive shaft. Further, the transmission incorporates another clutch for directly transmitting power from the input shaft to the intermediate shaft so as to produce a shift gear ratio of 1.0.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: December 14, 2004
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventor: Kenichi Yamada
  • Patent number: 6832361
    Abstract: A method and system for analyzing power distribution in an integrated circuit chip includes dividing a clock cycle of the integrated circuit chip into a plurality of time periods, dividing the integrated circuit chip into a plurality of cells, performing a static timing analysis for the plurality of cells to obtain current waveform data for each cell and each time period, and performing a power distribution analysis using the current waveform data.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: December 14, 2004
    Assignee: International Business Machines Corporation
    Inventors: John Maxwell Cohn, Scott Whitney Gould, Ronald Dennis Rose, Ivan Wemple, Paul Steven Zuchowski
  • Patent number: 6830949
    Abstract: A preferred condition for forming a Group III nitride compound semiconductor layer on a substrate by a sputtering method is proposed. When a first Group III nitride compound semiconductor layer is formed on a substrate by a sputtering method, an initial voltage of a sputtering apparatus is selected to be not higher than 110% of a sputtering voltage.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: December 14, 2004
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masanobu Senda, Jun Ito, Toshiaki Chiyo, Naoki Shibata, Shizuyo Asami
  • Patent number: 6831875
    Abstract: An apparatus for ultrasonically detecting an edge of a web, includes a ultrasonic-wave transmitter transmitting ultrasonic-wave pulse train, a ultrasonic-wave receiver receiving the ultrasonic-wave pulse train and converting the received ultrasonic-wave pulse train into electric signals, the web being fed between the ultrasonic-wave transmitter and receiver, a rectifying circuit for rectifying the electric signals, a low-pass filter circuit for smoothing output signals transmitted from the rectifying circuit, a first sample-holding circuit for sampling an output signal transmitted from the low-pass filter circuit, at first timing, a second sample-holding circuit for sampling an output signal transmitted from the low-pass filter circuit, at second timing later than the first timing, a third sample-holding circuit for sampling an output signal transmitted from the first sample-holding circuit, at the second timing, and a differentially amplifying circuit for calculating a difference between output signals trans
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: December 14, 2004
    Assignee: Nireco Corporation
    Inventors: Hiroaki Arai, Eiichi Kanno