Abstract: A process of packaging an electronic integrated circuit which comprises a film carrier having metallized connector leads formed thereon to provide the connector leads for the integrated circuit (a hermetically sealed bumped die); gang-bonding the die to said leads; preferably testing the die and bounding thereof for electrical performance, continuity, etc.; placing a metal heat sink having a raised die attach area and a pair of pedestals coextensive with said film carrier into a transfer mold with the leads remaining planar; epoxy bonding said die to said die attach area concurrently soldering selected leads to said pedestals; and completely encapsulating said die in plastic while in said mold allowing said plastic to flow freely on both sides of the die attach area and over most of said heat sink to prevent warpage of the package when said plastic and metal cools but leaving the outer edges of said leads, not connected to said pedestals, open and free of plastic.

Abstract: An entirely zero insertion/retraction force connector having a mechanism for receiving the conductor terminals of a device inserted therein. The connector includes means having conductor terminals which are separable by an actuating mechanism which responds to insertion of said device into the connector for receiving said device terminals without engagement between the connector terminals until the inserted device is fully positioned in the connector at which time resilient means urges the connector terminals toward one another thus electrically connecting (clamping) the device terminals therebetween. The force necessary to insert and move the inserted device to final position has no relationship to terminal contact pressure which is a function only of the force of the resilient means and in one embodiment of the invention there is no wiping force involved.

Abstract: An IGFET integrated circuit memory cell structure utilizing a capacitor with increased charge storage capability, and a method making the same. The capacitor includes a high impurity concentration region having the same conductivity type as the substrate. An island of opposite conductivity type is inset in the region and a conductive field plate overlies the island. The structure also includes a transfer transistor in which the source region is adjacent the capacitor and overlaps the island region therein. Activation of the transistor serves to transfer the charge stored in the capacitor to the drain region where it can be read by external circuitry. In the method, the high concentration region and island in the capacitor are formed by successive ion implantation steps.

Abstract: A bubble lattice file comprising a plurality of propagate elements of magnetic film material positioned as an overlay over bubble supporting material with each element spaced from the bubble material such that a spacing gradient is formed between the element and the bubble material in the direction of the bubble propagation path. The elements comprising the main lattice memory file are arranged to support a hexagonal lattice of bubbles with one bubble propagation path in the form of rows and the other propagation path comprising accessing channels in the form of spaced apart columns.

Abstract: The disclosure relates to a digital display system including a display monitor and character generation circuitry to create characters on the display screen in the form of a dot matrix during the scanning of the display screen. The display screen is actually scanned twice with each field of scan being controlled by the same sets of signals from the character generator. Logic circuitry is provided between the character generator and the display screen to fill in information bit areas adjacent to character dot areas which form a diagonal so as to thereby give the displayed character a smooth appearance.

Abstract: An apparatus for chemically treating a single side of a workpiece, such as for etching or anodizing a semiconductor wafer, comprising, a flat centrally apertured, relatively level table having a top or work surface on which a workpiece is placed face down and of a size and shape commensurate with the dimensions of the workpiece, and means for introducing the liquid for the chemical treatment between the top surface and side of the workpiece to be treated where the liquid passes over the entire surface to be treated and then returns to its source. The apparatus also includes, for certain applications, means for a pre-processing of the workpiece by oxidizing the workpiece surface on the side of the workpiece opposite of the one to be treated to prevent creeping of the liquid around the edges thereof.

Abstract: This disclosure relates to a method of making a V-MOS field effect transistor which does not require the extra steps of epitaxial growth in order to form the source area of the transistor. The formation of the source area is achieved by masking the silicon substrate, opening an aperture in the mask and then etching the silicon substrate in such a manner as to undercut the mask so that the mask provides a shield to subsequent ion implanting of the source area. Both P and N type dopants can be separately implanted with different energy levels so as to form an enhanced PN junction capacitance for the device. Such a field effect transistor can be achieved without the formation of a graded dopant concentration in the channel between the source and drain areas of the transistor and is provided with enhanced source capacitance.

Abstract: This disclosure relates to an electron beam generator having a high brightness electron beam source and a focusing lens placed between the source and the target area to provide a large image focal distance relative to the object focal distance. In addition, two sets of deflection coils or plates are placed between the focusing means and the target where the first deflection means provides that deflection required for generation of the desired pattern and the second deflection means between the first deflection means and the target then deflects the beam back to a path normal to the target surface.

Abstract: This disclosure relates to fast access CCD memory organizations with parallel loops or tracks wherein the total number of data bits which can be stored on a single calculator chip is dependent on the overhead circuitry consisting of a number of refresh amplifiers and various switches required to switch the stored data from a storage track to a read/write location and also on the number of refresh amplifiers as well as control circuitry required for distribution of clock pulses to the respective storage tracks. As the number of switches and refresh amplifiers is increased, so is the total area required for storage bits. As the number of clock switches is increased, the power dissipation for the semiconductor chip is decreased. As the number of refresh amplifiers is increased, the access time and total service time is decreased. A number of different optimum memory organizations are disclosed.

Abstract: An improved method for forming a semiconductor integrated circuit device wherein the active base area of a transistor formed therein is controlled by first forming the inactive base area and later forming the active base area, after the emitter has been formed, thus assuring the desired control over the current gain of the transistor. The separate steps of forming the inactive base area apart from the active base area eliminates the dependency of the inactive base area on the active base area so that the resistance of the inactive base area, which affects the speed of the circuit device, can be independently selected. Additionally disclosed is a method of forming the semiconductor device by a self-aligning mask technique reducing the number of critical masks and eliminating attendant alignment problems.

Abstract: A system for cooling high density integrated circuits for computer systems comprising a cooling frame having a plurality of the heat pipes spanning the space within the frame to which sub-islands are attached to form an island. Each sub-island comprises a printed circuit board on which are mounted connectors for mounting the integrated circuit package and printed circuit board heat sinks having posts which cooperate with hold down pressure clamps for clamping the integrated circuit packages into the connectors and to clamp the heat sink plates of the integrated circuit packages to the printed circuit board heat sinks. These posts also aid in clamping the sub-islands together by cooperating a heat pipe hold down clamp by which each sub-island is clamped to the frame and to the heat pipes both mechanically and thermally to maximize the heat transfer between the integrated circuit packages and the heat pipes.

Abstract: For coupling to a high speed logic device, a monolithic IC regulator is provided which is fully compensated for temperature and for variations in supply voltage. The temperature compensation is accomplished by the proper matching of resistances and current densities in transistor-diode circuitry and the compensation for variations in voltage supply is accomplished by coupling a feedback amplifier section to the regulator, the resistances and diodes of which are carefully matched to the resistances of the regulator so that the feedback amplifier section, being dependent only on such matching, is responsive over large fluctuations of supply current.

Abstract: For coupling to a high speed logic device, a monolithic IC voltage regulator is provided which is fully compensated for variations in temperature and supply voltage. The temperature compensation is accomplished by the proper matching of resistances and current densities in shunt transistor - transistor circuitry and the compensation for variations in voltage supply is accomplished by pairs of transistors with matched current densities and high current gains (Beta) which effectively and functionally eliminates the feedback shunt transistor as a device for supplying constant base emitter voltage for the regulator output regardless of fluctuations in supply voltage thus eliminating the need to maintain current therethrough constant.

Abstract: A method of laminating a cover layer for flexible circuits which provides increased flexibility. The cover layer encapsulates a flexible circuit having a plurality of spaced conductors on a flexible insulating substrate. The cover layer is a tri-layered laminate having a first layer of insulating film, a second intermediate layer of a thermosetting adhesive, and a third layer of a phenolic resin adhesive. The cover layer is bonded to the flexible circuit with the third layer of phenolic resin adhesive being contiguous the conductors.

Abstract: A cooling system for integrated circuit packaging of the conventional dual-in-line (DIP) type, including a cold bar which engages the DIPs and is thermally and mechanically connected at both ends to a cooling frame in which a serpentine tubing carries coolant throughout spaced-apart sections thereof. Clamping means clamp the DIPs tight against the cold bar so that heat generated by the DIPs is carried away through the cold bar into the frame sections where the coolant circulates. The cold bar is disposed so that discrete components may be disposed on the island in a manner to save lateral space, and a multiplicity of these DIPs, cold bars, etc. are mounted on the cooling frame to form a DIP island cooling frame and may include, for example, driver buffer logic, random access memories, as well as I/O logic. Each DIP island can be connected to a cooling frame having other types of integrated circuits and housed in the same console or housed along with similar DIP islands in a similar console, as desired.

Abstract: A magnetic bubble expander-detector circuit comprising a pattern of magnetic material, forming Chevron elements positioned over a bubble-supporting material to define a bubble expander-detector circuit. Each element of the pattern is spaced from the bubble material such that a gradient is formed in the spacing between the element and the bubble material in the direction of the expansion and detection. A rotating magnetic field of sufficient strength to magnetize the pattern is applied in the plane of the material and the gradient of the spacing causes the bubbles to move from one element to an adjacent element as the bubbles are expanded and ultimately detected by suitable detection devices. This invention is particularly characterized in that, with the combination of the pattern elements and the gradient spacing thereof, gaps between adjacent elements are eliminated.

Abstract: A magnetic bubble propagation device comprising a pattern of magnetic material formed of the so-called gap tolerant elements, positioned over a bubble supporting material to define a bubble propagation path. Each element of the pattern is spaced from the bubble material such that a gradient is formed in the spacing between the element and the bubble material in the direction of the propagation path. A rotating magnetic field of sufficient strength to magnetize the pattern is applied in the plane of the material and the spacing gradient causes the bubble to move from one element to an adjacent element in one complete field rotation. This device is particularly characterized in that, with the combination of the pattern elements and the spacing gradient thereof, the gaps between the elements are eliminated.

Abstract: A flexible circuit assembly and a method of making it in which there are no separate electrical interconnections between the flexible interconnecting cable and the rigid connector. A flexible insulating film is bonded to a surface of the connector member and extends from the connector to provide a flexible interconnecting cable for external electrical connections. A plurality of conductors on the insulating film provides a continuous electrically conductive path thus providing an interfaceless electrical connection between the rigid connector and the flexible interconnecting cable. In the method, a metallic clad insulating film is placed on a surface of a rigid support member which includes a portion which will serve as the connector. The support member also includes a filler block portion in the space designated for the flexible interconnecting cable. The film is selectively bonded to the connector portion of the support member. Conductors are then formed on the insulating film.

Abstract: This disclosure relates to error correcting circuits and methods employed thereby for shift register type memories which are formed of a plurality of loops that may be accessed in parallel. Such circuitry is designed to detect when the output of a given loop or shift register becomes a series of ones or a series of zeros which conditions indicate burst mode error. The data bit corresponding to the loop or shift register producing the error is then corrected by complementation.

Abstract: A method of making a pattern for a photolithographic mask. A field ion source is advantageously utilized to produce heavy ions with a high beam current density. The ions are accelerated and directly bombard a metallic coating on the mask substrate to form openings therein in the desired pattern.