Patents Represented by Attorney Michael J. Pollock
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Patent number: 4527128Abstract: A linear amplifier output stage is provided with unity gain buffer means having an input coupled to the output terminal and an output coupled to the stage input. The unity gain buffer means is normally turned off by a control signal. When the amplifier is disabled by switching its bias current off, the buffers are turned on so that the output stage input capacitance is charged or discharged via the buffer means in accordance with the output terminal signal. When a plurality of such amplifiers are commonly coupled to a signal line the off amplifiers cannot be driven into conduction by the operating amplifier's output signal.Type: GrantFiled: September 6, 1983Date of Patent: July 2, 1985Assignee: National Semiconductor CorporationInventors: Harry J. Bittner, Daniel D. Culmer, Walter R. Davis
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Patent number: 4523156Abstract: A tone control circuit including an amplifier having a continuously adjustable frequency response control for varying the effect of low and high frequency filters upon the amplifier, and incorporating a novel distortion and transient suppression circuit is disclosed. A programmable variable resistance is coupled between an input and an output of said amplifier to attenuate circuit low frequency response while initially varying resistor value in response to a programming distortion/transient control signal. Thereafter, overall amplifier gain is further varied in response to the programming distortion/transient control signal by further adjusting the variable resistor value. Various embodiments of the invention provide both continuous and discrete control of tone and volume responsive to both excessive low frequency signal and transients. The present invention is implemented in both discrete and monolithic embodiments, which include both linear and CMOS technologies.Type: GrantFiled: July 25, 1983Date of Patent: June 11, 1985Assignee: National Semiconductor CorporationInventor: Don R. Sauer
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Patent number: 4520324Abstract: A circuit is disclosed for operating an MOS transistor in its resistive mode. A cascode transistor is used to clamp the voltage across the resistive transistor to the required level. The circuit gain can be controlled by controlling voltage across the resistive transistor.Type: GrantFiled: March 11, 1983Date of Patent: May 28, 1985Assignee: National Semiconductor CorporationInventors: William B. Jett, Jr., Milton E. Wilcox
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Patent number: 4519076Abstract: A means for testing the threshold voltage changes in a programmable and erasable floating gate memory cell by accessing directly and exclusively the cells in the core, and the amplifiers that sense the operation of the cells, so as to measure the relative currents therein as an indication of threshold voltage parameters.Type: GrantFiled: December 28, 1981Date of Patent: May 21, 1985Assignee: National Semiconductor CorporationInventors: Ury Priel, Giora Yaron, Mark S. Ebel
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Patent number: 4515432Abstract: One end of a plastic optical fiber is attached to an LED by pressing a melted end of the optical fiber against the LED.Type: GrantFiled: December 31, 1980Date of Patent: May 7, 1985Assignee: National Semiconductor CorporationInventor: James S. Sherwin
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Patent number: 4512816Abstract: A semiconductor substrate having an epitaxial layer on its upper surface is provided with a masking layer. Holes are photolithographically etched in the masking layer where isolation diffusion regions are to be formed. Then aluminum ions are implanted into the surface and diffused completely through the epitaxial layer so as to create tubs of epitaxial material that are PN junction isolated. Since aluminum is a fast diffuser, the diffusion time is greatly reduced, thereby reducing the up diffusion of buried N+ collector so that the original epitaxial layer can be made relatively thin. Lateral isolation diffusion is reduced, thereby substantially reducing the surface area required for isolation. Thus, the process is capable of increasing the component density in the completed integrated circuit.Type: GrantFiled: April 23, 1984Date of Patent: April 23, 1985Assignee: National Semiconductor CorporationInventors: Amolak R. Ramde, Wadie N. Khadder, Surinder Krishna
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Patent number: 4512815Abstract: In a monolithic semiconductor integrated circuit, conventional bipolar transistors are fabricated along with thin ion implanted junction field effect transistors, to create BIFET structures. After the conventional isolation diffusion, the surface oxide is stripped off and the semiconductor wafer ion implanted with slow diffusing impurities of a conductivity type, the same as the undiffused surface material. Then the bipolar transistors, along with the junction field effect transistors, are fabricated using conventional oxide masked diffusion processes. The field effect device sources and drains employ the base diffusions of the bipolar transistors while the gate contact is achieved with an emitter diffusion. The field effect device channels are formed at a depth substantially greater than that of the impurities deposited in the original ion implant. If desired, an ion implanted top gate can be established over the channel. The wafer is then annealed and processed in accordance with conventional techniques.Type: GrantFiled: January 31, 1983Date of Patent: April 23, 1985Assignee: National Semiconductor CorporationInventors: Wadie N. Khadder, Jia T. Wang, Brian E. Hollins
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Patent number: 4509204Abstract: Disclosed is a stop detector circuit for issuing a stop signal in an electronically tuned AM radio when the radio is center tuned on a radio signal that exceeds a predetermined level of signal strength. An intermediate frequency signal and an automatic gain control signal are used to determine when the stop signal is to be issued. Included in the stop detector circuit are a resonator driver (16), a resonator circuit (18), a resonator signal amplifier (20), a current switch (22), a threshold adjustment and filter (24), and a threshold detector (26). The resonator driver generates a resonator signal having a series of current pulses at the same frequency as the intermediate frequency signal. The resonator circuit converts the resonator signal current to a voltage, the AC component of which is at a minimum when the radio is not center tuned and at a maximum when the radio is center tuned. The resonator signal amplifier amplifies the resonator signal voltage.Type: GrantFiled: September 23, 1983Date of Patent: April 2, 1985Assignee: National Semiconductor CorporationInventor: Donald T. Wile
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Patent number: 4505015Abstract: A roller, for guiding strips of material, that can tilt in one plane with respect to a support shaft located inside the roller but is carefully prevented from moving out of the one plane by separate guides, also inside the roller, which separate guides are independent of the clearances needed in the bearing that allows tilting.Type: GrantFiled: July 19, 1982Date of Patent: March 19, 1985Assignee: National Semiconductor CorporationInventors: John P. Ross, Carl E. Bernardi
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Patent number: 4505225Abstract: Apparatus is disclosed for accurately aligning a processing device with respect to a predetermined reference location on semiconductor lead frame. The apparatus is especially suitable for use with a plating head for plating the pads of a lead frame. The apparatus includes a drive motor having a precision lead screw for attachment to the processing device to shift the device through a small distance to accurately position the device with respect to the predetermined reference positions on the lead frame. The drive motor is coupled to a rotary encoder which is rotated in response to the movement of a pin positioned to enter a reference hole in the lead frame. As the lead frame is advanced by an indexing device, the pin enters a reference hole in the lead frame near the end of the travel of the lead frame, causing the rod to rotate the encoder and supply a signal which for comparison with a reference signal.Type: GrantFiled: August 31, 1983Date of Patent: March 19, 1985Assignee: National Semiconductor CorporationInventor: Syed Husain
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Patent number: 4504744Abstract: An inverter gate using advanced low power Schottky configuration is shown in which a feedback transistor is used to provide input pull up action. The transistor is a minimum area device that occupies less chip area than the elements that it replaces. It also conserves power so that the speed power product is reduced. The circuit further incorporates negative feedback associated with the input bias resistor whereby a smaller resistor can be employed without increasing supply current drain or input current.Type: GrantFiled: January 13, 1983Date of Patent: March 12, 1985Assignee: National Semiconductor CorporationInventor: Ramanatha V. Balakrishnan
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Patent number: 4499432Abstract: An operational power amplifier having a bootstrap power output stage is designed to provide maximum dynamic range over a wide range of supply voltages. A control circuit in the form of a switched current mirror is added to the amplifier biasing circuit. At supply voltage higher than a predetermined threshold, the amplifier bias is adjusted to provide one half of this voltage at the output terminal. For supply voltages less than the threshold value, the output voltage is made less than half supply voltage.Type: GrantFiled: November 4, 1982Date of Patent: February 12, 1985Assignee: National Semiconductor CorporationInventors: William H. Gross, Tadashi Sakurai
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Patent number: 4497586Abstract: An electronic Celsius thermometer circuit suitable for fabrication in integrated circuit form has an output directly related to the temperature scale. The zero crossing is created by subtracting a negative-temperature-coefficient voltage from a positive-temperature-coefficient voltage with one of the voltages being made adjustable and set to equal the other. The output response is set to provide the desired temperature scale. If desired the zero crossing and temperature scale can be set for Fahrenheit readings as well as for Celsius. A circuit improvement is also disclosed for compensating the thermometer for departures from linearity.Type: GrantFiled: May 17, 1982Date of Patent: February 5, 1985Assignee: National Semiconductor CorporationInventor: Carl T. Nelson
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Patent number: 4496963Abstract: A semiconductor device wherein surface stabilization is provided by a shallow layer of ion implanted doping material on the surface of the semiconductor and beneath the passivating oxide layer. One embodiment is a bipolar transistor including a collector region, a base region and an emitter region, the base region being provided with the shallow ion implanted layer at the surface thereof. Another embodiment is a zener diode device with an anode region and a cathode region, the cathode region being provided with the shallow ion implanted layer at the surface thereof. Another embodiment is a JFET with a gate region and a source and drain region and a channel region extending through the gate region between the source and drain regions, the channel region being provided with the shallow ion implanted layer at the surface thereof.Type: GrantFiled: March 9, 1979Date of Patent: January 29, 1985Assignee: National Semiconductor CorporationInventors: James L. Dunkley, Robert C. Dobkin
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Patent number: 4497017Abstract: A switching regulator is provided with a separate or isolated d-c output for operating the switching pulse generating circuits. A large value resistor coupled between the d-c input line and the isolated d-c output will charge the filter capacitor to a higher than normal voltage. A zener diode string is coupled across the filter capacitor. The zener diodes in combination have a higher than nominal zener voltage. The diodes will respond to the capacitor voltage and develop a starting pulse that initiates the power supply when it is first energized.Type: GrantFiled: May 16, 1983Date of Patent: January 29, 1985Assignee: National Semiconductor CorporationInventor: Walter R. Davis
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Patent number: 4495497Abstract: A data transmission system for individually sensing a plurality of remote signal sources and interconnecting the selected signal source with one or more signal destinations by switch means at each signal source and at each signal destination.Type: GrantFiled: January 7, 1982Date of Patent: January 22, 1985Assignee: National Semiconductor CorporationInventor: Kalman Molnar
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Patent number: 4493075Abstract: A large scale memory system that can use devices with some defective memory cells in them since bad cells and bad devices are recorded in a separate permanent memory that accompanies the system. The permanent memory is continuously referred to so as to avoid defective cells during accessing. Spare devices are automatically incorporated in the system, as needed, to facilitate self repairing.Type: GrantFiled: May 17, 1982Date of Patent: January 8, 1985Assignee: National Semiconductor CorporationInventors: James M. Anderson, Thomas S. Knight, III, Dennis T. Kitagawa, Ernesto Rey
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Patent number: 4490631Abstract: A Schottky driver is disclosed in which the output circuitry is pin selectable totem pole or open collector configuration. Means for reduced propagation delay are present along with means for reducing totem pole current spikes and overall current drain.Type: GrantFiled: August 30, 1982Date of Patent: December 25, 1984Assignee: National Semiconductor CorporationInventor: David Kung
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Patent number: 4489282Abstract: A CMOS op amp is disclosed in which one op amp is programmed with a controlled offset voltage and a reference current. The amplifier is constructed so that its gain adjusts to where its output current equals the reference current. Thus its G.sub.m equals the reference current divided by the offset voltage. Other such amplifiers can be slaved to the programmed amplifier so that a plurality of amplifiers can be simultaneously programmed.Type: GrantFiled: March 4, 1983Date of Patent: December 18, 1984Assignee: National Semiconductor CorporationInventor: William B. Jett, Jr.
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Patent number: 4486511Abstract: A solder composition of 10 to 40 percent tin, with the balance lead, for use in thin layers of 50 to 500 microinches on copper integrated circuit leads so as to resist the formation of intermetallics when later heated.Type: GrantFiled: June 27, 1983Date of Patent: December 4, 1984Assignee: National Semiconductor CorporationInventors: Yung-Shih Chen, Jagdish G. Belani, Vijay Sajja