Abstract: A plastic container and closure and method of making the same. The container can include a solid bottom end, an outer sidewall extending from the solid bottom end, and a neck portion extending from the outer sidewall to create an open end of the container. The neck portion may have a spout portion having an aperture formed therein. The spout portion can be inverted to form a flange receptacle. The closure can include a sealing portion which includes a first receptacle, a spring portion that includes a second receptacle, and a planar center area configured in the center of the closure and extending inward from the spring portion. The container may be filled with a product and the closure secured to the container, over the open end, to create a primary seal and a secondary seal. When the closure is secured to the container, the spring portion can exert a sealing pressure against the neck portion of the container to create the primary seal.

Abstract: A diffractive optical system including a diffractive optical element is provided with a first lens component having a first positive lens, and a second lens component having a second positive lens and a negative lens. The diffractive optical element has a first diffractive optical member having a first diffractive optical surface, and a second diffractive optical member having a second diffractive optical surface. The first diffractive optical member and the second diffractive optical member are arranged so that the first diffractive optical surface and the second diffractive optical surface are in contact with each other. A refractive index of the first diffractive optical member and a refractive index of the second diffractive optical member at the d line are different from each other.

Abstract: A memory card has a wiring board, four memory chips stacked on a main surface of the wiring board, and a controller chip and an interposer mounted on a surface of the memory chip of the uppermost layer. The memory chips are stacked on the surface of the wiring board so that their long sides are directed in the same direction as that of the long side of the wiring board. The memory chip of the lowermost layer is mounted on the wiring board in a dislocated manner by a predetermined distance in a direction toward a front end of the memory card so as not to overlap the pads of the wiring board. The three memory chips stacked on the memory chip of the lowermost layer are disposed so that their short sides on which pads are formed are located at the front end of the memory card.

Abstract: The invention relates to a radiant gas burner device comprising a first cylindrical chamber (1) and a first injector (2) for feeding the first chamber with a combustible gas mixture, the first chamber (1) comprising an external peripheral heating surface (10). The device of the invention further comprises a second cylindrical and hollow second chamber, and a second injector (4) for feeding the second chamber with a combustible gas mixture, the second chamber being positioned inside the first chamber (1), separated from the first chamber by a sealed wall, and having an internal heating surface (30), and the first and second injectors (2, 4) being designed for separately feeding the first and second chambers, independently of each other.

Abstract: Stapler (1) which in the course of a reciprocating working stroke (V) staples a workpiece (4), preferably a sheaf of papers, which stapler is powered by an electric motor which, via a transmission arrangement (5) drives the stapler during the working stroke, whereby the motor is activated and initiates the working stroke from a certain starting region as a result of the workpiece moving a trigger (32,33) which forms part of a trigger device (6) to a position at which a circuit-breaker (7), which forms part of the same electrical circuit (8) as the motor is connected to, is closed by the trigger, and whereby a release arrangement (9) connected to, and operatively acted upon, by a rotating means (11) which forms part of the transmission arrangement moves the trigger during the return phase of the working stroke to a non-closing position at which the circuit-breaker returns to an open position, thereby breaking the electric circuit and deactivating the motor, with the result that the working stroke ends in the s

Abstract: A technology capable of reducing the fraction defective of a MOS capacitor without the need to perform a screening is provided. A MOS capacitor MOS1 and a MOS capacitor MOS2 are coupled in series between a high potential and a low potential to form a series capacitive element. Then, a polysilicon capacitor PIP1 and a polysilicon capacitor PIP2 are coupled in parallel with the series capacitive element. Specifically, a high-concentration semiconductor region HS1 constituting a lower electrode of the MOS capacitor MOS1 and a high-concentration semiconductor region HS2 constituting a lower electrode of the MOS capacitor MOS2 are coupled. Further, an electrode E1 constituting an upper electrode of the MOS capacitor MOS1 is coupled to the low potential (for example, GND) and an electrode E3 constituting an upper electrode of the MOS capacitor MOS2 is coupled to the high potential (for example, power source potential).

Abstract: A phase change memory capable of highly reliable operations is provided. A semiconductor device has a memory array having a structure in which memory cells are stacked including memory layers using a chalcogenide material and diodes, and initialization conditions and write conditions are changed according to the layer in which a selected memory cell is positioned. The initialization conditions and write conditions (herein, reset conditions) are changed according to the operation by selecting a current mirror circuit according to the operation and by a control mechanism of a reset current in a voltage select circuit and the current mirror circuit.

Abstract: A zoom lens ZL installed in an electronic still camera 1 includes, in order from an object side, a first lens group G1 having negative refractive power, and a second lens group G2 having positive refractive power. A distance between the first lens group G1 and the second lens group G2 varies upon zooming from a wide-angle end state to a telephoto end state. The second lens group G2 has a front lens group G2F and a rear lens group G2R, and the front lens group G2F is moved along the optical axis upon focusing on a close object, thereby providing a compact zoom lens having excellent optical performance, an optical apparatus equipped with the zoom lens, and a method for manufacturing the zoom lens.

Abstract: Disclosed herewith is a circuit system for improving a slew rate while reducing the power consumption in an operational amplifier that requires a comparatively high supply voltage (e.g., 5 V or upper) operation. The operational amplifier includes level shift circuits, differential pairs whose source connected serially, current voltage conversion circuit and output stage. The level shift circuits convert a differential input signal level and output to differential pairs. Combination of level shift circuit and differential pairs realize input signal difference detection and driving current control in the common circuit.

Abstract: The router which relays a transfer request and a reply between master and slave components has request-control circuits provided therein. The request-control circuits judge the slave component to transfer a request from each master component to, and arbitrate the conflict between requests to one slave component. Further, for the router, a slave-component-allocation-control circuit which variably allocates the slave components to be connected to the request-control circuits to the request-control circuits is adopted. In case that a slave component in connection with one request-control circuit is subjected to no access, changing the allocation of the slave component in connection with the one request-control circuit makes possible to utilize the resource of the one request-control circuit.

Abstract: There is provided a technology which allows improvements in manufacturing yield and product reliability in a semiconductor device having a triple well structure. A shallow p-type well is formed in a region different from respective regions in a p-type substrate where a deep n-type well, a shallow p-type well, and a shallow n-type well are formed. A p-type diffusion tap formed in the shallow p-type well is wired to a p-type diffusion tap formed in a shallow n-type well in the deep n-type well using an interconnection in a second layer. The respective gate electrodes of an nMIS and a pMIS each formed in the deep n-type well are coupled to the respective drain electrodes of an nMIS and a pMIS each formed in the substrate using an interconnection in a second or higher order layer.

Abstract: The degree of freedom of the chip layout in a semiconductor device is improved, and improvement in packaging density is aimed at. Since it becomes possible to form the wire of two directions on the pad of a memory chip by performing the over-bonding of reverse bonding by ball bonding, an effect equivalent to continuation stitch bonding of wedge bonding can be produced by ball bonding. Hereby, the degree of freedom of a chip layout and the degree of freedom of the lead layout of substrate 3 can be improved, and the packaging density on a substrate in a chip lamination type semiconductor device (memory card) can be improved.

Abstract: In a zoom lens ZL having a plurality of lens groups which are disposed in order from an object, a first lens group that is disposed to closest to the object among the plurality of lens groups has positive refractive power and comprises a light path bending element which bends the path of light and a plurality of lens components which are disposed closer to the object than the light path bending element, and the plurality of lens components comprise at least one negative lens whose refractive index with respect to d-line exceeds 1.90.

Abstract: A technique capable of realizing a power saving in a device for reproducing/recording digital signals by properly controlling a frequency of a clock. The device for reproducing/recording digital signals (device for reproducing an optical disk) includes: a difference comparing circuit for comparing a first parameter (demodulating block counter) updated each time a process for one correcting block is done in a demodulating circuit with a second parameter (error correcting block counter) updated each time a process of one correcting block is done in an error correcting circuit; and a circuit (clock controlling circuit etc.) for switching a frequency of a master clock (MCLK) depending on a comparison result of the difference comparing circuit. Thereby, the frequency of the clock can be switched both of when the demodulation for one correcting block is ended and when the correcting process for one correcting block is ended by using the switched master clock.

Abstract: A semiconductor integrated circuit has a central processing unit and a rewritable nonvolatile memory area disposed in an address space of the central processing unit. The nonvolatile memory area has a first nonvolatile memory area and a second nonvolatile memory area, which memorize information depending on the difference of threshold voltages. The first nonvolatile memory area has the maximum variation width of a threshold voltage for memorizing information set larger than that of the second nonvolatile memory area. When the maximum variation width of the threshold voltage for memorizing information is larger, since stress to a memory cell owing to a rewrite operation of memory information becomes larger, it is inferior in a point of guaranteeing the number of times of rewrite operation; however, since a read current becomes larger, a read speed of memory information can be expedited.

Abstract: To provide a technique capable of improving the reliability of a semiconductor device even if the downsizing thereof is advanced. The technical idea of the present invention lies in the configuration in which in a first to a third silicon nitride film to be formed by lamination, the respective film thicknesses thereof are not constant but become smaller in order from the third silicon nitride film in the upper layer to the first silicon nitride film in the lower layer while the total film thickness thereof is kept constant. Due to this it is possible to improve the embedding characteristic of the third silicon nitride film in the uppermost layer in particular, while ensuring the tensile stress of the first to third silicon nitride films, which makes effective the strained silicon technique.

Abstract: In a semiconductor device in which a plurality of memory LSIs and a plurality of processor LSIs are stacked, as the number of stacked layers increase, the communication distance of data between a memory LSI and a processor LSI will increase. Therefore, the parasitic capacitance and parasitic resistance of the wiring used for the communication increase and, as a result of which, the power and speed performance of the entire system will be degraded. At least two or more of the combinations of a processor LSI 100 and a memory LSI 200 are stacked and the processor LSI 100 and the memory LSI 200 in the same combination are stacked adjacent to each other in the vertical direction.

Abstract: The present invention enables improvement of bonding reliability of the conductive adhesive interposed between a semiconductor chip and a die pad portion. Provided is a semiconductor device, in which a silicon chip is mounted over the die pad portion integrally formed with a drain lead, has a source pad over the main surface and a drain electrode of a power MOSFET over the back side, and is bonded onto the die pad portion via an Ag paste. In the device, a source lead and the source pad are electrically coupled via an Al ribbon. Over the back surface of the silicon chip, an Ag nanoparticle coated film is formed, while another Ag nanoparticle coated film is formed over the die pad portion and lead (drain lead and source lead).

Abstract: Generally, a power MOSFET mainly includes an active region occupying most of an internal region (a region where a gate electrode made of polysilicon or the like is integrated), and a surrounding gate contact region (where the gate electrode made of polysilicon or the like is derived outside a source metal covered region to make contact with a gate metal) (see FIG. 65 in a comparative example). Since the gate electrode made of polysilicon or the like has a stepped portion existing between both regions, a focus margin may be reduced in a lithography step, including exposure or the like, for formation of a contact hole for a source or for a gate. The invention of the present application provides a semiconductor device having a trench gate type power MISFET with a gate electrode protruding from an upper surface of a semiconductor substrate, in which respective main upper surfaces of the gate electrode in an active region and a gate contact region are substantially at the same height.

Abstract: The present invention is directed to repair a defective bit included in a memory in a semiconductor integrated circuit device for a display controller. The semiconductor integrated circuit device has a display memory capable of storing display data in a storage area, and a repair circuit capable of repairing a defect by replacing an area including a defect in the display memory with a spare storage area provided on the outside of a regular storage area for storing the display data. The device further includes a selector circuit provided on a transmission path of output data from the display memory and selectively replacing output data from the regular storage area with output data from the spare storage area in accordance with a control signal from the repair circuit. By selectively replacing the output data from the regular storage area with output data from the spare storage area in accordance with a control signal from the repair circuit, a defective bit is repaired.