Patents Represented by Attorney Miles & Stockbridge P.C.
  • Patent number: 7933158
    Abstract: For a nonvolatile memory permitting electrical writing and erasing of information to be stored, such as a flash memory, the load on the system developer is to be reduced, and it is to be made possible to avoid, even if such important data for the system as management and address translation information are damaged, an abnormal state in which the system becomes unable to operate.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: April 26, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Kenji Kozakai, Takeshi Nakamura, Tatsuya Ishii, Motoyasu Tsunoda, Shinya Iguchi, Junichi Maruyama
  • Patent number: 7926352
    Abstract: For example, to adjust an offset of a pressure sensor, there are provided an external resistor RE and an internal resistor circuit that is connected to both ends of RE and formed in a semiconductor chip such as a processor. The internal resistor circuit includes N pieces of internal resistors RI connected in series between both ends of RE, and (N+1) pieces of switches selecting one of voltages of respective nodes of the serial resistors and outputs the same as a signal. RE has a high absolute value precision of, e.g., several ten ohms to several hundred ohms, and RI has a high relative value precision of, e.g., several kilo-ohms. Therefore, an offset adjustment range is decided at a high absolute value precision mainly by RE, and with regard to the arrangement resolution, a high precision can be obtained along with the relative value precision of the RI.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: April 19, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tadashi Matsushima, Masaru Sugai, Chung Wen Hung, Yuji Shimizu
  • Patent number: 7928589
    Abstract: The present invention provides a non-insulated type DC-DC converter having a circuit in which a power MOS•FET for a high side switch and a power MOS•FET for a low side switch are connected in series. In the non-insulated type DC-DC converter, the power transistor for the high side switch, the power transistor for the low side switch, and driver circuits that drive these are respectively constituted by different semiconductor chips. The three semiconductor chips are accommodated in one package, and the semiconductor chip including the power transistor for the high side switch, and the semiconductor chip including the driver circuits are disposed so as to approach each other.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: April 19, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Yukihiro Satou, Tomoaki Uno, Nobuyoshi Matsuura, Masaki Shiraishi
  • Patent number: 7928660
    Abstract: A method and apparatus is used to rapidly modulate the intensity of a vehicular lamp for the purpose of enhancing the vehicle's conspicuity. A timer is used to generate a periodically varying pulse width modulated signal that is used to drive a transistor connected to one or more lamps. The modulation rate is chosen such that the lamp or lamps appear to flicker when seen with peripheral vision, yet appears not to flicker when seen out of the center of the eye.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: April 19, 2011
    Inventor: Jeremy F. Skene
  • Patent number: 7927022
    Abstract: Even when used at a high rotation speed, outside parts in relation to the radial direction of a cage 3, of the circumferential parts of a pocket 7 are kept from being worn away by outside end surfaces 21 of rollers 2. Moreover the rollers 2 are kept from sliding on the inside the pockets 7, to thereby stabilize the performance of rotation support parts. The outside end surface 21 of the roller 2 is made a ball convex surface, so that the center part of the outside end surface 21 can be freely in contact with the inner peripheral surface of a second outside cylindrical portion 14. In a condition with the rollers 2 displaced radially outward of the cage 3 due to centrifugal force, a PV value of a rubbing part between the outside end surface 21 and the opposite surface is kept low, and the wear of this rubbing part is suppressed.
    Type: Grant
    Filed: April 5, 2005
    Date of Patent: April 19, 2011
    Assignee: NSK Ltd.
    Inventors: Satoshi Kadokawa, Makoto Hinohara, Syuuichi Tsubouchi, Noriyuki Takeo, Makoto Fujinami
  • Patent number: 7923292
    Abstract: In the semiconductor device which has the structure which stores a plurality of semiconductor chips with which plane sizes differ in the same sealing body in the state where they are accumulated via DAF, thickness of DAF of the back surface of the uppermost semiconductor chip with which the control circuit was formed was made thicker than each of DAF of the back surface of the lower layer semiconductor chip with which the memory circuit was formed. Hereby, the defect that the bonding wire which connects the uppermost semiconductor chip and a wiring substrate contacts the main surface corner part of a lower layer semiconductor chip can be reduced.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: April 12, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Takashi Kikuchi, Koichi Kanemoto, Chuichi Miyazaki, Toshihiro Shiotsuki
  • Patent number: 7923319
    Abstract: When a natural oxide film is left at the interface between a metal silicide layer and a silicon nitride film, in various heating steps (steps involving heating of a semiconductor substrate, such as various insulation film and conductive film deposition steps) after deposition of the silicon nitride film, the metal silicide layer partially abnormally grows due to oxygen of the natural oxide film occurring on the metal silicide layer surface. A substantially non-bias (including low bias) plasma treatment is performed in a gas atmosphere containing an inert gas as a main component on the top surface of a metal silicide film of nickel silicide or the like over source/drain of a field-effect transistor forming an integrated circuit. Then, a silicon nitride film serving as an etching stop film of a contact process is deposited. As a result, without causing undesirable cutting of the metal silicide film, the natural oxide film over the top surface of the metal silicide film can be removed.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: April 12, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Takuya Futase, Shuhei Murata, Takeshi Hayashi
  • Patent number: 7923795
    Abstract: A lower electrode is formed over a semiconductor substrate via an insulator film, first and second insulator films are formed to cover the lower electrode, an upper electrode is formed over the second insulator film, third to fifth insulator films are formed to cover the upper electrode and a void is formed between the first and second insulator films between the lower and upper electrodes. An ultrasonic transducer comprises the lower electrode, the first insulator film, the void, the second insulator film and the upper electrode. A portion of the first insulator film contacting with the lower electrode is made of silicon oxide, a portion of the second insulator film contacting with the upper electrode is made of silicon oxide and the first or second insulator film includes a silicon nitride film positioned between the upper and lower electrodes and not in contact with the upper and lower electrodes.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: April 12, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Kobayashi, Shuntaro Machida
  • Patent number: 7925046
    Abstract: A method for sorting mail that may include performing an automatic address recognition process on a digitized image of a mail piece and generating a plurality of conditional address recognition results and a plurality of confirmation values each associated with one of the plurality of conditional address recognition results. The method can include sending the digitized image, the plurality of conditional address recognition results and the plurality of confirmation values to a video coding system, and selecting a video coding task corresponding to one or more of the plurality of confirmation values.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: April 12, 2011
    Assignee: Lockheed Martin Corporation
    Inventors: Alfred T. Rundle, Scott W. Breen
  • Patent number: 7924511
    Abstract: Providing an optical system having excellent optical performance over entire focusing range from infinity to a close distance, a method for focusing the optical system, and an imaging apparatus equipped therewith. The optical system includes, in order from an object, a first lens group G1 having positive refractive power, and a second lens group G2 having positive refractive power. The second lens group G2 is movable along an optical axis for varying focusing. The first lens group G1 satisfies a given conditional expression.
    Type: Grant
    Filed: February 25, 2009
    Date of Patent: April 12, 2011
    Assignee: Nikon Corporation
    Inventor: Satoru Shibata
  • Patent number: 7924507
    Abstract: A diopter-adjustable eyepiece lens EL, comprising first through third lenses L1 through L3, satisfies the condition ?0.9<S1<?0.3, wherein first lens L1 shape factor S1 denotes a shape factor of the first lens L1, Re1 denotes the radius of curvature of a concave surface of the first lens L1 on an eyepoint EP side and Rs1 denotes the radius of curvature of a concave surface of the first lens L1 on the object side. The diopter adjustment satisfies also the condition 0.4<d2/?d<0.6 wherein d2 denotes an air gap along the optical axis between the first lens L1 and the second lens L2 when diopter adjustment is carried out so that diopter becomes maximum on the negative side, and Ed denotes an air gap along the optical axis between a concave surface of the first lens L1 on the eyepoint side and a concave surface of the third lens L3 on the object side when diopter adjustment is carried out so that diopter becomes maximum on the negative side.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: April 12, 2011
    Assignee: Nikon Corporation
    Inventor: Koichi Oshita
  • Patent number: 7924539
    Abstract: A protection circuit with suppressed erroneous operation due to power source fluctuation has a first resistor and a capacitor connected in series between a power source line and a ground line, an inverter with an input connected between the first resistor and the capacitor, and a MOS transistor with a gate electrode that receives an output of the inverter and with a drain electrode and source electrode connected to the power source line and the ground line. When high voltage fluctuation occurs in the power source line, a level change at a connection point between the first resistor and the capacitor is delayed according to a time constant. By the delay, the MOS transistor that receives an output of the inverter is temporarily turned on and discharges a high voltage to the ground line.
    Type: Grant
    Filed: July 10, 2009
    Date of Patent: April 12, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroyasu Ishizuka, Kazuo Tanaka
  • Patent number: 7923361
    Abstract: The resist film after high-concentration ion implantation has a hard modified layer on the surface thereof, and is difficult to remove in the temperature region as low as about 150 degrees centigrade. This is because the etching rate of the modified layer sharply decreases with a decrease in temperature. The temperature is increased up to about 250 degrees centigrade to perform an ashing treatment in vacuum in order to increase the etching rate of the modified layer. Then, there occurs a popping phenomenon that the inside resist solvent swells and breaks. The residues scattered thereby of the modified layer and the like seize the wafer surface, and also become difficult to remove even in the subsequent cleaning.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: April 12, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Katsuhisa Shibuya, Hiromichi Waki, Naoto Aida
  • Patent number: 7920014
    Abstract: In order to transfer data at high speed over a long distance, a current mode logic output circuit (CML) having a large number of taps, high accuracy, and a wide switchable range of the amount of pre-emphasis is needed. However, when the amount of emphasis is set by adding unit source-coupled pair circuits, a problem will arise that the output capacitance of the current mode logic output circuit would increase, thus hampering high-speed transmission. An output circuit of the invention is constructed from unit source-coupled pair circuits 501, which are obtained by dividing a current mode logic output circuit (CML) into m groups, terminal resistors 502, and a data selector 504. The amount of emphasis of each tap is determined by the ratio of the number of unit source-coupled pair circuits, which have been obtained by dividing the CML into m groups, allocated to each tap. Thus, the amount of emphasis can be set to be any arbitrary amount without a change in the output amplitude of 1.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: April 5, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Kazuhito Nagashima, Takashi Muto
  • Patent number: 7918985
    Abstract: A method of reducing a titanium oxide in a solid state in an electrolytic cell which includes an anode, a cathode formed at least in part from the titanium oxide, and a molten electrolyte which includes cations of a metal that is capable of chemically reducing the cathode titanium oxide, which method includes operating the cell at a potential that is above a potential at which cations of the metal that is capable of chemically reducing the cathode titanium oxide deposit as the metal on the cathode, whereby the metal chemically reduces the cathode titanium oxide, and which method is characterized by refreshing the electrolyte and/or changing the cell potential in later stages of the operation of the cell as required having regard to the reactions occurring in the cell and the concentration of oxygen in the titanium oxide in the cell in order to produce high purity titanium.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: April 5, 2011
    Assignee: Metalysis Limited
    Inventors: Les Strezov, Ivan Ratchev, Steve Osborn
  • Patent number: 7920341
    Abstract: Providing an optical system having excellent optical performance, an imaging apparatus, and a method for forming an image by the optical system. The optical system includes, in order from an object, a first lens group G1 having negative refractive power, a second lens group G2 having positive refractive power, a third lens group G3 having negative refractive power, and a fourth lens group G4 having positive refractive power. At least one of the first lens group G1, the second lens group G2, the third lens group G3, and the fourth lens group G4 has at least one A lens satisfying given conditional expressions.
    Type: Grant
    Filed: July 3, 2008
    Date of Patent: April 5, 2011
    Assignee: Nikon Corporation
    Inventors: Satoru Shibata, Satoshi Hayakawa
  • Patent number: 7920652
    Abstract: To detect phase mismatches between in-phase and quadrature signals of a quadrature demodulator. The phase mismatches can be detected using the signals obtained by removing high frequency components of output of a multiplier by a low pass filter, the output being the product of the in-phase signals of which low frequency components are removed by a first high pass filter by the quadrature signals of which low frequency components are removed by a second high pass filter.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: April 5, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Shigenori Hayase, Kazuyuki Hori
  • Patent number: 7920334
    Abstract: Providing a zoom lens system being compact with high optical performance, an optical apparatus using the same, and a method for zooming the zoom lens system. The system includes, in order from an object along an optical axis, a first lens group G1 having negative refractive power, a second lens group G2 having positive refractive power, and a third lens group G3 having positive refractive power. Upon zooming from a wide-angle end state W to a telephoto end state T, each distance between adjacent lens groups is varied. Given conditional expression is satisfied.
    Type: Grant
    Filed: July 14, 2008
    Date of Patent: April 5, 2011
    Assignee: Nikon Corporation
    Inventor: Toshiyuki Shimada
  • Patent number: 7915666
    Abstract: An erase method where a corner portion on which an electric field concentrates locally is provided on the memory gate electrode, and charges in the memory gate electrode are injected into a charge trap film in a gate dielectric with Fowler-Nordheim tunneling operation is used. Since current consumption at the time of erase can be reduced by the Fowler-Nordheim tunneling, a power supply circuit area of a memory module can be reduced. Since write disturb resistance can be improved, a memory array area can be reduced by adopting a simpler memory array configuration. Owing to both the effects, an area of the memory module can be largely reduced, so that manufacturing cost can be reduced. Further, since charge injection centers of write and erase coincide with each other, so that (program and erase) endurance is improved.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: March 29, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Kan Yasui, Tetsuya Ishimaru, Digh Hisamoto, Yasuhiro Shimamoto
  • Patent number: 7917391
    Abstract: A method for creating solicitations based on geolocalization and observation. At remote terminal, a need is identified and a solicitation based on that need is created at a server based on commands sent over a network, such as a wireless network. In an example embodiment, a roofing company worker passing through a residential area spots a roof in need of work and based on the location of the spotter, transmits a command to a server to generate a mailing (e.g., email or regular mail) to the address responsively to the GPS data and other data.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: March 29, 2011
    Assignee: Market Hardware, Inc.
    Inventors: Patrick D. Smith, Thomas D. McGarry, Brian D. Kraff