Abstract: A bi-directional global data bus scheme for use in a random access memory which optimizes the performance of the data path for read and write operations while offering a uniform read and write frequency to the external processor or controller is presented. The system makes use of a dual local data bus structure which allows the column address to change on every clock cycle since the two parallel local data paths are activated on alternate clock cycles and therefore operate at half the nominal operating frequency. For the read operation, the global data buses operate differentially at the nominal operating frequency. For the write operation, the global data buses operate at half the nominal operating frequency with each global data bus of a complementary data bus pair being dedicated to either one or the other local data paths for every other clock cycle.

Abstract: A security tag having a strap for securing the tag to an object to be protected and an electronic module connected to the strap for detecting an attempt to defeat the tag by short circuiting and severing the strap. The strap is formed of plural discrete conductors connected to the electronic module, which conductors are insulated from each other at least along a substantial length of the strap. Short circuiting of opposite ends of a single pair of the conductors followed by severance of plural ones of the insulated conductors, or short circuit in between separate conductors can be detected by the electronic module as an alarm condition. Severance or misconnection of only one or a small number of the insulated conductors can be detected by the electronic module as not being an alarm condition.

Abstract: A ground fault circuit comprising: a power supply, and a transformer having a primary winding driven by the power supply and a high voltage secondary winding, a shutdown control circuit having a controllable switch and a control input coupled to the controllable switch for causing operation of the controllable switch when a trigger voltage applied to the control input is exceeded, the shutdown control circuit being coupled to the power supply for controlling shut-down of the power supply when the switch is in operation, a circuit connected to the high voltage secondary winding for detecting leakage current from the transformer to ground, for short circuiting an A.C. component of the leakage current passing through the detector to ground, and for deriving a D.C. voltage from D.C. leakage current from the transformer to ground, and a circuit for applying the derived D.C.

Abstract: A power saving circuit for metal oxide silicon field effect transistors (MOSFETS) comprised of an MOS circuit comprising low threshold voltage MOSFETs, at least one MOS FET switch connected in series between the low threshold MOSFET and a power rail, at least one MOSFET switch being of low threshold voltage type similar to MOSFETS used in the MOS circuit, and apparatus for applying at least one control signal to the at least one MOSFET switch for enabling the at least one MOSFET switch to turn on and off, the at least one control signal having a voltage of at least one of VPP and VBB, wherein VPP is more positive than a normal power rail operating voltage VDD, and VBB is more negative than a normal opposite power rail operating voltage VSS.

Abstract: A method of processing an electromagnetic signal received and contained completely within the bounds of a two dimensional signal detection array, is comprised of (a) determining a position of the signal in a large window on the detector array, (b) reducing the dimensions of the window by a predetermined ratio with the position of the signal at the center thereof, (c) locating the position of the signal in the reduced size window (d) repeating steps (b) and (c) until the window is a predetermined number of pixels in size, and (e) continuously monitoring the presence and location of the signal.

Abstract: A translation circuit for mixed logic voltage signals is comprised of a first pair of self-biasing common-mode level shifters for receiving positive and negative polarity input signals respectively of a balanced input signal, each level shifter having a control input for receiving a ratio control signal, and having first level shifter nodes for providing the same polarity output signals, a second pair of self-biasing common-mode level shifters, each connected in parallel with a corresponding variable ratio level shifter, the second pair of level shifters having fixed level shift ratios, a circuit connected to level shifter nodes of the second pair of level shifters for providing and storing a signal which is a sum of voltages appearing at the level shifter nodes, and a circuit for applying the stored signal to the control inputs.

Abstract: A random access memory chip comprising static random access storage elements, word lines and bit lines connected to the storage elements, a sense amplifier connected to each of the bit lines, a separate processor element connected to each of the sense amplifiers, apparatus for addressing a word line, and apparatus for applying a single instruction to the processor elements, whereby the instructed processor elements are enabled to carry out a processing instruction in parallel on separate bits stored in the storage elements of the addressed word line. A method of operating a digital computer comprising in one operation cycle, addressing a memory, reading each of a row of data from the memory in parallel, and performing an operation function on each bit of the data in parallel to provide a result.

Abstract: A dual band, dual polarized antenna comprising an array of resonators in a plane for radiating at a first frequency, a ring resonator in a plane, the array of resonators being contained within a projection of the boundary of the ring resonator, the ring resonator for radiating at a second frequency which is lower than the first frequency, apparatus for exciting the array of resonators to cause them to radiate at the first frequency with dual polarizations simultaneously, and apparatus for exciting the ring resonator to cause it to radiate at the second frequency with dual polarizations simultaneously.

Abstract: A method of operating a communication switching system in conjunction with a PBX comprising: storing at the PBX equipment station identifiers in association with directory numbers, storing at the switching system the station identifiers in conjunction with the directory numbers and a PBX identifier, in the event of a station connected to the PBX going offhook, looking up at the PBX a station identifier associated with a directory number assigned to the offhook station, transmitting the looked up station identifier to the switching system, and upon receiving the transmitted station identifier at the switching system, looking up the corresponding directory number, and changing characteristics of a line between the switching system and the PBX over which communication is to take place, to suit predetermined characteristics based on the corresponding directory number.

Abstract: A method of addressing a computer subsystem memory comprised of establishing an aperture having a predetermined page size, addressing the memory at address boundaries defining multiples of half the page size, and reading or writing a page of data from or to the subsystem memory using the established aperture at consecutive memory locations beginning at one of the boundaries.

Abstract: A telephone series equipment line circuit for connection between a central office (CO) line and a terminal equipment (TE) line comprising a filter connected between the lines for blocking message signals from passing therebetween and for passing direct current (DC), a DC bypass circuit including a first series switch apparatus connected between the lines around the filter, series equipment connected via a DC blocking circuit and second series switching apparatus to the lines, the first switch apparatus being open and closed reciprocally to the second switch apparatus.

Abstract: A method of performing phase-frequency comparison comprising the steps of receiving first and second clock signals; comparing the signals by triggering flip-flop circuits controlled by AND gates, and providing a first output when first signal is in advance of the second signal, and a second output when second signal is advance of the first signal.

Abstract: A method of determining network topologies comprising monitoring traffic received by devices connected in the network and traffic emitted out of the devices, correlating traffic out of the devices with traffic into the devices, indicating a network communication path between a pair of the devices in the event that the correlation of traffic out of one of the pair of the devices and into another of the pair of the devices is in excess of a predetermined threshold.

Abstract: A method of determining network topologies comprising monitoring traffic received by devices connected in the network and traffic emitted out of the devices, correlating traffic out of the devices with traffic into the devices, indicating a network communication path between a pair of the devices in the event that the correlation of traffic out of one of the pair of the devices and into another of the pair of the devices is in excess of a predetermined threshold.

Abstract: A method of operating a SAR system comprised of emitting a sequence of pulses toward a target, alternating characteristics of pairs of successive pulses, receiving reflected pulses from the target, passing the received reflected pulses through a filter, modifying parameters of the filter in step with the transmitted pulses to match the characteristics of the successive pulses in the event a time delay between pulse transmission and reception of a pulse reflected from a target is a fraction greater than an even multiple of a pulse period, and modifying the parameters of the filter in anti-synchronism with the successive pulses in the event a time delay between pulse transmission and reception of a pulse reflected from a target is less than a fraction greater than an even multiple of a pulse period.

Abstract: A method of driving a DRAM word line comprising initiating a word line active cycle from a leading edge of a row enable signal, applying a first voltage to a word line following and as a result of said leading edge, receiving a trailing edge of the enable signal and applying a boosted voltage to the word line following and as a result of the trailing edge.

Abstract: A method of converting video data from a YUV format to an RGB format comprising (a) performing a matrix transformation of Y, U and V pixel data of a set of possible Y, U and V parameters into corresponding R, G and B parameters, (b) determining whether the set of R, G and B parameters forms a first lookup table whose size exceeds the size of a particular memory space, (c) in the event the lookup table is too large for the memory space, truncating least significant bits of at least the U and V parameters, (d) repeating steps (a), (b) and (c) until the first lookup table fits the memory space, and then storing the first lookup table in the memory space, and (e) using the first lookup table to provide RGB pixel data using the YUV data as addresses thereto.

Abstract: A method of management of resources in a multiple process system providing a list of resource owner identities, storing in an owner list the identity of at least one process with a resource which the at least one process has a right to operate, and allowing only a process listed with a resource to use the resource.

Abstract: A method of rasterization of a polygon in a 3D draw engine, comprising storing data defining a polygon in a memory organized in pages, the polygon crossing a memory page boundary, comprising rasterizing a first portion of the polygon contained within a memory page, and subsequently rasterizing a second portion of the polygon which is located outside the memory page.

Abstract: An integrated multi-band and multi-polarization antenna array comprising: a plurality of first waveguides located in spaced parallel relationship, the waveguides being dimensioned so as to carry signals of a first wavelength, the waveguides containing slots in a first surface so as to radiate the signals carried by the first waveguides with horizontal polarization, a plurality of second waveguides located in spaced parallel relationship to each other and to the first waveguides, and bridging and abutting the first waveguides adjacent a second surface opposite the first surface, the second waveguides being dimensioned to carry signals of the first wavelength, the second waveguides containing slots in a surface parallel to the first surface so as to radiate signals carried by the second waveguides with vertical polarization, a third waveguide located in spaced parallel relationship to the first and second waveguides, dimensioned to carry signals of a second wavelength, and containing slots in a surface parallel