Patents Represented by Attorney, Agent or Law Firm Ralph E. Locher
  • Patent number: 6777303
    Abstract: A trench capacitor is formed with an insulation collar. After the formation of the trench, firstly an insulating layer is deposited, from which layer the insulation collar will be subsequently formed. Afterward, the trench is partly filled with a sacrificial filling material and a thin patterning layer is deposited thereon. Spacers are formed from that layer and cover the insulating layer in the upper region of the trench. Afterward, the sacrificial filling material and the insulating layer are completely removed in the lower region of the trench. As a result, the insulation collar is produced in the upper region of the trench.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: August 17, 2004
    Assignee: Infineon Technologies AG
    Inventors: Martin Schrems, Anke Krasemann, Moritz Haupt, Sabine Steck, Daniel Köhler
  • Patent number: 6778060
    Abstract: A winding for a transformer or coil includes a ribbon electrical conductor and at least one ribbon insulation material layer fitted thereto or applied as ribbon material thereto. The conductor and the insulating material layer are wound to form turns around a winding core along a winding axis. The individual turns of the winding have a predetermined winding angle with respect to the winding axis. A number of turns are located axially alongside one another form one layer, and at least two radially adjacent layers of turns are provided. A first layer of turns is radially adjacent to a second layer produced by changing the winding direction by folding the electrical conductor and the insulating material layer. The total angle, which is produced by the folding, between the longitudinal direction of the ribbon insulating material in the first layer and the corresponding direction of the second layer corresponds to twice the winding angle.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: August 17, 2004
    Assignee: ABB T&D Technologies Ltd.
    Inventors: Roland Hoffmann, Meinolf Otto, Benjamin Weber
  • Patent number: 6776411
    Abstract: A delivery for a machine for processing flat printing materials includes a pile-forming station wherein sheets conveyed to the machine in a processing direction are piled, a make-ready station located upline of the pile-forming station in the processing direction and having an insertion opening formed in a side wall thereof for inserting a pile underlay into the make-ready station, and a conveyor by which a pile underlay inserted into the make-ready station is movable into the pile-forming station, a pile underlay carrier disposed in the make-ready station, the pile underlay carrier having a support adjustable between a first level and a second level lower than the first level, the support, at the first level thereof, accommodating the pile underlay inserted into the make-ready station, the support being adjustably movable in a direction to the second level for transferring the pile underlay to the conveyor; and a machine for processing flat printing materials including the delivery.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: August 17, 2004
    Assignee: Heidelberger Druckmaschinen AG
    Inventor: Rainer Klenk
  • Patent number: 6777726
    Abstract: In a metal oxide semiconductor (MOS) field effect transistor configuration, a source, a drain and a gate are embedded between a semiconductor pillar that extends away from a semiconductor body and forms a body region. A filling insulator surrounds the semiconductor pillar and is situated on the semiconductor body for insulating the MOSFET.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: August 17, 2004
    Assignee: Infineon Technologies AG
    Inventor: Jenoe Tihanyi
  • Patent number: 6777924
    Abstract: A method and device allow testing functionally identical semiconductor devices on a programmable testing device. The semiconductor devices are placed in magazine devices and a uniform magazine interface with respect to the testing device is provided for similar semiconductor devices in different types of packages. The semiconductor devices are advantageously tested one after the other on a testing device essentially without deference to their type of package and without any mechanical conversions being necessary on the testing device.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: August 17, 2004
    Assignee: Infineon Technologies AG
    Inventors: Björn Flach, Wolfgang Ruf, Martin Schnell, Jörg Stippler, Andreas Logisch
  • Patent number: 6776670
    Abstract: A clamping spring for a spring terminal includes a fixed leg and an angular spring leg disposed resiliently on the fixed leg. An auxiliary spring leg is disposed resiliently on the fixed leg and acts with its spring force on the spring leg.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: August 17, 2004
    Assignee: Wieland Electric GmbH
    Inventor: Christian Süss
  • Patent number: 6777725
    Abstract: An integrated memory circuit of the type of an NROM memory includes recessed bit lines formed of a material having a low ohmic resistance. By recessing the bit lines with respect to the semiconductor substrate surface of a peripheral controlling circuit for an array of memory cells allows to form the word line lithography on a perfect or almost perfect plane so that the word line formation results in a production with higher yield and, therefore, lower costs for the individual integrated memory circuit.
    Type: Grant
    Filed: June 14, 2002
    Date of Patent: August 17, 2004
    Assignee: Ingentix GmbH & Co. KG
    Inventors: Josef Willer, Herbert Palm
  • Patent number: 6779124
    Abstract: The circuit has a clock input for supplying a first clock signal and a clock generator for generating a second clock signal, said clock generator being phase-locked with respect to the first clock signal. The clock output of the clock generator is connected to a control input of a data transmission unit used for outputting data from the circuit and/or for reading into the circuit essentially in synchronism with the first clock signal. The clock generator has at least two control loops connected in succession which are used for controlling the phase angle of the second clock signal, the first control loop being used to generate from the first clock signal at least two intermediate clock signals, each of which has a particular phase angle with respect to the first clock signal, and the second control loop being used to generate the second clock signal from the intermediate clock signals.
    Type: Grant
    Filed: March 19, 2001
    Date of Patent: August 17, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventors: Rainer Höhler, Gunnar Krause
  • Patent number: 6776661
    Abstract: A planar filter has a monolithic construction in order to suppress parasitic capacitances between signal electrodes and many signal pins which are led through a carrier and which each have a capacitor with a signal layer connected to the signal pin, a ground layer connected to ground and a dielectric layer separating the two layers. The electrodes of the capacitors are applied to the carrier, which forms the dielectric, is shaped as a block from a mass of a higher dielectric constant and, after shaping and perforation, is sintered and ground. The ground electrode covers the entire surface area of one of the side surfaces of the carrier, apart from pin lead-throughs of the signal pins and their surrounding area. The signal electrodes on the other side surface of the carrier form insular regions extending from the pin lead-throughs of the signal pins to the edge of the carrier.
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: August 17, 2004
    Assignee: Filtec Filtertechnologie fuer die Elektronikindustrie GmbH
    Inventors: Meinolf Dingenotto, Frank Wallmeier
  • Patent number: 6774649
    Abstract: A test system for conducting a function test of a semiconductor element on a wafer and a method for conducting the test includes a voltage source providing a supply voltage of the element being tested, two supply contact pins connected to the voltage source for applying the supply voltage to terminal pads of the element being tested, a read contact pin producing a currentless electrical read connection of the test system to a terminal pad of the element being tested, and a means for regulating the output voltage delivered by the voltage source based upon the electrical potential of the read contact pin. As such, the supply voltage of the semiconductor element can be adjusted more precisely in the function test.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventor: Udo Hartmann
  • Patent number: 6773956
    Abstract: A solder metal made of a eutectic or stoichiometric composition including at least two metallic or semiconducting elements is applied to a contact (of the semiconductor component, brought into contact with the metal layer of a metallized film and alloyed by heating into the metal layer of the film, thereby producing an electrically conductive connection having a higher melting point. A solder metal that is particularly suitable for such a purpose is the Bi22In78 (melting point 73° C.), Bi43Sn57, or In52Sn48, or BiIn, or BiIn2.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventors: Holger Huebner, Vaidyanathan Kripesh
  • Patent number: 6774682
    Abstract: A circuit configuration for driving a semiconductor switching element includes an output terminal for the connection of a semiconductor switching element, a capacitive charge storage configuration, which is coupled to the output terminal, a charging and discharging circuit having at least one input for feeding in at least one drive signal and an output connected to the capacitive charge storage configuration, and a discharging circuit with a connecting terminal. The connecting terminal is connected to the capacitive charge storage configuration and provides a discharging current for the charge storage configuration. A charging current or a discharging current for the capacitive charge storage configuration is available at the output depending on the drive signal. A method for driving the semiconductor switching element is also provided.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventors: Thomas Theobald, Ludwig Leipold
  • Patent number: 6773029
    Abstract: Objects of persons in a vehicle are detected with a sensor. The data of the sensor signal or evaluated sensor data are transmitted to a remote control unit for an occupant protection system. The sensor data are in addition stored in a device comprising the sensor if the control unit indicates that an impact has been recognized.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: August 10, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventors: Reinhard Hamperl, Gerhard Mader, Reinhard Rösl, Christoph Roth, Thomas Stierle, Alexander Waldmann
  • Patent number: 6773169
    Abstract: A method for coupling a surface-oriented opto-electronic element, particularly, a VCSEL laser diode, an LED, or a photodiode, with an optical fiber and an opto-electronic element for carrying out such a method, the opto-electronic element having a rotationally symmetrical protruding structure disposed symmetrically with respect to the optically active zone of the opto-electronic element, includes the steps of wetting the butt of the fiber and/or the protruding structure of the opto-electronic element with a transparent adhesive, moving the opto-electronic element and/or the fiber toward each other such that a substantially frictionless movement of at least one of the element and fiber can occur, waiting for a self-centering of the fiber and the protruding portion; and waiting for or bringing about a hardening of the adhesive for purposes of fixing the now-centered configuration between the fiber and the protruding portion.
    Type: Grant
    Filed: September 3, 2002
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventors: Karl-Joachim Ebeling, Jochen Heinen, Christian Hanke
  • Patent number: 6773854
    Abstract: A method for producing a perforated mask for particle radiation includes calculating values of an elasticity of adjacent cells of a mask with respect to longitudinal and shear stresses in a main plane of the mask on a model of the desired pattern of mask openings. For the respective individual cells, length and direction of all the edge sections of the openings and cross-sectional areas of the openings are determined. Therefrom, statistical parameters are derived, which are used as a variable in preselected empirical functions to determine the elasticity values of the cells analytically. By linking the elasticity values determined with deformation forces to be expected, the vector field of a distortion of the mask to be expected is calculated by FE calculation. For cutting the mask openings into a blank, a pattern is selected that represents the desired pattern with a distortion being the inverse of the previously calculated distortion.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventors: Albrecht Ehrmann, Ernst Haugeneder, Frank-Michael Kamm, Alexander Petraschenko, Stefan Schunck
  • Patent number: 6774456
    Abstract: A configuration of fuses in a semiconductor structure having Cu metallization planes is provided. The semiconductor structure has an Al metal layer on the topmost interconnect plane for providing Al bonding pads. The fuses are configured as Al fuses and, in the semiconductor structure having Cu metallization planes, are provided above the diffusion barrier of the topmost Cu metallization plane but below a passivation layer.
    Type: Grant
    Filed: December 10, 2001
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventors: Andreas Rusch, Jens Moeckel
  • Patent number: 6774005
    Abstract: At least a partial layer of an upper capacitor electrode is formed by metal carbide, preferably by a transition metal carbide. In one embodiment, the metal carbide layer is formed by depositing an alternating sequence of metal-containing layers and carbon-containing layers on top of one another and then subjecting them to a heat treatment, in such a manner that they mix with one another. The patterning of the layer sequence can be carried out before the carbide formation step.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventors: Martin Gutsche, Peter Moll, Bernhard Sell, Annette Sänger, Harald Seidl
  • Patent number: 6773986
    Abstract: To achieve a highest possible integration density in a semiconductor memory device having storage capacitors as storage elements, the method according to the invention forms the capacitor devices in substantially vertically extending fashion, to, as a result, achieve a substantially three-dimensional configuration and an configuration extending into the third dimension for the capacitor devices, a contact connection of the storage capacitors being formed after the production of the storage capacitors.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: August 10, 2004
    Assignee: Infineon Technologies AG
    Inventors: Rainer Bruchhaus, Gerhard Enders, Walter Hartner, Matthias Krönke, Thomas Mikolajick, Nicolas Nagel, Michael Röhner
  • Patent number: 6773505
    Abstract: A method for the sublimation growth of an SiC single crystal, involving heating up under growth pressure, is described. In the method for the sublimation growth of the SiC single crystal, a crucible holding a stock of solid SiC and an SiC seed crystal, onto which the SiC single crystal grows, is evacuated during a starting phase which precedes the actual growth phase and is then filled with an inert gas, until a growth pressure is reached in the crucible. Moreover, the crucible is initially heated to an intermediate temperature and then, in a heat-up phase, is heated to a growth temperature at a heat-up rate of at most 20° C./min. As a result, controlled seeding on the SiC seed crystal is achieved even during the heat-up phase.
    Type: Grant
    Filed: January 7, 2002
    Date of Patent: August 10, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventors: Harald Kuhn, Rene Stein, Johannes Voelkl
  • Patent number: D494332
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: August 10, 2004
    Assignee: BSH Bosch und Siemens Hausgerate GmbH
    Inventor: Jörg Schröter