Abstract: A semiconductor circuit apparatus including several semiconductor substrates interconnected by having elevated portions of one substrate contacting the surface of the second substrate where both substrates include at least one electrical circuit. Also included is a method for forming this three dimensional integrated circuit structure by forming the elevated portions of the semiconductor substrate by applying an orientation-dependent etch and then applying an electrically conductive coating to this elevated portion. Electrically conductive bonding pads are formed on the second semiconductor substrate. These pads are selectively positioned relative to the elevated portions formed on the first semiconductor substrate. Contacts between the first and second substrate are formed by forming bonds between the elevated portions on the one substrate and the electrically conductive pads on the second substrate.

Abstract: A semiconductor memory device is constructed so that a plurality of word lines may be simultaneously selected by the transfer of information through a plurality of shift register positions of a shift register, wherein the respective shift register positions are connected to individual word lines. Simultaneously with the selection of the word lines, data may be written in or readout from the memory. The shift register is part of an address decoder which also includes logic circuits providing first and second selector devices. The first selector device is connected between a control circuit and the initial shift register position, while the second selector device is connected between the control circuit and each of the plurality of shift register positions arranged in parallel. When the first selector device is activated by a first control signal from the control circuit, binary data is clocked through each of the shift register positions.

Abstract: This invention relates to a power supply circuit wherein first transistors, resistors, ann sscood rajsitoos itt a polarity opposite to that of said first transistors are series-connected between the power supply side and the output side. In one embodiment, the circuit is provided as a semiconductor integrated circuit wherein first transistor elements, diffusion resistor elements, and second transistor elements with a polarity opposite to that of said first transistor elements are respectively formed on a common semiconductor substrate together with interconnects.

Abstract: Neural network systems (100) with learning and recall are applied to clustered multiple-featured data (122,124,126) and analog data.

Abstract: Calculating machine comprising a microprocessor (1) controlling the operations carried out by the machine, a stack (2) of shift registers connected to the microprocessor and intended for the temporary storage of the numbers with which the operations are to be carried out, a read only memory (ROM) (7) containing the programs relating to the functions of the machine, a display controller (5) connected to the microprocessor (1) and to the ROM (7) and a screen (10) for displaying results, characterized in that it furthermore has means for displaying on the display screen (10) of the machine educational information relating to the mathematical rules governing the operation carried out by the machine.

Abstract: To reduce the dark current to be produced in a semiconductor charge-coupled device, the device is fabricated by preparing a layer of a doped semiconductor having an insulator layer thereon, forming a plurality of transfer electrodes on said insulator layer, and reducing the surface state at the interface between said semiconductor layer and said insulator layer at least over its areas underlying the transfer electrodes.

Abstract: Gas flow structures are described for the inputting and exhausting of gases for a continuous vapor deposition reactor to cause an even flow of gases within the reactor chamber and to prevent the deposition of reaction material on the walls of the reactor chamber. Gas inlet and exhaust port structures are provided for multiple-chamber chemical vapor deposition reactors having gas input and exhaust junctions, wherein the ports may include, in order to provide uniform flow, baffles or a plurality of orifices with or without shutters. Two vertically spaced gas inlets may be used, wherein gas from a second inlet prevents deposition on the reactor chamber from gases introduced through the first inlet.

Abstract: A semiconductor IC device comprising a memory cell wherein a word line is buried in a groove formed in a semiconductor layer, a transfer gate transistor is constructed by the word line and a side area thereof, and on the surface of the semiconductor layer there is formed a capacitor having one electrode being a source or drain region of the transfer gate transistor and a dielectric film contacting with the electrode.

Abstract: An electronic handheld arithmetic learning aid which includes a speech synthesis device, a speaker driven by the speech synthesis device, a memory having digital data stored therein from which a plurality of mathematical problems may be derived for presentation to an operator for solution, and a controller for accessing selected portions of the digital data from the memory for input to the speech synthesizer device in presenting the mathematical problems to the operator in an audibly voiced manner via the speaker. In one aspect, at least some of the mathematical problems derivable from the memory involve respective sets of at least two individual numbers from which the operator is expected to determine a particular mathematical relation in providing a solution to the corresponding mathematical problem.

Abstract: An echo effect is synthesized in a coded digital sound signal. An input sound signal is stored as a plurality of sequential frames of similar duration, each frame (n) having characteristics including an energy (E). A delay period (d) is selected as equal to a number of time. For each frame (n) later than the duration of frames of the delay (d), the energy E(n) of the frame is compared to an attenuated energy aE(n-d) of an earlier frame (n-d), which is earlier in time than frame (n) by a number of frames equal to the delay (d). If the energy E(n) is less than the attenuated energy aE(n-d) of the earlier frame, the current frame is replaced in an output sequence with a new frame having the non-energy characteristics of the earlier frame and the attenuated energy.

Abstract: A track system is used in a continuous chemical deposition reaction system to guide semiconductor wafer carriers through a plurality of interconnected reaction chambers to position the carriers in each reaction chamber, and to prevent wear to the bottom of the reactor chambers.

Abstract: A data communication system in which a host data processing system is responsive to an automated sequence of data processing request signals from a remote data processing system. The remote data processing system includes a means for generating and storing in a nonvolatile read/write memory a log on signal which initiates the communications and causes the host system to be responsive to the remote system, a plurality of data processing request signals specifying operations to be performed by the host system and a log off signal for terminating the data communications. Special data processing request signals may include a predetermined delay before transmission of the next data processing request signal by the remote system or may require the host system to transmit a predetermined response signal in order to enable continuation of the sequence of data processing request signals from the remote system.

Abstract: A method of employing a semiconductor memory system in the storage and readout of video signal data, wherein first and second FIFO memories are utilized in a tandem manner to perform video-related operations in a plurality of functional modes, such as a flicker free mode, picture-in-picture mode, teletext mode, multi-picture mode, stroboscopic mode and still picture mode.

Abstract: A synchronous circuit system comprises a switch circuit for receiving an asynchronous imput signal only within a specified period in response to a synchronizing signal, a latch circuit connected to the switch circuit, a signal transmission circuit connected to the output of the latch circuit and adapted for holding the logic state thereof as before until a necessary input level of the asynchronous input signal is reached, and a feedback circuit connected between the output of the latch circuit and the output of the switch circuit.

Abstract: Trace quantities of elemental iodine are added to deionized water used in the manufacture of semiconductor materials and devices in order to sterilize the water and the delivery system of microscopic life forms, and to leave the iodine in the flow all the way through processing except for those process steps where iodine may be detrimental to the process step.

Abstract: An interconnection device is disclosed that is connected between a semiconductor device to be tested and the tester to match the device output impedance with the load applied to the semiconductor device and to prevent reflection on input waveforms in propagation delay measurements.

Abstract: A processing apparatus and method for anisotropically etching thin film metal (e.g. tungsten) under plasma bombardment conditions by using a feed gas mixture which includes a fluorine source (such as SF.sub.6) plus a bromine source (such as HBr), plus a very weak oxygen source (e.g. carbon monoxide). This chemistry provides anisotropic high rate fluoro-etching with good selectivity to photoresist.

Abstract: Method of encoding speech signals which is based upon determining the roots of the linear prediction polynomial describing the spectrum of an analog speech signal, wherein the roots are candidates in determining the formants of the speech signal. The method involves the analysis of respective frames of sampled digital speech data using a linear predictive technique to determine a set of reflection coefficients or K-parameters which are then converted into the equivalent predictor coefficients or A-parameters describing a prediction polynomial having a plurality of roots corresponding to the poles of an all-pole filter characterizing the vocal tract. A modified Bairstow technique is then empolyed for factoring out quadratic factors which are then sorted in an ordered arrangement in terms of ascending bandwidths.

Abstract: A solder paste mixture for soldering surface mount devices to a circuit board using a reflow soldering process which utilizes a vapor phase furnace. The solder paste mixture has a metallic content which is 63% tin and 37% lead. The metallic content of the paste consists of 150 micron particles of 100% tin and 150 micron particles of an alloy of 10% tin and 90% lead. Included in the process of soldering components to the circuit board is the step of prebaking the circuit board with solder paste and components in their proper place on the board.

Abstract: An insulated-gate field-effect semiconductor device comprising a silicon substrate of a first conductivity type, heavily doped source and drain regions of a second conductivity type in the substrate, a plurality of island regions of the second conductivity type in the substrate, the heavily doped island regions being located between the source and drain regions, a gate oxide layer on the surface of the substrate, and a conductive layer having a portion on the gate oxide layer, the portion of the conductive layer being coextensive with the area of the substrate which intervenes between the source and regions. The conductive layer may have apertures respectively aligned with the island regions in the substrate and the conductive layer may be formed to be extensive throughout the area of the substrate which intervenes between the first and second heavily doped regions.