Patents Represented by Attorney Robert D. Marshall, Jr.

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  • FIR-based interpolation in advanced video codecs on VLIW processor
    Patent number: 7778494
    Abstract: A half sample and quarter sample pixel value interpolation calculation classifies a set of all possible half sample and quarter sample pixel value interpolation calculations into a plurality of interpolation types. A function kernel for each interpolation type includes a half sample pixel and all quarter sample pixels whose value calculation depend on a value of said half sample pixel value. The correct function kernel is called invoking the corresponding value interpolation calculation. The function kernels operate iteratively over a plurality of macroblocks of at least two macroblock sub-partition sizes. The calculation of dependent quarter sample pixel values preferably employs a packed average instruction.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: August 17, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Pavan V. Shastry, Sunand Mittal, Anurag Mithalal Jain, Ratna M. V. Reddy
  • Systems and methods for secure debugging and profiling of a computer system
    Patent number: 7774758
    Abstract: The present disclosure describes methods and systems for secure debugging and profiling of a computer system. Some illustrative embodiments may include a system including a processor with a first processing stage and a first attribute register associated with the first processing stage, and including a memory system coupled to the processor. An instruction and an attribute value are stored within the memory system, wherein the instruction is loaded into the first processing stage and the attribute value is loaded into the first attribute register. Export of debug and profiling data from the first processing stage is disabled if the attribute value in the first attribute register indicates that the instruction in the first processing stage is a secure instruction, and further indicates that secure emulation is disabled.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: August 10, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Lewis Nardini, Manisha Agarwala, Oliver P. Sohm
  • Multiplexing aware sigma-delta analag-to-digital converter
    Patent number: 7760118
    Abstract: The present invention relates to an electronic device for analog-to-digital conversion including a sigma-delta modulator (SD), a digital filter (FIL) for digital post processing of the output signal of the sigma-delta modulator (SD), a multiplexer (MUX) for switching the input (INSD) of the sigma-delta modulator between a first input signal (IN1) and a second input signal (IN2), a memory (MEM) adapted to hold the register content of the digital filter relating to the first input signal while the second input signal (IN2) is processed in the digital filter, and a controller (CNTL) to retrieve the register contents from the memory (MEM) when processing of the first input signal (IN1) in the digital filter is resumed.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: July 20, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Volker Rzehak
  • Data processing condition detector with table lookup
    Patent number: 7761285
    Abstract: In support of data processing emulation, a data processing condition indicated by a predetermined number of digital data processing signals can be detected by applying the digital data processing signals to a lookup table (LUT) that is programmable according to how the digital data processing signals (23) indicate the data processing condition. The lookup table is responsive to said digital data processing signals for determining whether said data processing condition exists.
    Type: Grant
    Filed: June 7, 2006
    Date of Patent: July 20, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Auxiliary link control commands
    Patent number: 7747901
    Abstract: Control commands are transmitted via an emulation interface holding a test clock signal at a constant value and switching a test mode select signal a number of times corresponding to the control command. A receiving system counts switches of the test mode select signal switches while the test clock is constant and interprets the number of switches as a corresponding control command.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: June 29, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Image watermarking based on sequency and wavelet transforms
    Patent number: 7742619
    Abstract: This invention is a new approach for the image watermarking in the wavelet transform domain based on sequency of the host and watermark image. For each sub-band a first transform level of the host image is thresholded and binarized. Sequencies of thresholded and binarized data host image are compared with sequencies of the discrete wavelet transformed watermark image to form a watermarking sequency mask. The watermarked wavelet domain data is formed by combining data elements of the discrete wavelet transformed host image with corresponding data elements of the wavelet transformed watermark image as filtered by the watermarking mask. A reverse process can extract the watermark with a high degree of accuracy even after attack upon the watermarked host image.
    Type: Grant
    Filed: December 20, 2006
    Date of Patent: June 22, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Sanjeev Kumar, Raghuram Karthik Jayaraman
  • Poly phase solid state watt hour meters
    Patent number: 7737679
    Abstract: An electronic energy meter includes a first sigma delta modulator having an electrically isolated digital data output. A power supply stage coupled to a first electrical line provides a supply voltage to the first sigma delta modulator. A shunt device is also coupled to the first electrical line. The first sigma delta modulator is coupled via an input to the shunt device for measuring a current through the first electrical line. The electrically isolated digital output is isolated by a capacitive isolation barrier.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: June 15, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Volker Rzehak
  • Providing information associated with a cache
    Patent number: 7739453
    Abstract: An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is adapted to collect the information from caches on different cache levels, the information associated with a common address. The software also causes the processor to provide the information to a user of the software. The information comprises cache level and cache type information associated with a particular cache from one of the different cache levels.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: June 15, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Oliver P. Sohm, Brian Cruickshank, Gary L. Swoboda, Jagadeesh Sankaran
  • Method and system of profiling applications that use virtual memory
    Patent number: 7739668
    Abstract: A method and system of profiling applications that use virtual memory. At least some of the illustrative embodiments are methods comprising executing a traced program on a target system (the traced program comprising a plurality of tasks, each task using a different virtual to physical memory mapping), obtaining values indicative of a plurality of states of virtual to physical memory mapping used by a memory management unit associated with a processor of a target system, and displaying an indication of a proportion of an execution time the processor of the target system dedicated to each of a plurality of tasks during the execution time.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: June 15, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Brian Cruickshank, Oliver P. Sohm
  • ATA HDD interface for personal media player with increased data transfer throughput
    Patent number: 7739440
    Abstract: This invention is a method allowing for interfacing high speed hard disk drives (ATA-HDD) in high throughput PIO modes to currently available digital media processors (DMP). The prescribed interface programs signals available in the DMP external memory interface (EMIF) functions to match the requirements of ATA-HDD PIO functions. Selected signal redefinition and minimal glue logic is employed to form a seamless link between the EMIF I/O of the digital media processor DMP and the ATA-HDD hard drive.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: June 15, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Xiaoming Zhu
  • Paced trace transmission
    Patent number: 7739669
    Abstract: The trace interface and the trace receiver may be synchronized by the trace receiver controlling the pace of trace generation. The interface generates a clock signal coincident with valid trace data, and the trace receiver acknowledges the data by a change in state of an acknowledge signal. This enables generation of the next trace data point.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: June 15, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Sliding data buffering for image processing
    Patent number: 7728840
    Abstract: A method for managing image processing data buffers for processes having overlap input data between iterations includes loading a data buffer with an initial input data array and performing an image data array operation on the input data array. The method repeats the following steps for plural iterations including loading the data buffer with new input data forming a new input data array for a next iteration and performing the input data array operation on the new input data array. The overlap data consists of pixels at an end of each scan line. Loading new input data includes loading pixels following the overlap data for each scan line.
    Type: Grant
    Filed: September 7, 2004
    Date of Patent: June 1, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Ching-Yu Hung
  • Register file bypass with optional results storage and separate predication register file in a VLIW processor
    Patent number: 7725687
    Abstract: This invention makes each register bypass forwarding register explicitly addressable in software. Software chooses whether to access the forwarding register immediately eliminating the need for complex automatic detection. Each instruction executes and always writes its result into the forwarding register. Writing this data into the register file in the next cycle is optional as selected by the destination register file number. This invention separates registers storing predication data from the register file. This separation removes the speed problem by enabling scheduling of the predication computation out of the critical path.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: May 25, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Amitabh Menon, David J. Hoyle
  • Saving resources by deducing the total prediction events
    Patent number: 7720670
    Abstract: While PC trace is on, and the trace is in predication or general event profiling mode, trace hardware captures events in each cycle. Trace hardware inserts this information into data logs, and does a right shift to compact the data. The trace window will eventually close, either because tracing has been turned off, or because a periodic sync point is generated to reset the window. In either of these two cases, the data log may be incomplete, fully packed, or just overflow into the next packet. An index is generated pointing to the last valid location in the data log in order to save transmission bandwidth.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: May 18, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Manisha Agarwala
  • Efficient protocol for encoding software pipelined loop when PC trace is enabled
    Patent number: 7721267
    Abstract: A software pipelined loop tracing method involves inhibiting an output of trace data at a start of a software pipelined loop (SPLOOP). A skip in an output trace packet is indicated if the SPLOOP is skipped, and the SPLOOP is indicated at a cycle of an epilog state in the output trace packet if the SPLOOP is not skipped. An iteration count indication SPLOOP information and a position within a SPLOOP, is maintained. A periodic SPLOOP marker (PerSP) coinciding with a sync point is output if the SPLOOP is active.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: May 18, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Manisha Agarwala
  • Motion estimation using early decision for goodness of estimation with quick convergence feedback
    Patent number: 7720151
    Abstract: This invention is a method for speeding up block matching based motion estimation for video encoder. The invention 1) calculates statistics for a candidate motion vector for a predetermined fraction of the pixels of a macroblock, 2) makes an early decision based on this preliminary cost function, and 3) terminates the block matching process without calculating the cost function for other pixels if the preliminary cost function is not less than a predetermined threshold. This early decision for goodness estimation provides an economy of processing load when a large portion of data is left untouched (i.e. unprocessed). The present invention employs feedback control to reduce the predetermined threshold for quick convergence upon each detection of a better match.
    Type: Grant
    Filed: February 11, 2003
    Date of Patent: May 18, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Yuji Itoh, Ho-Cheon Wey, Ngai-Man Cheung
  • Speculative data loading using circular addressing or simulated circular addressing
    Patent number: 7721054
    Abstract: This invention prevents illegal memory address faults on speculative data loads. Circular addressing of the address pointer limits memory access to a range of addresses including all addresses used by the address pointer and not including any invalid addresses. The invention uses circular addressing hardware, if available on the data processor. If not available, this invention simulates circular addressing. This invention permits loads to be issued earlier than if predication were used and allows already predicated loads to be speculated without the overhead of a compound predicate. This invention can be used on processors without hardware supporting speculation.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: May 18, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Elana D. Granston, Jagadeesh Sankaran
  • Debug event instruction
    Patent number: 7721263
    Abstract: Last stall information is transmitted if the last stall standing function is enabled, one of the stall elements was active during the last clock cycle, no stall condition exists during the current cycle and the stall threshold has been met. Last stall standing operation provides a label associated with each stall period that exceeds a specified threshold. This provides the means to filter out some stall bursts to reduce trace bandwidth.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: May 18, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Command re-ordering in hub interface unit based on priority
    Patent number: 7716388
    Abstract: Command reordering in the hub interface unit (HIU) of Enhanced Direct Memory Access (EDMA) functions is described. Without command reordering in the EDMA, commands are issued by the HIU to the peripheral in order of issue. If the higher priority transfers are issued later by the EDMA, the previously issued lower priority transfers would block the higher priority transfers. Command reordering in the HIU causes transfers to be reordered and issued to the peripheral based on their priority. Reordering allows the EDMA and HIU to give due service to high priority transfer requests with decreased weight placed on the order in which the requests were issued.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: May 11, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Shoban Srikrishna Jagathesan, Sanjive Agarwala, Kyle Castille, Quang-Dieu An
  • LDO with large dynamic range of load current and low power consumption
    Patent number: 7714552
    Abstract: An electronic device has an LDO regulator for varying loads. The LDO regulator includes a primary supply node coupled to a primary voltage supply. An output node provides a secondary supply voltage and a load current. A bias current source generates a bias current. A gain stage coupled to the bias current source increases the maximum available load current. The gain stage includes a first MOS transistor biased in weak inversion coupled to a current mirror which mirrors the drain current through the first MOS transistor to the output node. The gate-source voltage of the first MOS transistor increases in response to a decreasing secondary supply voltage level at the output node to increase the available load current.
    Type: Grant
    Filed: August 22, 2008
    Date of Patent: May 11, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Johannes Gerber, Vadim V. Ivanov, Ruediger Kuhn