Patents Represented by Attorney Robert D. Marshall, Jr.

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  • Fixed-size cross-correlation computation method for audio time scale modification
    Patent number: 7580761
    Abstract: A time-domain time-scale modification method based on the synchronous overlap-and-add method consists of a generalization of the envelope-matching time-scale modification method. The cross-correlation function employs a fixed-size cross-correlation buffer to eliminate the need for normalization inside the search loop. This fixed-size cross-correlation buffer is the center of the overlap region corresponding to the case where the fine overlap adjustment value is set to zero. The computational cost of this invention is lower than any other method with a comparable quality.
    Type: Grant
    Filed: November 14, 2003
    Date of Patent: August 25, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Atsuhiro Sakurai, Yoshihide Iwata
  • Discrete-time convolution cycle reduction with programmable digital signal processor
    Patent number: 7580965
    Abstract: A programming algorithm reduces from ? (2N2) to ? (N2) the number of multiply-and-accumulate (MAC) instructions required to perform a discrete-time convolution on a programmable digital signal processor. Through the use of a single repeat instruction along with a single repeat count register, the algorithm dynamically changes the number of times the multiply-accumulate instruction is repeated depending upon the current term being convolved. The avoids performing the multiply-accumulate when one term is zero. The nature of the discrete-time convolution calculation and the flexibility of a re-programmable single repeat count register offers permits this. Additional instructions are required for data pointer alignment. The trade-off between reduced multiply-accumulate operations and the overhead required to achieve it is examined.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: August 25, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Steven R. Jahnke
  • Distinguishing between two classes of trace information
    Patent number: 7581139
    Abstract: A method of tracing activity of a data processor generates a trace data stream during a normal background mode and a foreground mode while servicing a real time interrupt during an emulation halt. An Interrupt During Suspend bit is set in foreground modes and transmitted in the trace data stream to distinguish the trace data streams between background mode and foreground mode.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: August 25, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Manisha Agarwala
  • Bus controller
    Patent number: 7581049
    Abstract: A single bus apparatus enables the simultaneous execution of both high-speed data transfer, which requires real time operation, and low-speed data transfer. At least one of slaves I/F 22-0, 22-1, . . . that control slave devices SV0-SV3 upon the request from master devices MS0-MS3 connected to interconnection bus BS via master I/Fs 21-0 through 21-3 has a constitution made of multiport slave I/F 23 corresponding to a multi-access function that allows simultaneous access from plural master devices MS0-MS3.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: August 25, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Yuzuru Tanabe
  • Software source transfer selects instruction word sizes
    Patent number: 7581082
    Abstract: This invention employs a 16-bit instruction set that has a subset of the functionality of the 32-bit instruction set. In this invention 16-bit instructions and 32-bit instructions can coexist in the same fetch packet. In the prior architecture 32-bit instructions may not span a 32-bit boundary. The 16-bit instruction set is implemented with a special fetch packet header that signals whether the fetch packet includes some 16-bit instructions. This fetch packet header also has special bits that tell the hardware how to interpret a particular 16-bit instruction. These bits essentially allow overlays on the whole or part of the 16-bit instruction space. This makes the opcode space larger permitting more instructions than with a pure 16-bit opcode space.
    Type: Grant
    Filed: May 8, 2006
    Date of Patent: August 25, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Todd T. Hahn, Eric J. Stotzer, Michael D. Asal
  • Independent source read and destination write enhanced DMA
    Patent number: 7577774
    Abstract: The present invention provides for independent source-read and destination-write functionality for Enhanced Direct Memory Access (EDMA). Allowing source read and destination write pipelines to operate independently makes it possible for the source pipeline to issue multiple read requests and stay ahead of the destination write for fully pipelined operation. The result is that fully pipelined capability may be achieved and utilization of the full DMA bandwidth and maximum throughput performance are provided.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: August 18, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Sanjive Agarwala, Kyle Castille, Quang-Dieu An, Hung Ong
  • Using super-pixels for efficient in-place rotation of images
    Patent number: 7576758
    Abstract: Rotation in the storage domain is a one-one function with the domain equal to the range. This permits an image to be rotated in place. Each image size implies at least one garland of closed chains of tiles. Each image includes a spanning set of these garlands. Rotation in place moves each pixel to the next location on its garland. On completion of a garland by return to the initial tile, tiles on the next garland are moved. Image rotation is complete after all the garlands have been traversed. This invention first linearized the two-dimensional tiles sliding into groups of super-pixels at contiguous locations above the image buffer. The tiles are rotated in place. The shuffled tiles are delinearized into rectangular blocks and then re-pitched if needed.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: August 18, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Sreenivas Kothandaraman, Joseph R. Zbiciak
  • Narrow band interference cancellation technique for OFDM transmitters
    Patent number: 7573960
    Abstract: A computational algorithm provides new and effective interference cancellation of the in-band spurious signals for the Orthogonal Frequency Division Multiplex (OFDM) transmitters. This new interference cancellation transmits non-zero tones may be used to cancel the interference generated by the modulated data signals. This minimizes the number of tones used and maximizes the interference suppression achieved at the same time. The technique described is one of active interference cancellation (AIC).
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: August 11, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Hirohisa Yamaguchi
  • Audio effect rendering based on graphic polygons
    Patent number: 7563168
    Abstract: A method to supply audio effects to video games employs graphics information of sound source objects and sound interacting objects in a real time physical model to determine the audio effects. Each sound source and sound interacting object is associated with a computer generated object in the graphical environment. The physical model determines how the sound interacts with the environment at the current object locations and applies the audio effects. The game designer does not need to dub in audio effects artificially in an add-on manner.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: July 21, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Steven R. Jahnke
  • Programmable extended compression mask for dynamic trace
    Patent number: 7562170
    Abstract: This invention provides trace address compression by comparing respective bytes of a current trace address with a stored comparison address. Only the least significant bytes of the current trace address that do not match the comparison address or are less significant than any section of the current trace address that does not match the comparison address are transmitted. This sometimes reduces the amount of data that needs to be transmitted. The comparison address is specified by a central processing unit via a memory mapped register write operation.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: July 14, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Lewis Nardini, Manisha Agarwala, John M. Johnsen
  • Distributed depth trace receiver
    Patent number: 7562259
    Abstract: Input processing limitations may be solved by placing multiple units in series, with each unit recording some portion of the incoming data. This requires the generation of simultaneous actions across units operating in series, with both the data recording and user command execution happening at the same point in the trace data stream.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: July 14, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Distributed width trace receiver
    Patent number: 7555682
    Abstract: Input processing limitations may be solved by placing two units in parallel, with each unit recording some portion of the incoming data. This requires the generation of simultaneous actions across units operating in parallel, with both the data recording and user command execution happening at the same point in the trace data stream.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Multi-port trace receiver
    Patent number: 7555681
    Abstract: A trace receiver with multiple recording interfaces is used to record the same input. This configuration may provide multiple recording interfaces and multiple recording channels. The recording channels may be in a single unit or in multiple units. Separate out of phase clocks may be used to time division multiplex data to be recorded.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Area efficient implementation of the consecutive access counter
    Patent number: 7555005
    Abstract: An arbitration unit grants access to a shared resource to one of a plurality of devices. A consecutive access register corresponds to each device. A consecutive access counter is operable to load data stored in a selectable consecutive access register and count down each operating cycle. An arbitration control unit selects one device for access to the shared resource from among all currently requesting access. Upon selection, the consecutive access counter is loaded from the corresponding consecutive access register. Access is re-arbitrated upon count down to zero. Time out registers and corresponding time out counters for each device permit advance to a higher priority after a time out following an ungranted request.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Soujanna Sarkar
  • Data transfer apparatus with channel controller and transfer controller capable of slave and standalone operation
    Patent number: 7555577
    Abstract: A data transfer control apparatus includes a channel controller and a transfer controller. The channel controller receives, prioritizes and queues data transfer requests. The transfer controller includes separate control of data source and data destination in a data transfer corresponding to the data transfer requests. The transfer controller includes a data transfer program register and active source and destination registers. The transfer controller operates from the active source and destination registers. Upon completion of a data transfer the transfer controller writes data transfer parameters from the data transfer program register to the active source and destination registers.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: June 30, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Roger K. Castille, Natarajan Kurian Seshan, Marco Lazar, Henry Duc C. Nguyen
  • Forming a semiconductor structure in manufacturing a semiconductor device using one or more epitaxial growth processes
    Patent number: 7550343
    Abstract: In one embodiment, a semiconductor structure used in manufacturing a semiconductor device includes a substrate layer. The structure also includes first and second isolation regions formed by etching an oxide layer provided on the substrate layer to define an epitaxial growth surface of the substrate layer for epitaxial growth of a substrate material on the epitaxial growth surface between the first and second isolation regions. The structure also includes an active region that includes the epitaxially-grown substrate material between the first and second isolation regions, the active region formed by epitaxially growing the substrate material on the epitaxial growth surface of the substrate layer.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: June 23, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Christoph A. Wasshuber
  • Data transfer with single channel controller controlling plural transfer controllers
    Patent number: 7546392
    Abstract: A data transfer control apparatus includes a channel controller and plural transfer controllers. The channel controller receives, prioritizes and queues data transfer requests. An event to transfer controller table enables recall of a transfer controller number corresponding to the data transfer request. The plural transfer controllers are independent and can operate simultaneously in parallel. Each transfer controller includes a read bus interface and a write bus interface which arbitrate with other bus masters in the case of blocking accesses directed to interfering devices or address ranges.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: June 9, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Roger K. Castille, Natarajan Kurian Seshan, Henry Duc C. Nguyen, Marco Lazar, Jason A. T. Jones
  • Authorization control circuit and method
    Patent number: 7546636
    Abstract: An authorization control circuit (10) comprises a digital signal processor (12) operable to provide digital data output, determine an authorization state, and generate a disable signal. A digital to analog converter (28,60) is coupled to the digital signal processor (12) and is operable to receive the digital data output. The digital to analog converter (28,60) generates analog data in response to the digital data output and is operable to output the analog data and mute the output of analog data. The digital to analog converter (28,60) includes an input (23,25,27,59) operable to receive the disable signal. The digital to analog converter (28,60) mutes the output of analog data in response to the disable signal.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: June 9, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Jason D. Kridner
  • Direct memory access channel controller with quick channels, event queue and active channel memory protection
    Patent number: 7546391
    Abstract: A data transfer control apparatus includes a channel controller and a transfer controller. The channel controller receives, prioritizes and queues event signals and predetermined memory writes which trigger data transfer requests controlling the transfer controller. The event queue stores event numbers mapped to parameter memory locations storing data transfer parameters. The mapping table and the parameter memory are writeable via a memory mapped write operation. Memory protection registers store data indicative of permitted data accesses to the memory map.
    Type: Grant
    Filed: May 12, 2006
    Date of Patent: June 9, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Roger K. Castille, Natarajan Kurian Seshan, Marco Lazar, Joseph R. Zbiciak
  • Relaxation oscillator based keypad decoder
    Patent number: 7541946
    Abstract: The keypad interface element of this invention uses a relaxation oscillator and a digital keypad processor having a counter/timer to decode specific keys. The RC portion of the relaxation oscillator includes a resistance ladder and a set of momentary on pushbutton switches disposed change resistance dependent upon which key is pressed. This causes the relaxation oscillator to produce an output signal having a corresponding frequency. The counter/timer of the digital keypad processor produces a count corresponding to the oscillator frequency. The digital keypad processor latches and holds a binary number specifically identifying the depressed key. A state machine in the digital keypad processor provides transient-free, noise immune keypad decoding.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: June 2, 2009
    Assignee: Texas Instruments Incorporated
    Inventor: Stephen J. Fedigan