Abstract: In one embodiment, a switching controller uses an auxiliary winding voltage of a transformer to form a signal representative of current flow through a secondary winding of the transformer.

Abstract: In one embodiment, semiconductor die are singulated from a semiconductor wafer by etching openings completely through the semiconductor wafer.

Abstract: In one embodiment, a power supply controller is configured to select either an error signal or a variable reference signal to control an on-time of the switching output signal of the power supply controller.

Abstract: A controller for a multi-phase switching power supply shuffles the sequence of the phases in response to a load transient to prevent synchronization of one or more phases with high-frequency load transients. The sequence may be shuffled by varying the frequency and/or sequence of the switching control signals to introduce a random variation in the phases.

Abstract: In one embodiment, a PWM controller is configured to inhibit forming a drive signal responsively to an overload sense signal having a value that is no greater than a first value for a first time interval and to form a first duration of the first time interval responsively to the overload sense signal.

Abstract: In one embodiment, a high voltage element is formed overlying a doped semiconductor region that can be depleted during the operation of the high voltage element includes a conductor overlying a space in a resistor.

Abstract: In one embodiment, a plurality of ESD devices are used to form an integrated semiconductor filter circuit. Additional diodes are formed in parallel with the ESD structures in order to increase the input capacitance.

Abstract: In one embodiment, silicide layers are formed on two oppositely doped adjacent semiconductor regions. A conductor material is formed electrically contacting both of the two silicides.

Abstract: Current protection in integrated circuit having multiple pads. Different types of current protection structures may be associated with different pads. A common current discharge or charge path may be used to provide current to or draw current from various of these heterogenic current protection structures. Since a common current discharge or charge path is used, the metallization used to formulate a discharge solution is significant simplified. Additionally, the protection structures may be provided with selectively conductive regions that are approximately radially symmetrical around the circumference of the pad. Accordingly, if the protection structures are slightly off center with respect to the bond pad (due to, for example, mask alignment error), the error in the amount of active region around the circumference of the pad is at least partially averaged out.

Abstract: In one embodiment, a semiconductor package is formed to include a leadframe that includes a plurality of die attach areas for attaching a semiconductor die to the leadframe. The leadframe is positioned to overlie another leadframe that forms some of the external terminals or leads of the package.

Abstract: In one embodiment, a power supply controller is configured to form both positive and negative supply voltages from a single input voltage so the maximum differential voltage across a load that uses the positive and negative supply voltages is no greater than the maximum value of the input voltage.

Abstract: A signal generation circuit that uses a waveform generation mechanism to generate predetermined waveform(s) when triggered. A triggering mechanism is configured to repeatedly trigger the waveform generation mechanism at times that are dependent on data provided by a data source. The predetermined waveform may be a bandwidth-limited pulse, but might also be a rising edge or a falling edge of a pulse. Various consecutive waveforms may be summed together to thereby formulate a continuous signal. The waveform may have particular characteristics by design.

Abstract: In one embodiment, a diagnostic circuit is used to test the on-resistance of a transistor.

Abstract: In one embodiment, an amplifier circuit is formed to minimize pop and click noise on the outputs of the amplifier circuit. The amplifier circuit is configured to place an output stage of the amplifier circuit in a high impedance state to minimize the pop and click noise. In another embodiment, the amplifier circuit is configured to couple the inputs of two amplifiers together to minimize the pop and click noise.

Abstract: In one embodiment, a current sense circuit is formed with a pair of series connected switches that are used to steer a load current and form a current sense signal.

Abstract: In embodiment, a power supply system is configured to use a linear regulator to form a regulated voltage during a standby mode and to use the regulated voltage to form another regulated voltage.

Abstract: In one embodiment, a transistor is formed to have a first current flow path to selectively conduct current in both directions through the transistor and to have a second current flow path to selectively conduct current in one direction.

Abstract: In one embodiment, a charge pump controller is configured with transistors having at least two different selectable on-resistance values may be used to charge a pump capacitor.

Abstract: A controller for a multi-phase switching power supply shuffles the sequence of the phases in response to a load transient to prevent synchronization of one or more phases with high-frequency load transients. The sequence may be shuffled by varying the frequency and/or sequence of the switching control signals to introduce a random variation in the phases.

Abstract: In one embodiment, a power supply controller is configured to operate in a test mode that facilitates measuring the value of an output signal of an error amplifier of the power supply controller.