Abstract: In one exemplary embodiment, a multi-chip connector is formed to have a first conductive strip that is suitable for attaching to a first semiconductor die and a second conductive strip that is attached suitable for attaching to a second semiconductor die.

Abstract: A tuner having one or more digitally controllable tuning components may be coupled to an analog feedback compensation network in a target switching power supply controller to adjust the compensation while the power supply is operating. A communication interface couples the tuner to a host having a software interface to enable a user to adjust the values of the tuning components. The tuner may include components to adjust the values of a feedback network, an input network, a ramp adjust component, etc., on the target controller.

Abstract: In one embodiment, an amplification circuit charges a filter capacitor (14) and an input capacitor (12) with a substantially constant current and subsequently forms a delay prior to operating the amplification circuit to amplify input signals.

Abstract: In one embodiment, a class-D amplifier (11) is configured to form first (DP) and second (DN) PWM signals each having a duty cycle that is proportional to a received analog input signal (12) and responsively to enable a switch (31, 32) to short the outputs (13, 14) of the class-D amplifier (11) together responsively to some states of the first (DP) and second (DN) PWM signals.

Abstract: In one embodiment, a power supply controller is configured to operate a plurality of switches in a buck-boost mode to control an output voltage wherein at least one switch of the plurality of switches is enabled for a substantially fixed portion of a cycle of the buck-boost mode.

Abstract: In one embodiment a transistor is formed with a gate structure having an opening in the gate structure. An insulator is formed on at least sidewalls of the opening and a conductor is formed on the insulator.

Abstract: In one embodiment, a sensing circuit includes a sense transistor and a compensation circuit to improve the accuracy of a sensing signal formed by the sensing circuit.

Abstract: A power supply controller (25) is configured to accurately adjust the value of an output voltage of a power supply system (10) responsively to the output voltage increasing to an undesirable value. The controller (25) accurately limits an upper value of the output voltage during a light load condition, and rapidly reduces the value of the output voltage to a desired value. The power supply controller is configured to turn off the first output transistor but inhibit turning off the second output transistor using two different control signals.

Abstract: In one embodiment, an ESD device is configured to include a zener diode and a P-N diode and to have a conductor that provides a current path between the zener diode and the P-N diode.

Abstract: In one embodiment, an LED control circuit is configured control a current through an LED responsively to a value that is proportional to a control signal for values of the control signal that are less than a threshold value of the control signal and to control the current to a value that is proportional to the threshold value for values of the control signal that are greater than the threshold value.

Abstract: In one embodiment, a semiconductor package is formed to include a tamper barrier that is positioned between at least a portion of the connection terminals of the semiconductor package and an edge of the semiconductor package.

Abstract: In one embodiment, an EEPROM device is formed to include a metal layer having an opening therethrough. The opening overlies a portion of a floating gate of the EEPROM device.

Abstract: In one embodiment, a charge pump converter is formed to use various values of an output voltage to selectively control a value of a charging current during a charging cycle of the charge pump converter.

Abstract: In one embodiment, a Schottky diode is formed on a doped region having a thickness less than about eighteen microns.

Abstract: In one embodiment, a two terminal multi-channel ESD device is configured to include a zener diode and a plurality of P-N diodes.

Abstract: A level-shifter circuit capable of operating at low voltages. Two complementary current paths are provided between each of two intermediate nodes (at least one of which being an output node) and one of the supply voltages. A network of field-effect transistors are coupled between the other voltage supply and the intermediate nodes. The transistors include a pull-up (or pull-down as the case may be) transistor pair coupled to the high (or low as the case may be) voltage supply. There are two cascode transistor pairs coupled between the pull-up (or down) transistors and the corresponding intermediate node. One cascode pair couples the respective intermediate node to the drain terminal of the respective pull-up (or down) transistor. The other cascoded pair cross-couples the intermediate node to the gate terminal of the opposite pull-up (or down) transistor.

Abstract: In one embodiment, a switch capacitor controller (20) is configured to use a drive signal (45) to drive the switched capacitor (26) with a signal having a time dependent transition time.

Abstract: In one embodiment, a method of forming a high voltage element includes forming a sense element overlying at least a portion of a semiconductor substrate, and also includes operably coupling a first circuit to use a sense signal formed by the sense element for one of detecting a line under-voltage condition, detecting a line over-voltage condition, determining input power, limiting input power, power limiting, controlling standby operation, a line feed-forward function for current mode ramp compensation, regulating an output voltage, or detecting an energy transfer state of an energy storage element.

Abstract: In one embodiment, an oscillator circuit is configured to oscillate at a base frequency. The oscillator is configured to receive a synchronization signal and restart a period of the oscillator signal responsively to the synchronization signal.

Abstract: In one embodiment, semiconductor die are singulated from a semiconductor wafer by etching openings completely through the semiconductor wafer.