Abstract: In one embodiment, a battery charger is configured to provide a normal charge current during a first time period and to supply a maintenance current after the first time period expires.
Abstract: In one embodiment, a multi-function signal sensor is configured to receive a signal having a plurality of states and to offset the input signal by a first amount for values of the input signal that are greater than a first value.
Abstract: In one embodiment, a PWM controller is configured to form a control signal that has reduced noise. The control signal is used to adjust a frequency of a clock signal of the PWM controller.
Abstract: In one embodiment, a power supply controller uses a first clock of a first frequency to initiate a PWM cycle in a first operating mode and uses a second clock having a higher frequency to initiate a PWM cycle in a second operating mode.
Abstract: A power supply controller determines the value of an input power and uses the value of the input power to regulate a value of the output voltage.
Abstract: A power supply controller (10, 60, 70) uses a negative current (36) of a power transistor (16, 71) to detect the valley point for enabling the power transistor when driving an inductor (17). The negative current occurs when the inductor is de-magnetized and can be used for controlling the time to enable the power transistor.
Abstract: In one embodiment, a power factor correction circuit is configured to use a stored value of a feedback signal to assist in regulating the value of an output voltage and to bypass the sample and hold circuit if the output voltage increase to an upper limit or decreases to a lower limit.
Abstract: In one embodiment, a fan out buffer has the inputs of a plurality of output followers connected to the output of a plurality of distribution gates.
Abstract: In one embodiment, a secondary-side controller is configured to detect a burst-mode of operation and responsively block or prevent sending drive pulses to a power transistor that is coupled in the secondary side.
Abstract: In one embodiment, a programmable voltage regulator stores data representing a programmable configuration of the regulator. The regulator is configured to verify the validity of the stored data before using it to control the operation of the programmable voltage regulator.
Abstract: In one embodiment, a voltage protection circuit uses two back-to-back transistors to receive an unprotected voltage and form a protected voltage.
Abstract: An EPROM cell includes a control gate and a control transistor. A portion of the control transistor is formed as a portion of the control gate.
Abstract: In one embodiment, a PWM power supply controller asserts a PWM control signal synchronously to a clock signal of the PWM controller and also asserts the PWM control signal asynchronously to the clock signal.
Abstract: In one embodiment, a power supply controller generates a PWM control signal that is subsequently used to control a portion of current flow in a primary side of a power supply system. THE PWM control signal is coupled to a secondary of the power supply system and used to control a synchronous rectifier that is coupled within the secondary side.
Abstract: In one embodiment, a high voltage element is formed overlying a doped semiconductor region that can be depleted during the operation of the high voltage element.
Abstract: In one embodiment, a transistor is formed to use two conductors to make electrical connection to one of the active regions of the transistor.
Abstract: In one embodiment, a power supply controller has a variable frequency oscillator that is used for controlling a PWM controller. The power supply controller varies a frequency of the variable frequency oscillator.
Abstract: In one exemplary embodiment, a multi-chip semiconductor connector is utilized for forming a semiconductor package having a plurality of semiconductor die. The multi-chip semiconductor connector is utilized to mechanically attach the plurality of semiconductor die together and to provide electrical connection to the plurality of semiconductor die.