Abstract: An FET high frequency analog amplifier circuit employs a feed-forward technique to provide a first order correction of amplifier distortion. In one embodiment, the amplifier is configured as a differential set of cascode FET stages. A linearization stage is connected across the output cascode transistors to provide a cancellation signal to reduce amplifier nonlinearities. The linearizing circuit includes a pair of field effect transistors in source-coupled arrangement with their respective bases driven by the drains of the differential amplifier input transistors. The gates are further driven by biasing current sources. The drains of the linearizing transistors are cross connected to the drains of the cascode output transistors, thereby injecting a compensating error signal into each differential output node and cancelling circuit nonlinearities. The amplifier is well suited for fabrication in integrated circuit form, especially using gallium arsenide technology.

Abstract: In a graphics display system, a cursor is used to pan a viewport relative to a block of stored information only part of which is selectable to be viewed through the viewport. As long as a cursor remains within the viewport, it can be utilized in a conventional manner under the control of a mouse or the like to provide interaction with display information. When the cursor is moved outside the viewport of the display, the viewport is panned to include the cursor.

Abstract: A cable strain relief clamp assembly to securely hold a bundle of flat cables while providing quick assembly/disassembly from the main unit chassis. Identical clamp halves are positioned and fastened at a specified location on the cable bundle. The clamp (with the attached cable) is then snapped onto a bracket to become a subassembly unit. The bracket mates with the main unit chassis utilizing a snap fit detail oriented perpendicular to typical cable axial forces, thus fixing the cables in place. Accommodating varied thicknesses and numbers of cables can be accomplished by varying the aperture of the clamp. The clamp may also provide an electrical ground path between cable and chassis. Other features of the present invention are that: (1) multiple cables and varied widths can be accomplished; (2) it can be detached from main unit chassis without use of fasteners; (3) it does not depend on termination of the cables in male/female relationship; and (4) a consistent part outline is provided for all applications.

Abstract: The present invention provides a parallel or "flash" analog-to-digital converter circuit (A) including a plurality of voltage comparators (20a-20g) arranged in first and second sets (F and E) adapted for receiving separate analog input signals. A push-pull configuration is employed in providing the analog input signal to the comparators of the two sets. The analog inputs (22a-22d) of the comparators (20a-20d) in the first set are provided in input signal V.sub.1 and the analog inputs (22e-22g) of the comparators (20e-20g) in the second set are provided an input signal V.sub.2 of equal magnitude but opposite polarity. Different reference voltages are provided to the reference inputs (24a-24g) of the comparators by a series-connected resistor network (H). Two encoders (I and J) and an adder (K) are used to detect the number of output signals from the comparators in a similar logic state and provide a digital binary output signal corresponding to the number of such outputs.

Abstract: A sample and hold network samples an input data signal at a periodic rate by differentiating the input data signal and multiplying it in an analog multiplier by a strobe signal, whose spectrum extends to at most twice the highest frequency in the data input signal. The output of the multiplier is combined in a differential amplifier with the input data signal to provide an output having a slope which is zero and also equal to the input data signal at times that are integral multiples of the period of the strobe signal.

Abstract: A method for providing test vectors adapted to test very large scale integrated circuit devices includes the steps of measuring testability employing a test counting procedure to provide a plurality of test count matrices. Sensitivity values are then enumerated by driving individual sensitivity values forwardly and rearwardly through the circuit, starting at the input terminals, until the test counts are accumulated. The enumerations define test vectors capable of testing the actual circuit. If the circuit includes reconvergent fanout loops, then these loops are enumerated first to provide partial solutions adopted during subsequent global enumeration.

Abstract: An active load network for a device under test includes a logic circuit for anticipating the output state of the device under test and for turning on either a current source of a current sink to properly load its output. The current sink and current source each comprise a pair of CMOS transistors connected in series. One of each transistor pair turns on to either source or sink current and the other provides a variable impedance controlled by the voltage at its gate to regulate the amount of current. A pull-to-center transmission gate is also provided which pulls the output of the device under test to a level between a logic high and logic low when it is turned off.

Abstract: An error correction circuit (16) corrects errors in the thermometer code (T.sub.1 -T.sub.7) developed by a parallel or "flash" analog-to-digital converter (10). The error correction circuit employs plural similar bit exchange modules (34) of which each includes a 2-input OR gate (46) having common inputs (48 and 50) that constitute the inputs of the bit exchange module. The output (52) of the AND gate and the output (54) of the OR gate constitute the outputs of the bit exchange module. The bit exchange modules receive the digital-to-analog converter thermometer code and are interconnected to correct errors therein resulting from the presence of more than one transition between different logic states for adjacent bits in the thermometer code. The error correction circuit manipulates the thermometer code bits to provide a corrected thermometer code (T.sub.1C -T.sub.7C) that has only one transition between different logic states for adjacent bits thereof.

Abstract: A variable impedance driver network comprises a plurality of transmission gates connected in parallel between a voltage source and an output. Each transmission gate has a predetermined nominal impedance and by turning on selective gates the overall impedance of the network may be adjusted to match that required at the output.

Abstract: A computer-based instrument system is provided for progammably configuring a variety of computer-based test instruments for performing a variety of tests and permitting high speed execution of tests through concurrent operation of individual test instruments. The instruments are implemented on circuit boards and mounted in a chassis including permanent backplane wiring interconnecting the instruments and a timing and triggering control unit. The backplane wiring includes a conventional computer bus for carrying instructions from a master controller to each instrument and lines for a common system clock signal, protocol signals, and trigger signals between selected instruments and the timing and triggering control unit for synchronizing the operation of the instruments when performing a test. The timing and triggering control unit is adapted to programmably control instrument triggering according to individual test requirements without modification of backplane wiring.

Abstract: A modularized packaging system for enclosing circuit components of an electronic instrument. That system includes one or more "C" frame modules each having top, bottom and side wall portions interconnected one to the other orthogonally. In addition, there is provided interconnection means for interconnecting, side by side, as many of the "C" frame modules as desired with a side panel provided for closing the outwardly facing open sides, if any, of the outermost "C" frame modules. To complete the package, front and rear end assemblies are provided to close those portions of the interconnected "C" frame modules.

Abstract: An apparatus and method are disclosed which permit selection of colors for display, and easy modification of displayed colors. The apparatus includes a microprocessor, a ROM with a stored program, a RAM with midifiable color data a CRT display for displaying color images, and a keyboard with a cursor-positioning key for identifying a pixel of a displayed color image, and a color menu and H (hue), L (lightness), S (saturation) color modification keys. In response to actuation of one or more of the color modification keys, the microprocessor, under control of the stored program, modifies the stored color data, and uses the modified color data to control the color guns (red, green, blue) of the CRT to modify the color of the identified pixel.

Abstract: A control panel supports and positions interchangeable subunit electronic devices and provides a neat and uniform outwardly facing surface. When subunit electronic devices are disconnected from the control panel, cover plates extend and conform to the uniform outwardly facing surface. Hinged support members "lock" in an over center position to rigidly support each cover plate. Electrical connectors protruding from each subunit electronic device "unlock" the hinged support members from the over center position when the subunit electronic device is urged toward the cover plate.

Abstract: A digital free-running clock oscillator comprises a circuit synchronizing the operation of the oscillator with an asynchronous timing signal from an external source, and is provided with a protection circuit for preventing a logic race condition in the synchronizing circuit during a period of coincident transition of the oscillator output and the external timing signal.

Abstract: A communications interface for controlling asynchronous data transmission between a host computer and an input/output device achieves very high data transfer rates and reduces I/O bottlenecks. The interface includes a microprocessor and a memory addressable thereby. The microprocessor controls data transfer from the host computer into an output buffer maintained within the memory and controls subsequent data transfer from the output buffer to an output device, independently of the operation of the host computer. Data received from the host computer is stored directly into an appropriate output buffer storage location without any time-consuming reading and writing of the data by the microprocessor. This is accomplished by providing a hardware register for storing data received from the host computer. At the appropriate time data transfer from the microprocessor to the memory is disabled, and data transfer from the register to the memory is enabled.

Abstract: A microstrip transmission line comprises a plurality of signal-carrying lines disposed along a dielectric ribbon and separated by a predetermined spacing. Ground-plane conductors are disposed on the opposite side of the ribbon in staggered relation to the signal-carrying lines such that the ground-plane conductors occupy spaces corresponding to the gaps between adjacent signal-carrying lines. This arrangement lowers the capacitance and raises the impedance of the transmission line while maintaining high signal line density.

Abstract: The assignment of user entered strings to blank softkeys within a node or menu is automatic. As the user enters a command string, the new information is checked against the information on all of the softkeys in the node. If a match is found, and that match is not associated with a user definable softkey, nothing is done. If a match is found, and that match is associated with a user definable softkey, the age parameter on the string to be stored with respect to that softkey is set to 0 (0 is the youngest age character). The age of all of the other stored user defined strings for the menu is incremented by one.If no match is found, a search is made for a blank user definable softkey, searching from left to right (f1 to f8). If a vacancy is found, the information will be assigned to that softkey with an age of 0, and the age of all of the other user assignable softkeys in the menu will be incremented.

Abstract: A digital phase-locked loop circuit for recovering an external clock signal from an input serial data stream includes an up/down counter responsive to both the serial data stream and to the clock pulse output of a variable divider driven by an external clock. The up/down counter counts in a direction which depends upon whether the input data stream leads or lags the variable divider's clock pulse output. The output of the up/down counter drives an n-bit memory and a comparator such that the n-bit memory stores the n most significant bits of the up/down counter for a predetermined period of time and then provides them to the comparator for comparison with the present value of the up/down counter. A binary code is provided to the variable divider to determine its divisor depending upon whether the memory count is greater than, equal to, or less than the present count of the up/down counter. This enables an external clock to be synchronized to the input data stream while removing random noise.

Abstract: A multipurpose keyswitch for controlling cursor movement on a CRT display and for character entry includes a key cap that moves laterally to provide cursor control and that moves vertically for character entry. Sensors are coupled to the key cap for sensing the lateral movement of the key cap. Forward and backward movement of the key cap selects upward and downward movement of the cursor on the CRT display. Left and right movement of the key cap selects left and right movement of the cursor. Vertical movement of the key cap selects the entry of a character. The multipurpose keyswitch is advantageously positioned as one of the home keys of the keyboard.

Abstract: Alignment is established between a member that defines an optical path and a semiconductor device that, when electrically biased, emits light in a predetermined direction, so as to establish an optically coupled relationship between the member and the device, by passing light along the optical path in a direction towards the semiconductor device, so that light is incident on the semiconductor device. An electrical characteristic of the semiconductor device is observed, and relative movement between the member and the device is brought about until the electrical characteristic indicates a desired degree of optical coupling between the member and the device, and the device and the member are then mechanically coupled together.