Patents Represented by Attorney Robinson Intellectual Property Law Office, P.C.
  • Patent number: 8263421
    Abstract: An object is to provide a manufacturing method of a microcrystalline semiconductor film with favorable quality over a large-area substrate. After forming a gate insulating film over a gate electrode, in order to improve quality of a microcrystalline semiconductor film formed in an initial stage, glow discharge plasma is generated by supplying high-frequency powers with different frequencies, and a lower part of the film near an interface with the gate insulating film is formed under a first film formation condition, which is low in film formation rate but results in a good quality film. Thereafter, an upper part of the film is deposited under a second film formation condition with higher film formation rate, and further, a buffer layer is stacked on the microcrystalline semiconductor film.
    Type: Grant
    Filed: November 12, 2010
    Date of Patent: September 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Sachiaki Teduka, Satoshi Toriumi, Makoto Furuno, Yasuhiro Jinbo, Koji Dairiki, Hideaki Kuwabara
  • Patent number: 8264254
    Abstract: A threshold voltage of a transistor is fluctuated because of fluctuation in film thickness of a gate insulating film or in gate length and gate width caused by differences of used substrates or manufacturing steps. In order to solve the problem, according to the present invention, there is provided a clocked inverter including a first transistor and a second transistor connected in series, and a compensation circuit including a third transistor and a fourth transistor connected in series.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: September 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuaki Osame, Aya Anzai
  • Patent number: 8261999
    Abstract: A semiconductor device such as an RFID, which can easily generate a given stable potential, is provided. Circuits included in a semiconductor device are categorized depending on whether a given stable power source potential is necessary. A power source potential generated from a wireless signal received by an antenna with the use of the antenna and a rectifier circuit is supplied to a circuit which needs a given stable power source potential through a regulator. On the other hand, a power source potential generated by the rectifier circuit is supplied to a circuit other than the circuit which needs the arbitrary power source potential. Thus, a semiconductor device including a regulator circuit easily designed with a smaller layout can be provided, and the semiconductor device can easily generate a given stable power source potential.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: September 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa, Masami Endo
  • Patent number: 8264889
    Abstract: A memory device has a pair of conductive layers and an organic compound having a liquid crystal property that is interposed between the pair of conductive layers. Data is recorded in the memory device by applying a first voltage to the pair of conductive layers and heating the organic compound, to cause a phase change of the organic compound from a first phase to a second phase.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: September 11, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Nobuharu Ohsawa
  • Patent number: 8265987
    Abstract: A road-vehicle communication system warns or gives caution to a vehicle traveling in a reverse way direction and may also give warning to vehicles traveling in a correct direction. The road-vehicle communication system includes a first roadside apparatus at an entrance gate that gives entry gate pass information indicating that a vehicle passing a communicative area has entered a toll road. A second roadside apparatus at an exit ramp acquires any given entry gate pass information from a passing vehicle. An administration device judges whether or not the entry gate pass information is acquired from the passing vehicle. If the entry gate pass information is not acquired, the second roadside apparatus provides the vehicle with reverse-way driving warning information for warning the vehicle that the vehicle is traveling in the reverse direction.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: September 11, 2012
    Assignee: Kabushiki Kaisha Kenwood
    Inventor: Souju Goto
  • Patent number: 8258862
    Abstract: An object is to provide a demodulation circuit having a sufficient demodulation ability. Another object is to provide an RFID tag which uses a demodulation circuit having a sufficient demodulation ability. A material which enables a reverse current to be small enough, for example, an oxide semiconductor material, which is a wide bandgap semiconductor, is used in part of a transistor included in a demodulation circuit. By using the semiconductor material which enables a reverse current of a transistor to be small enough, a sufficient demodulation ability can be secured even when an electromagnetic wave having a high amplitude is received.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: September 4, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takanori Matsuzaki, Yutaka Shionoiri
  • Patent number: 8258515
    Abstract: To improve the reliability of contact with an anisotropic conductive film in a semiconductor device such as a liquid crystal display panel, a terminal portion (182) of a connecting wiring (183) on an active matrix substrate is electrically connected to an FPC (191) by an anisotropic conductive film (195). The connecting wiring (183) is manufactured in the same process with a source/drain wiring of a TFT on the active matrix substrate, and is made of a lamination film of a metallic film and a transparent conductive film. In the connecting portion with the anisotropic conductive film (195), a side surface of the connecting wiring (183) is covered with a protecting film (173) made of an insulating material.
    Type: Grant
    Filed: March 21, 2011
    Date of Patent: September 4, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8258025
    Abstract: A microcrystalline semiconductor film with high crystallinity is manufactured. In addition, a thin film transistor with excellent electric characteristics and high reliability, and a display device including the thin film transistor are manufactured with high productivity. A deposition gas containing silicon or germanium is introduced from an electrode including a plurality of projecting portions provided in a treatment chamber of a plasma CVD apparatus, glow discharge is caused by supplying high-frequency power, and thereby crystal particles are formed over a substrate, and a microcrystalline semiconductor film is formed over the crystal particles by a plasma CVD method.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: September 4, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yukie Suzuki, Yasuyuki Arai, Takayuki Inoue, Erumu Kikuchi
  • Patent number: 8258512
    Abstract: An object of the present invention to provide a semiconductor device manufactured in short time by performing the step of forming the thin film transistor and the step of forming the photoelectric conversion layer in parallel, and to provide a manufacturing process thereof. According to the present invention, a semiconductor device is manufactured in such a way that a thin film transistor is formed over a first substrate, a photoelectric conversion element is formed over a second substrate, and the thin film transistor and the photoelectric conversion element are connected electrically by sandwiching a conductive layer between the first and second substrates opposed to each other so that the thin film transistor and the photoelectric conversion element are located between the first and second substrates. Thus, a method for manufacturing a semiconductor device which suppresses the increase in the number of steps and which increases the throughput can be provided.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: September 4, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuo Nishi, Junya Maruyama, Naoto Kusumoto, Yuusuke Sugawara
  • Patent number: 8253138
    Abstract: A thin film transistor includes a gate electrode, a gate insulating layer covering the gate electrode, a microcrystalline semiconductor layer over the gate insulating layer, an amorphous semiconductor layer over the microcrystalline semiconductor layer, source and drain regions over the amorphous semiconductor layer, source and drain electrodes in contact with and over the source and drain regions, and a part of the amorphous semiconductor layer overlapping with the source and drain regions is thicker than a part of the amorphous semiconductor layer overlapping with a channel formation region. The side face of the source and drain regions and the side face of the amorphous semiconductor form a tapered shape together with an outmost surface of the amorphous semiconductor layer. The taper angle of the tapered shape is such an angle that decrease electric field concentration around a junction portion between the source and drain regions and the amorphous semiconductor layer.
    Type: Grant
    Filed: November 3, 2008
    Date of Patent: August 28, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Kobayashi, Yoshiyuki Kurokawa, Hiromichi Godo
  • Patent number: 8253446
    Abstract: The transistor suffers the variation caused in threshold voltage or mobility due to gathering of the factors of the variation in gate insulator film resulting from a difference in manufacture process or substrate used and of the variation in channel-region crystal state. The present invention provides an electric circuit having an arrangement such that both electrodes of a capacitance element can hold a gate-to-source voltage of a particular transistor. The invention provides an electric circuit having a function capable of setting a potential difference at between the both electrodes of the capacitance element by the use of a constant-current source.
    Type: Grant
    Filed: February 9, 2012
    Date of Patent: August 28, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yasuko Watanabe
  • Patent number: 8252637
    Abstract: The purpose of the present invention is to provide a reliable semiconductor device comprising TFTs having a large area integrated circuit with low wiring resistance. One of the features of the present invention is that an LDD region including a region which overlaps with a gate electrode and a region which does not overlap with the gate electrode is provided in one TFT. Another feature of the present invention is that gate electrode comprises a first conductive layer and a second conductive layer and portion of the gate wiring has a clad structure comprising the first conductive layer and the second conductive layer with a low resistance layer interposed therebetween.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: August 28, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 8253135
    Abstract: To reduce adverse effects on actual operation and to reduce adverse effects of noise. A structure including an electrode, a wiring electrically connected to the electrode, an oxide semiconductor layer overlapping with the electrode in a plane view, an insulating layer provided between the electrode and the oxide semiconductor layer in a cross-sectional view, and a functional circuit to which a signal is inputted from the electrode through the wiring and in which operation is controlled in accordance with the signal inputted. A capacitor is formed using an oxide semiconductor layer, an insulating layer, and a wiring or an electrode.
    Type: Grant
    Filed: March 18, 2010
    Date of Patent: August 28, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideki Uochi, Daisuke Kawae
  • Patent number: 8252434
    Abstract: A light emitting device comprises a pair of electrodes and a mixed layer provided between the pair of electrodes. The mixed layer contains an organic compound which contains no nitrogen atoms, i.e., an organic compound which dose not have an arylamine skeleton, and a metal oxide. As the organic compound, an aromatic hydrocarbon having an anthracene skeleton is preferably used. As such an aromatic hydrocarbon, t-BuDNA, DPAnth, DPPA, DNA, DMNA, t-BuDBA, and the like are listed. As the metal oxide, molybdenum oxide, vanadium oxide, ruthenium oxide, rhenium oxide, and the like are preferably used. Further, the mixed layer preferably shows absorbance per 1 ?m of 1 or less or does not show a distinct absorption peak in a spectrum of 450 to 650 nm when an absorption spectrum is measured.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: August 28, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuji Iwaki, Satoshi Seo, Takahiro Kawakami, Hisao Ikeda, Junichiro Sakata, Tomoya Aoyama
  • Patent number: 8253327
    Abstract: Objects of the present invention are to provide a light-emitting element that does not readily deteriorate, a light-emitting device and an electronic device that do not readily deteriorate, and a method of fabricating the light-emitting element that does not readily deteriorate. A light-emitting element having an EL layer between a pair of electrodes is covered with a layer containing an inorganic compound and halogen atoms or a layer containing an organic compound, an inorganic compound, and halogen atoms, whereby deterioration by moisture penetration can be inhibited. Thus, a light-emitting element with a long life can be obtained.
    Type: Grant
    Filed: June 23, 2008
    Date of Patent: August 28, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Ibe, Hisao Ikeda, Junichi Koezuka, Kaoru Kato
  • Patent number: 8247307
    Abstract: A plurality of rectangular single crystal semiconductor substrates are prepared. Each of the single crystal semiconductor substrates is doped with hydrogen ions and a damaged region is formed at a desired depth, and a bonding layer is formed on a surface thereof. The plurality of single crystal substrates with the damaged regions formed therein and the bonding layers formed thereover are arranged on a tray. Depression portions for holding the single crystal semiconductor substrates are formed in the tray. With the single crystal semiconductor substrates arranged on the tray, the plurality of single crystal semiconductor substrates with the damaged regions formed therein and the bonding layers formed thereover are bonded to a base substrate. By performing heat treatment and dividing the single crystal semiconductor substrates along the damaged regions, the plurality of single crystal semiconductor layers that are sliced are formed over the base substrate.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Makoto Furuno
  • Patent number: 8248551
    Abstract: A first insulating thin film having a large dielectric constant such as a silicon nitride film is formed so as to cover a source line and a metal wiring that is in the same layer as the source line. A second insulating film that is high in flatness is formed on the first insulating film. An opening is formed in the second insulating film by etching the second insulating film, to selectively expose the first insulating film. A conductive film to serve as a light-interruptive film is formed on the second insulating film and in the opening, whereby an auxiliary capacitor of the pixel is formed between the conductive film and the metal wiring with first the insulating film serving as a dielectric. The effective aperture ratio can be increased by forming the auxiliary capacitor in a selected region where the influences of alignment disorder of liquid crystal molecules, i.e., disclination, are large.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Yasushi Ogata
  • Patent number: 8247276
    Abstract: In a thin film transistor, an increase in off current or negative shift of the threshold voltage is prevented. In the thin film transistor, a buffer layer is provided between an oxide semiconductor layer and each of a source electrode layer and a drain electrode layer. The buffer layer includes a metal oxide layer which is an insulator or a semiconductor over a middle portion of the oxide semiconductor layer. The metal oxide layer functions as a protective layer for suppressing incorporation of impurities into the oxide semiconductor layer. Therefore, in the thin film transistor, an increase in off current or negative shift of the threshold voltage can be prevented.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshikazu Kondo, Hideyuki Kishida
  • Patent number: 8247802
    Abstract: To provide a memory element, a memory device, and a semiconductor device, which can be easily manufactured at low cost; are nonvolatile and data-rewritable; and have preferable switching properties and low operating voltage. A memory element of the invention includes a first conductive layer, a second conductive layer facing the first conductive layer, and an organic compound layer provided between the first and the second conductive layers. For the organic compound layer, a high molecular material having an amide group at least at one kind of side chains is used.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ryoji Nomura, Tamae Takano, Takehisa Hatano
  • Patent number: 8247246
    Abstract: A technique for forming a TFT element over a substrate having flexibility typified by a flexible plastic film is tested. When a structure in which a light-resistant layer or a reflective layer is employed to prevent the damage to the delamination layer, it is difficult to fabricate a transmissive liquid crystal display device or a light emitting device which emits light downward. A substrate and a delamination film are separated by a physical means, or a mechanical means in a state where a metal film formed over a substrate, and a delamination layer comprising an oxide film including the metal and a film comprising silicon, which is formed over the metal film, are provided. Specifically, a TFT obtained by forming an oxide layer including the metal over a metal film; crystallizing the oxide layer by heat treatment; and performing delamination in a layer of the oxide layer or at both of the interface of the oxide layer is formed.
    Type: Grant
    Filed: April 23, 2010
    Date of Patent: August 21, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junya Maruyama, Toru Takayama, Yumiko Ohno, Shunpei Yamazaki