Abstract: A circuit board structure embedded with semiconductor chips is proposed. A semiconductor chip is received in a cavity of a supporting board. A dielectric layer and a circuit layer are formed on the supporting board and the semiconductor chip. A plurality of hollow conductive vias are formed in the dielectric layer for electrically connecting the circuit layer to the semiconductor chip. By providing the hollow conductive vias of present invention, the separating results of different coefficients of expansion and thermal stress are prevented, and thus electrical function of products is ensured.

Abstract: A Flash memory controller includes a host interface, a Flash memory interface, controller logic coupled between the host interface, the controller logic handling a plurality of voltages. The controller also includes a mechanism for allowing a multiple voltage host to interface with a high voltage or multiple voltage Flash memory. A multiple voltage Flash memory controller in accordance with the present invention provides the following advantages over conventional Flash memory controllers: (1) a voltage host is allowed to interface with multiple Flash memory components that operate at different voltages in any combination; (2) power consumption efficiency is improved by integrating the programmable voltage regulator, and voltage comparator mechanism with the Flash memory controller; (3) External jumper selection is eliminated for power source configuration; and (4) Flash memory controller power source interface pin-outs are simplified.

Abstract: A method and system for publishing a message using a page builder tool is disclosed. The page builder tool is for providing a web page and linking the web page to a searchable database. The method and system include providing a message caching agent, a message cache and a message publishing agent. The message caching agent receives the message and provides the message to the message cache. The message publishing agent is coupled to the message cache and the page builder tool. The message publishing agent retrieves the message from the message cache and allows the message to be published on a web browser through the page builder tool in response to a request from the web browser.

Abstract: The present invention provides a circuit board structure, the circuit board structure consisting of a carrier board having a first surface and an opposed second surface, the carrier board being formed with at least one through hole penetrating the first and second surfaces; a conductive pillar formed in the through hole by electroplating; and a first circuit layer and a second circuit layer respectively formed on the first and second surfaces of the carrier board, the first and second circuit layers being electrically connected to the two end portions of the conductive pillar, thereby reducing spacing between adjacent conductive pillars of the carrier board and achieving high density circuit layout.

Abstract: Method, system, and computer program product for analyzing circuit structures for parasitic effects are provided. Data from a previous parasitic effect analysis of a circuit structure is used to perform parasitic effect analysis on another circuit structure even when the circuit structures are not identical, provided the circuit structures are similar.

Abstract: A tool comprising a scissors, the scissors including two handles, each handle including an aperture therethrough is disclosed. The tool includes a comb attached to the scissors. The comb includes a handle portion and a comb portion. The handle portion of the comb includes a plurality of extensions therefrom, the extensions for engaging the aperture of one of the handles of the scissors, wherein the comb can be removed from the scissors by disengaging the extensions.

Abstract: A circuit board structure with an embedded semiconductor element and a fabrication method thereof are disclosed according to the present invention. The circuit board structure comprises: a carrier board having a first surface, a second surface, and at least one through hole penetrating the carrier board from the first surface to the second surface; a first semiconductor element received in the through hole and having an active surface and an inactive surface, the active surface having a plurality of electrode pads; at least one second semiconductor element mounted on the carrier board; a first encapsulation layer formed on the first surface of the carrier board to block one end of the through hole; and a second encapsulation layer formed on the second surface of the carrier board.

Abstract: The present invention provides a cost effective method to improve the performance of communication appliances by retargeting the graphics processing unit as a coprocessor to accelerate networking operations. A system and method is disclosed for using a coprocessor on a standard personal computer to accelerate packet processing operations common to network appliances. The appliances include but are not limited to routers, switches, load balancers and Unified Threat Management appliances. More specifically, the method uses common advanced graphics processor engines to accelerate the packet processing tasks.

Abstract: Building a database from stored backup data images. In one aspect, an identification of a target image is received, the target image including a copy of a logical storage unit of data from a previous database and description information that describes the previous database. The target image holds a copy of a subset of the data of the previous database. A received list has at least one desired logical storage unit of data from the previous database to be included in a built database. The desired logical storage unit is restored from at least one stored data image to the built database using the description information in the target image. Other aspects include the target image being a database image, and the desired logical storage units of data being a subset of database data.

Abstract: The present invention provides a method, computer program product and article for creating and reusing a value object for data that is requested a first time and again in subsequent data requests in related result sets. Mutation directives and an associated methodology are presented in one of four different levels which permit the present invention to operate within the JDBC standard.

Abstract: Method and system for expanding the memory capacity of devices that use flash memory cards. In one aspect, a memory card expander assembly includes an adaptor shaped to be connected to a memory card slot of a host device, and a receptacle assembly in communication with the adaptor and operative to be attached to the host device. The receptacle assembly includes an expanded memory card slot operative to connect to a memory card such that the host device can communicate with the connected memory card when the adaptor is connected to the memory card slot.

Abstract: The present embodiment provides a system and method for lowering the saturated gain level of a thin-disk laser oscillator by multipassing each gain generator in such a way to cancel some of the wavefront error contributions from the disk surfaces. Wavefront aberrations introduced on one pass of the gain disk are canceled through symmetry on successive passes. The reduced wavefront error significantly improves design space for single-mode resonators. Maximum effectiveness is achieved by rotating the gain disk so that the fold plane-of-symmetry reverses the largest wavefront error or specifically chosen functional forms.

Abstract: The present invention discloses a method for reducing a tree structure in a processing system. The method includes providing a plurality of nodes in a tree structure. The method also includes querying each of the plurality of nodes based upon a threshold value, wherein the threshold is related to relevance; when a count of a particular node matches the threshold then a next child node is queried to determine if the next child node matches the threshold, if a child node does not exist for the queried node when the node is displayed. The method further includes visiting all of the parent nodes based on the querying step until all of plurality of nodes have been queried. The method finally includes displaying the nodes that satisfy the threshold value.

Abstract: An image fusion processing method, image fusion processing program, and image fusion processing device for fusing a plurality of images of three or more dimensions obtained from a single watched object without degenerating the amount of information. A CPU calculates an optical parameter corresponding to a first voxel value and an optical parameter corresponding to a second voxel value. Then, the CPU calculates synthesized optical parameters based on a synthesis ratio obtained through a synthesis ratio determining process performed at each current position and updates the residual light and reflected light using these optical parameters. When the current position is an end point, a CPU sets the reflected light as a pixel value, and the fusion image data generating process ends for the single pixel configuring a frame.

Abstract: A fuel system for an aircraft is disclosed. The fuel system comprises a fuel tank and a fuel reformer for receiving fuel from the fuel tank. The system includes a hydrogen fuel cell array for receiving hydrogen from the fuel reformer. The system further includes mechanism for providing an inerting gas from the fuel system to the fuel tank.

Abstract: The present invention provides a system and computer readable medium for object retransmission in an asynchronous environment without a continuous network connection in a digital media distributor (DMD) system. The system and computer readable medium include receiving objects in a receiver from a central site, generating a response document in the receiver, and sending the response document asynchronously to the central site. The received response documents are then utilized in the central site to determine which object to retransmit to the receiver. In another aspect of the present invention, the central site manages the inventory of objects in the receiver by instructing the receiver to delete objects not needed.

Abstract: A decoder and method for implementing an iterative error correcting decoder are provided for decoding a codeword consisting of a N-bit messages. In one implementation, the decoder includes a first set of nodes, and a second set of nodes, each having N bits of resolution. Each node of the second set is coupled to at least one node of the first set, each node of the second set being coupled to a node of the first set by a corresponding set of M wires. Each of the first set of nodes is operable to transfer the bits of a given N-bit message of the codeword over the corresponding set of M wires to a coupled node of the second set during a single iteration cycle, each of the M wires carrying i bits, where N is an integer greater than M, and N=M*i.

Abstract: A differential-pair amplifier comprising a transistor pair. The differential-pair amplifier includes a current source coupled to the transistor pair for providing a bias current to the transistor pair. The differential-pair amplifier also includes a switching mechanism coupled to the transistor pair for steering the bias current away from the transistor pair when disabling the amplifier operation. A system and method in accordance with the present invention allows fast enabling and disabling of a differential-pair amplifier. This fast switching technique can be used in the signal paths where the switching time is critical.