Abstract: A method and apparatus to detect non-cancelled magnetic field produced when current flows through an electric conductor are provided. The sensor includes multiple coils, which allow the sensor to be arbitrarily oriented and attach to the outside of an electrical power cable. Arbitrary orientation provides for easy of field installation.

Abstract: A computer automatically identifies multiple occurrences of an abstract data type that is embedded within an object of metadata of another abstract data type (hereinafter “top-level” abstract data type), e.g. by recursively visiting each element of the top-level abstract data type. Then the computer automatically generates, for the top-level abstract data type, a tap-level description that contains a description of each embedded abstract data type. At several locations in the top-level description that correspond to occurrences of a given embedded abstract data type in the top-level abstract data type, the computer automatically inserts offsets that identify a common position where the single description of that given embedded abstract data type is present in the tap-level description. Use of multiple offsets that identify a common position of an embedded description reduces space. The space was otherwise occupied by multiple embedded descriptions in prior art's top-level descriptions.

Abstract: A system and system for performing adaptive recursive noise reduction with still pixel detection on a video stream is presented. After processing a field pixels that were modified are stored in the field so that processing of later fields uses the modified pixels. Furthermore, the system uses novel still pixel detection routines that include multiple thresholds and multiple windows of pixels so that noise reduction is only performed on still pixels.

Abstract: A memory is encoded with a data structure that represents a pattern having a range for one or more dimensions and/or positions of line segments therein. The data structure identifies two or more line segments that are located at a boundary of the pattern. The data structure also includes at least one set of values that identify a maximum limit and a minimum limit (i.e. the range) between which relative location and/or dimension of an additional line segment of the pattern in a portion of a layout of an integrated circuit (IC) chip, represents a defect in the IC chip when fabricated. In most embodiments, multiple ranges are specified in such a range defining pattern for example a width range is specified for the width of a trace of material in the layout and a spacing range is specified for the separation distance between two adjacent traces in the layout.

Abstract: A method and system for suppressing color-crossing error in decoded video signals is presented. The color-crossing error suppression method and system uses a first suppression technique at a pixel location for a first subset of fields exhibiting color-crossing error at a pixel location then uses a second suppression technique at the pixel location for a second subset of fields exhibiting color-crossing error at the pixel location. The second subset of fields follows the first subset of fields in the video signals.

Abstract: An optical metrology system collects spectral data while scanning over the focal range. The spectral data is evaluated to determine a plurality of peak intensity values for wavelengths in the spectra. The peak intensities are then combined to form the measured spectrum for the sample, which can then be used to determine the sample properties of interest. In one embodiment, the peak intensity is determined based on the measured maximum intensity and a number n of intensity values around the measured maximum intensity, e.g., using curve fitting. If desired, the number n may be varied as a function of wavelength to vary the effective spot size of the metrology system while optimizing noise performance. The peak intensity may also be derived as the measured maximum intensity or through a statistical analysis.

Abstract: A computer is programmed to process a continuous query that is known to perform a new aggregation on one or more stream(s) of data, using one or more other aggregations on the stream(s). The computer creates an operator to execute the continuous query, and schedules the operator for execution in a specific order. In several embodiments, the computer determines the order based on dependency of the new aggregation on other aggregation(s), and on the order of performance of the other aggregation(s). The new aggregation is scheduled for performance after performance of each of the other aggregations. The computer is further programmed to pass results of the other aggregations to the new aggregation, by execution of a predetermined function. Support for use of the other aggregations results within the new aggregation eliminates redundant computation of the other aggregations within the new aggregation. The new aggregation may be user defined or built-in.

Abstract: The present disclosure provides methods and apparatus that enable characterization of an electrical property of a semiconductor specimen, e.g., dopant concentration of a near-surface region of the specimen. In exemplary method, a target depth for measurement is selected. This thickness may, for example, correspond to a nominal production thickness of a thin active device region of the specimen. A light is adjusted to an intensity selected to characterize a target region of the specimen having a thickness no greater than the target depth and a surface of the specimen is illuminated with the light. An AC voltage signal induced in the specimen by the light is measured and this AC voltage may be used to quantify an aspect of the electrical property, e.g., to determine dopant concentration, of the target region.

Abstract: The solution to the shortest path between a source node and multiple destination nodes is accelerated using a grouping of nodes, where the nodes are grouped based on distance from the source node, and a corresponding set of memory locations that indicate when a group includes one or more nodes. The memory locations can be quickly searched to determine the group that represents the shortest distance from the source node and that includes one or more nodes. Nodes may be grouped into additional groupings that do not correspond to the set of memory locations, when the distance from the source node to the nodes exceeds the range of memory locations. Advantageously, the disclosed system and method provide the ability to reach asymptotically optimal performance.

Abstract: A scan chain planning method uses physical data with a hierarchical design to optimize chip level scan chains. Specifically, location data of physical blocks is used to determine optimal partitioning of the hierarchical design to balance chip level scan chains and reduce the number block scan ports by determining optimal locations for the block scan ports. Actual layout of the scan chains is based on the locations of the block scan ports and the number of scan elements determined by the method for each block scan chain.

Abstract: In a measuring system, a method for evaluating parameters of a workpiece includes measuring a periodic structure, such as a grating, on the workpiece to produce image data. An orientation of features in the image data, produced by higher order diffractions from the periodic structure, is identified. An orientation of the periodic structure is determined based on the orientation of the features in the image data. The image data is then modified, based on the orientation of the periodic structure, to correlate with, and for comparison to, simulated image data to ascertain parameters of the workpiece. Alternatively, optical components in the measuring system, or the workpiece itself, are adjusted to provide a desired alignment between the optical components and the periodic structure. A microstructure on the workpiece may then be measured, and the resulting image data may be compared to the simulated image data to ascertain parameters of the microstructure.

Abstract: This disclosure provides methods for measuring asymmetry of features, such as lines of a diffraction grating. On implementation provides a method of measuring asymmetries in microelectronic devices by directing light at an array of microelectronic features of a microelectronic device. The light illuminates a portion of the array that encompasses the entire length and width of a plurality of the microelectronic features. Light scattered back from the array is detected. One or more characteristics of the back-scattered light may be examined by examining data from the complementary angles of reflection. This can be particularly useful for arrays of small periodic structures for which standard modeling techniques would be impractically complex or take inordinate time.

Abstract: A multi-domain vertical alignment liquid crystal display that does not require physical features on the substrate (such as protrusions and ITO slits) is disclosed. Each pixel of the MVALCD is subdivided into color components, which are further divided into color dots. The polarity of the color dots are arranged so that fringe fields from adjacent color dots causes multiple liquid crystal domains in each color dot. Specifically, the color dots of a pixel are arranged so that each color dot of a first polarity has four neighboring pixels of a second polarity. Thus, a checkerboard pattern of polarities is formed. Furthermore, the checkerboard pattern is extended across multiple pixels in the MVALCD. In addition, many display unit include multiple pixel designs to improve color distribution or electrical distribution.

Abstract: A computer increases coverage in simulation of a design of a circuit by processing goals for coverage differently depending on whether or not the goals are on input signals of the circuit. Specifically, goals on input signals are used to automatically formulate constraints (“directly-derived constraints”) on values of input signals in test vectors. Goals on non-input signals (e.g. internal/output signals) are used with correlations to automatically formulate more additional constraints (“correlation-derived constraints”), by use of goals on non-input signals. The correlations indicate which non-input signals are associated with which input signals. The correlations are received from, for example, a human designer of the circuit. Depending on the embodiment, one or more of the automatically derived constraints are used with human-supplied constraints, to generate test vectors e.g. using a constraints solver, such as a satisfiability (SAT) engine.

Abstract: Scatterometers and methods of using scatterometry to determine several parameters of periodic microstructures, pseudo-periodic structures, and other very small structures having features sizes as small as 100 nm or less. Several specific embodiments of the present invention are particularly useful in the semiconductor industry to determine the width, depth, line edge roughness, wall angle, film thickness, and many other parameters of the features formed in microprocessors, memory devices, and other semiconductor devices. The scatterometers and methods of the invention, however, are not limited to semiconductor applications and can be applied equally well in other applications.

Abstract: When performing rule checking locally within any given region of a layout of an integrated circuit, certain data is generated to be checked globally, regardless of boundaries (hereinafter “to-be-globally-checked” data). The to-be-globally-checked data, resulting from execution of a given rule in each region of the IC layout, is merged across all regions, and the same rule (i.e. the given rule) is executed globally on the merged data. When an entire runset has been executed in all regions individually, and also executed globally on the merged data, the results thereof are all merged together to yield a final result of a complete execution of the entire runset over the entire IC layout. In some embodiments, certain additional data that could not be rule checked due to the presence of boundaries of adjacent regions is propagated between successive rules in each region.

Abstract: By forming MOSFETs on a substrate having pre-existing ridges of semiconductor material (i.e., a “corrugated substrate”), the resolution limitations associated with conventional semiconductor manufacturing processes can be overcome, and high-performance, low-power transistors can be reliably and repeatably produced. Forming a corrugated substrate prior to actual device formation allows the ridges on the corrugated substrate to be created using high precision techniques that are not ordinarily suitable for device production. MOSFETs that subsequently incorporate the high-precision ridges into their channel regions will typically exhibit much more precise and less variable performance than similar MOSFETs formed using optical lithography-based techniques that cannot provide the same degree of patterning accuracy. Additional performance enhancement techniques such as pulse-shaped doping, “wrapped” gates, epitaxially grown conductive regions, epitaxially grown high mobility semiconductor materials (e.g.

Abstract: A color saturation control unit and method for increasing the color saturation of an image is presented. A scaled saturation enhancement factor calculation unit generates a scaled saturation enhancement factor using a base saturation enhancement factor. A multiplier generates a saturation enhanced U chrominance value and a saturation enhanced V chrominance for the current pixel by multiplying the scaled saturation enhancement factor multiplied with the current chrominance values. The ratio of the saturation enhanced chrominance values should be equal to the ratio of the current chrominance values. A lookup table contains tabled saturation enhancement factors that can be used as the scaled saturation enhancement factor when the base saturation enhancement factor would cause the saturation enhanced U chrominance value or the saturation enhanced V chrominance value to exceed a valid range of chrominance values.

Abstract: A method of detecting surface particulate defects, and especially metal particulates, in semiconductors such as silicon, to characterise defects likely to have an effect on the electrical activity of such semiconductor materials, comprises exposing the surface of the semiconductor structure in the vicinity of a surface particulate to at least one high-intensity beam of light and collecting and processing the photoluminescence response; and using the result to identify unacceptable contamination levels resulting from diffusion of contaminant from particulate into semiconductor structure. Optionally, the semiconductor is annealed and photoluminescence responses collected before and after annealing to identify contaminant diffusion rates. Apparatus for the same is also described.