Abstract: A method and system for smoothing a frame to remove jagged edges are presented. The method and system generates a smoothing filter with consolidated pixels. Edges within the smoothing filter are analyzed to select an edge direction used for smoothing. A smoothed pixel is generated based on a normalized linear combination of a first edge end pixel, a second edge end pixel and center entry of the smoothing filter. Subtle structure checking can be used to determine whether to use the smoothed pixel in place of the current pixel.

Abstract: Scatterometers and methods of using scatterometry to determine several parameters of periodic microstructures, pseudo-periodic structures, and other very small structures having features sizes as small as 100 nm or less. Several specific embodiments of the present invention are particularly useful in the semiconductor industry to determine the width, depth, line edge roughness, wall angle, film thickness, and many other parameters of the features formed in microprocessors, memory devices, and other semiconductor devices. The scatterometers and methods of the invention, however, are not limited to semiconductor applications and can be applied equally well in other applications.

Abstract: A range pattern is matched to a block of an IC layout by slicing the layout block and the range pattern, followed by comparing a sequence of widths of layout slices to a sequence of width ranges of pattern slices and if the width of any layout slice falls outside the width range of a corresponding pattern slice then the layout block does not match the range pattern. If the comparison succeeds, further comparisons are made between a sequence of lengths of layout fragments in each layout slice and a sequence of length ranges of pattern fragments in corresponding pattern slices. If the length of any layout fragment falls outside the length range of a corresponding pattern fragment then the block does not match the range pattern. If all lengths are within their respective ranges, then the block matches the pattern, although additional constraints are checked in some embodiments.

Abstract: An operator in accordance with the invention changes, over time, the amount of memory that is allocated and used by the operator, to process data input to the operator. For example, a sort operator that is used to implement a query in a relational database may allocate a certain amount of memory initially based on an estimate of input data, and thereafter increase the allocated memory if the size of the input data was underestimated. In one embodiment, the operator checks, from time to time while processing a given set of input data, its current memory usage against an operator-level target or limit (either of which is called “memory bound”), and makes appropriate changes to conform to the memory bound.

Abstract: A graphical user interface (GUI) displays a flow of activities of a business process, including any portion thereof from which capture of data is permitted. The GUI receives, in an operation, at least an indication of a business process portion from which data is to be captured (“sensor”), an identification of an endpoint to which captured data is to be transferred, and a type of the endpoint which identifies (through a mapping) a predetermined software. A sensor may be added any number of times (through a single GUI or though multiple GUIs) by repeatedly performing the operation. Also, a given sensor may be associated with multiple endpoints. Computer(s) executing the business process check whether or not a sensor is present, on execution of the business process portion, and if present, then execute the corresponding predetermined software(s) to transfer data from the sensor directly to the respective endpoint(s).

Abstract: An integrated circuit has a hardware decoder that parses a frame to identify a type of encapsulation. The integrated circuit also has a number of hardware parsers, each parser being coupled to the decoder by an enable line. During packet processing, one of the parsers is enabled by the decoder, based on the value which identifies the encapsulation type. The enabled parser retrieves one or more attributes from the frame, depending on the encapsulation. The integrated circuit also has a register, coupled to each parser, to hold the attributes. The integrated circuit also has a key generation hardware which creates a key, by concatenating from the attributes register, certain attributes that are pre-selected by a user for forming the key. The integrated circuit uses the key to look up in memory a set of user-specified actions that are then performed on data in the frame.

Abstract: In systems and methods measure overlay error in semiconductor device manufacturing based on target image asymmetry. As a result, the advantages of using very small in-chip targets can be achieved, while their disadvantages are reduced or eliminated. Methods for determining overlay error based on measured asymmetry can be used with existing measurement tools and systems. These methods allow for improved manufacturing of semiconductor devices and similar devices formed from layers.

Abstract: Various embodiments include a method for providing instructions to a process tool. The method includes emitting an incident light beam at a substrate, receiving a reflected light beam from the substrate and determining a spectrum of the reflected light beam. The method further includes determining a first property of a first layer of the substrate and a second property of a second layer of the substrate, based on the spectrum determination. The method further includes comparing the first property of the first layer to a first reference property and comparing the second property of the second layer to a second reference property. The method further includes determining the instructions based on the first property comparison and the second property comparison; and providing the instructions to the process tool.

Abstract: A sample that is processed to remove a top layer, e.g., using chemical mechanical polishing or etching, is accurately measured using multiple models of the sample. The multiple models may be constrained based on a pre-processing measurement of the sample. By way of example, the multiple models of the sample may be linked in pairs, where one pair includes a model simulating the pre-processed sample and another model simulating the post-processed sample with a portion of the top layer remaining, i.e., under-processing. Another pair of linked models includes a model simulating the pre-processed sample and a model simulating the post-processing sample with the top layer removed, i.e., the correct amount of processing or over-processing. The underlying layers in the linked model pairs are constrained to have the same parameters. The modeling process may use a non-linear regression or libraries.

Abstract: An electroplated film is deposited over a substrate with a plating frame pattern that includes a plating field defined by a plurality of individual features. By dividing the plating field into a plurality of individual features, the delamination force at any location on the plating field is greatly reduced. Thus, a film with a large stress, such as a high moment film, may be plated to a greater thickness than is possible with conventionally plated films.

Abstract: A computer is programmed to emulate a fixed-point operation that is normally performed on fixed-point operands, by use of a floating-point operation that is normally performed on floating-point operands. Several embodiments of the just-described computer emulate a fixed-point operation by: expanding at least one fixed-point operand into a floating-point representation (also called “floating-point equivalent”), performing, on the floating-point equivalent, a floating-point operation that corresponds to the fixed-point operation, and reducing a floating-point result into a fixed-point result. The just-described fixed-point result may have the same representation as the fixed-point operand(s) and/or any user-specified fixed-point representation, depending on the embodiment. Also depending on the embodiment, the operands and the result may be either real or complex, and may be either scalar or vector.

Abstract: A repository contains multiple versions of an object but only a single version of the object is supplied when a query is made. The single version is automatically selected from among a number of versions that are otherwise returned in response to the query, based on a configuration associated with a workspace in which the query originates. The selected version of the object is then presented in a version resolved view, without exposing any information related to versioning of the object. Specifically, a number of configurations are established, each configuration containing no more than one version of each object in the repository. However, only one configuration is associated with each workspace from which a query can originate. The configuration that is associated with the workspace depends on whether the workspace is to be used for design of the repository or for use of the repository during live operation.

Abstract: A memory is encoded with a model of sensitivity of a distorted layout generated by simulation of a wafer fabrication process, with respect to a change in an original layout that is input to the simulation. The sensitivity model comprises an expression of convolution of the original layout with spatial functions (“kernels”) that are identical to kernels of a process model used in the simulation. A difference between the distorted layout and the original layout is computed, and the difference is divided by a sensitivity value which is obtained directly by evaluating the kemel-based sensitivity model, and the result is used to identify a proximity correction (such as serif size or contour movement) to be made to the original layout. Use of a sensitivity model based on a process model's kernels eliminates a second application of the process model to evaluate sensitivity, thereby to reduce memory and computation requirements.

Abstract: The solution to the shortest path between a source node and multiple destination nodes is accelerated using a grouping of nodes, where the nodes are grouped based on distance from the source node, and a corresponding set of memory locations that indicate when a group includes one or more nodes. The memory locations can be quickly searched to determine the group that represents the shortest distance from the source node and that includes one or more nodes. Nodes may be grouped into additional groupings that do not correspond to the set of memory locations, when the distance from the source node to the nodes exceeds the range of memory locations. Advantageously, the disclosed system and method provide the ability to reach asymptotically optimal performance.

Abstract: Static timing and/or noise analysis are performed on a netlist of an integrated circuit, to estimate behavior of the netlist and to identify at least one violation by said behavior of a corresponding requirement thereon, such as setup time, hold time or bump height in a quiescent net. Thereafter, effect of engineering change order (ECO) to correct the violation are automatically analyzed, based on the layout, the parasitics, the timing and/or noise behavior, and the violation, followed by generation of a constraint on the behavior (called “ECO” constraint), such as a timing constraint and/or a noise constraint. Next, the ECO constraint is automatically used, e.g. in a place and route tool, to select an ECO repair technique, from several ECO repair techniques that can overcome the violation. The selected ECO repair technique is automatically applied to the layout, to generate a modified layout which does not have the violation.

Abstract: A metrology system performs optical metrology while holding a sample with an unknown focus offset. The measurements are corrected by fitting for the focus offset in a model regression analysis. Focus calibration is used to determine the optical response of the metrology device to the focus offset. The modeled data is adjusted based on the optical response to the focus offset and the model regression analysis fits for the focus offset as a variable parameter along with the sample characteristics that are to be measured. Once an adequate fit is determined, the values of the sample characteristics to be measured are reported. The adjusted modeled data may be stored in a library, or alternatively, modeled data may be adjusted in real-time.

Abstract: The invention relates to a method and apparatus for detecting defects in a semiconductor or silicon structure at room temperature, and in an efficient time, using photoluminescence. The invention employs the use of a high intensity beam of light preferably having a spot size between 0.1 mm 0.5 microns and a peak or average power density of 104-109 w/cm2 with a view to generating a high concentration of charge carriers, which charge characters detect defects in a semiconductor by interacting with same. These defects are visible by producing a photoluminescence image of the semiconductor. Several wavelengths may be selected to identify defects at a selective depth as well as confocal optics may be used.

Abstract: A method for using photoluminescence to identify defects in a sub-surface region of a sample includes performing a first probe of the sample. A first data set, based on the first probe, is produced indicating defects located primarily in a surface layer of the sample. A second data set, based on a second probe, is produced indicating defects located in both the surface layer and a sub-surface region of the sample. The first data set is subtracted from the second data set to produce a third data set indicating defects located primarily in the sub-surface region of the sample. The first data set may optionally be normalized relative to the second data set before performing the subtraction. The first and second probes may advantageously be performed using a first laser and a second laser, respectively, having different wavelengths from each other.

Abstract: A metrology device produces broadband illumination, e.g., an illumination line, that is incident on a substrate at an oblique angle of incidence and which is scanned across the substrate. A first detector collects a darkfield image, while a second detector collects the spectrally reflected light. The angle of incidence of the illumination is variable so that the darkfield image is received by the first detector without interference from diffracting structures on the substrate. Alternatively, the position of the first detector may be varied to receive the darkfield image, or a filter may be used to filter out light from any non-defect diffracting structures on the substrate. A processor uses the darkfield data from the first detector to determine if a defect is present on the substrate and uses the spectral data from the second detector to identify the material composition of the defect.

Abstract: A method for processing wafers includes learning a first pattern at a de-skew site on a first wafer layer, saving the first patterns in a recipe for de-skewing wafers, learning a second pattern at the de-skew site a second wafer layer, and saving the second pattern in the same recipe for de-skewing wafers. Learning the first pattern may include determining a score of uniqueness for the first pattern. The method further includes finding the de-skew site on the second wafer layer using the first pattern before learning the second pattern. Finding the de-skew site includes determining a score of similarity between the first pattern and the second pattern. Learning the second pattern is performed when the score of similarity is less than a threshold value. A recipe for de-skewing wafers includes multiple patterns of a de-skew site of a wafer, wherein the patterns include a first pattern at the de-skew site on a first wafer layer and a second pattern at the de-skew site on a second wafer layer.