Patents Represented by Attorney Slater & Matsil, L.L.P.
  • Patent number: 8269341
    Abstract: Cooling structures and methods, methods of manufacturing semiconductor devices, and semiconductor devices are disclosed. In one embodiment, a cooling structure for a semiconductor device includes at least one channel defined between a first workpiece and a second workpiece. The second workpiece is bonded to the first workpiece. The at least one channel is adapted to retain a fluid.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: September 18, 2012
    Assignee: Infineon Technologies AG
    Inventor: Hans-Joachim Barth
  • Patent number: 8270135
    Abstract: A circuit for driving a transistor half bridge is disclosed that comprises a series circuit of a first and a second transistor both having intrinsic or external free-wheeling diodes coupled in parallel. The circuit for driving a transistor half bridge comprises: an over-current detection circuit that is configured to signal an over-current condition when a load current flowing through the first transistor exceeds a first threshold; a protection circuit that is coupled to the over-current detection circuit and that is configured to disable an activation of the first transistor in response to a detected over-current and to re-enable the activation of the first transistor after a first time interval has elapsed; an evaluation circuit that is coupled to the over-current detection circuit and that is configured to check whether a further over-current condition is detected within a second time interval that follows the first time interval.
    Type: Grant
    Filed: July 9, 2010
    Date of Patent: September 18, 2012
    Assignee: Infineon Technologies Austria AG
    Inventor: Steffen Thiele
  • Patent number: 8271860
    Abstract: A retransmission method based on Low Density Parity Check (LDPC) and devices thereof are provided in embodiment of this present invention, so as to increase the system throughput. In the present invention, when retransmission is needed, the partial bits in the information sequence to be retransmitted are replaced by the prior information that the transmitter and the receiver both have know, with the replaced information sequence is LDPC coded, LDPC check sequence is obtained and is sent to the receiver. After receiving the LDPC check sequence, the receiver decodes the information sequence including the prior information with the LDPC check sequence. If the decoding is successful, after removing the prior information from the decoded information sequence, the receiver refills the decoded bits in a previous received information sequence, and performs decoding again with an LDPC check sequence corresponding to the previous received information sequence and obtains a complete information sequence.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: September 18, 2012
    Assignee: Huawei Technologies Co. Ltd.
    Inventors: Mingchun Zhou, Yuejun Wei
  • Patent number: 8266793
    Abstract: A module having a stacked magnetic device and semiconductor device, and method of forming the same. In one embodiment, the module includes a printed wiring board including a patterned conductor formed on an upper surface thereof. The module also includes a magnetic core mounted on the upper surface of the printed wiring board proximate the patterned conductor and a semiconductor device mounted on an upper surface of the magnetic core.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: September 18, 2012
    Assignee: Enpirion, Inc.
    Inventors: Ashraf W. Lotfi, Douglas Dean Lopata, John David Weld, Mathew A. Wilkowski
  • Patent number: 8268691
    Abstract: A semiconductor device and its method of manufacture are provided. Embodiments forming an active region in a semiconductor substrate, wherein the active region is bounded by an isolation region; forming a first doped region within the active region; forming a gate electrode over the active region, wherein the gate electrode overlies a portion of the first doped region; forming at least one dielectric layer over sidewalls of the gate electrode; forming a pair of spacers on the dielectric layer; and forming a second doped region substantially within the portion of the first doped region adjacent the one of the spacers and spaced apart from the one of the spacers. The first and second doped regions may form a double diffused drain structure as in an HVMOS transistor.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: September 18, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: William Wei-Yuan Tien, Fu-Hsin Chen, Jui-Wen Lin, You-Kuo Wu
  • Patent number: 8270451
    Abstract: An edge emitting semiconductor laser includes a semiconductor body, which has a waveguide region. The waveguide region has an active layer for generating laser radiation. The active layer is arranged between a first waveguide layer and a second waveguide layer. The waveguide region is arranged between a first cladding layer and a second cladding layer. The semiconductor body has a main region and at least one phase structure region in which is formed a phase structure for the selection of lateral modes of the laser radiation emitted by the active layer. The phase structure region is arranged outside the waveguide region or formed by a region in which a dopant is introduced or an intermixing structure is produced.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: September 18, 2012
    Assignees: OSRAM Opto Semiconductors GmbH, Fraunhofer-Gesellschaft zur Foerderung der Angewandten Forschung E. V.
    Inventors: Wolfgang Schmid, Uwe D. Zeitner, Hans-Christoph Eckstein
  • Patent number: 8271816
    Abstract: A system and method for statistics recording of power devices is disclosed. A power circuit includes a power device to provide a specified electrical power to a load and a host controller coupled to the power device. The host controller is configured to provide issue instructions to and retrieve status information from the power device. A communications and control interface (CCI) is coupled between the power device and the host controller. The CCI is configured to operate as a communications interface between the power device and the host controller and to retrieve and store status information from the power device. The CCI may be capable of performing statistical analysis on the status information to help reduce the amount of information exchanged between the host controller and the power device, thereby reducing bandwidth requirements.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: September 18, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Jens Barrenscheen, Giuseppe Bernacchia, Martin Krueger, Erwin Huber
  • Patent number: 8269289
    Abstract: Methods of forming transistor devices and structures thereof are disclosed. A first dielectric material is formed over a workpiece, and a second dielectric material is formed over the first dielectric material. The workpiece is annealed, causing a portion of the second dielectric material to combine with the first dielectric material and form a third dielectric material. The second dielectric material is removed, and a gate material is formed over the third dielectric material. The gate material and the third dielectric material are patterned to form at least one transistor.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: September 18, 2012
    Assignee: Infineon Technologies AG
    Inventor: Hongfa Luan
  • Patent number: 8270207
    Abstract: A method of operating magneto-resistive random access memory (MRAM) cells includes providing an MRAM cell, which includes a magnetic tunneling junction (MTJ) device and a word line selector having a source-drain path serially coupled to the MTJ device. A negative substrate bias voltage is connected to a body of the word line selector to increase the drive current of the word line selector. The threshold voltage of the word line selector is also reduced.
    Type: Grant
    Filed: January 14, 2010
    Date of Patent: September 18, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shine Chung, Tao-Wen Chung, Chun-Jung Lin, Yu-Jen Wang
  • Patent number: 8264994
    Abstract: A method of paging for a wireless device with multiple radio interfaces corresponding to multiple access networks. The method provides a first interface from the multiple radio interfaces to listen to paging for the multiple radio interfaces; turns the rest of the multiple radio interfaces into deep-sleep mode; and maintains attachment for each of the deep-sleep interfaces to a corresponding serving base station or access point.
    Type: Grant
    Filed: September 17, 2008
    Date of Patent: September 11, 2012
    Assignee: FutureWei Technologies, Inc.
    Inventors: H. Anthony Chan, Bin Shen, Haiyong Chen
  • Patent number: 8264256
    Abstract: Embodiments of the invention relate to drivers and methods for driving devices, comprising at least one functional unit at least one of which is adapted to deduce a device parameter of an electronic device from a terminal parameter of the electronic device.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: September 11, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Andrea Logiudice, Michael Lenz
  • Patent number: 8264857
    Abstract: A direct current-direct current (DC/DC) converter operated in the resonant mode of operation for converting a direct input voltage into a direct output voltage with a bridge circuit located on the input side and incorporating switching elements, with a resonance circuit incorporating a resonance inductance and a resonance capacitance as well as with a high-frequency transformer for galvanic separation is disclosed, the transformer incorporates at least one primary winding and at least one secondary winding with at least two winding terminals each. The alternating current (AC) output of the bridge circuit is connected to the primary winding and a rectifier bridge with diodes to the secondary winding.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: September 11, 2012
    Assignee: SMA Solar Technology AG
    Inventors: Regine Mallwitz, Peter Zacharias
  • Patent number: 8264066
    Abstract: An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: September 11, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Yu Lo, Hung-Jung Tu, Hai-Ching Chen, Tien-I Bao, Wen-Chih Chiou, Chen-Hua Yu
  • Patent number: 8263495
    Abstract: A method of forming an integrated circuit structure on a wafer includes providing a first etcher comprising a first electrostatic chuck (ESC); placing the wafer on the first ESC; and forming a via opening in the wafer using the first etcher. After the step of forming the via opening, a first reverse de-chuck voltage is applied to the first ESC to release the wafer. The method further includes placing the wafer on a second ESC of a second etcher; and performing an etching step to form an additional opening in the wafer using the second etcher. After the step of forming the additional opening, a second reverse de-chuck voltage is applied to the second ESC to release the wafer. The second reverse de-chuck voltage is different from the first reverse de-chuck voltage.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: September 11, 2012
    Assignee: Global Unichip Corp.
    Inventors: Ting-Yi Lin, Chi-Yuan Wen, Chuang Tse Chuan, Miau-Shing Tsay, Ming Li Wu
  • Patent number: 8262845
    Abstract: Systems and methods for processing semiconductor devices are disclosed. A preferred embodiment comprises a processing system that includes providing a processing system including a first container and a second container fluidly coupled to the first container, the second container being adapted to receive and retain an overflow amount of a fluid from the first container, and disposing the fluid in the first container and a portion of the second container. The method includes providing at least one semiconductor device, disposing the at least one semiconductor device in the first container, and maintaining the fluid in the second container substantially to a first level while processing the at least one semiconductor device with the fluid.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: September 11, 2012
    Assignee: Infineon Technologies AG
    Inventor: Lothar Doni
  • Patent number: 8261978
    Abstract: A wallet consolidator to warehouse information pertaining to at least one card and to retrieve the warehoused information to facilitate a transaction is provided. An embodiment of a Wallet consolidator can include a housing, one or more input devices positioned to receive information, and a memory device positioned to store at least a portion of the information received by the one or more input devices. The wallet consolidator can also include a radio frequency wireless communication interface associated with the housing and adapted to communicate with a point-of-sale terminal thereby to provide at least a portion of the Information stored in the memory device to the point-of-sale terminal, a display screen, and a controller positioned within the housing in communication with and to control each of the one or more input devices, the memory device, the radio frequency wireless communication interface, and the display screen.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: September 11, 2012
    Assignee: E-Micro Corporation
    Inventor: Frank Gangi
  • Patent number: 8264982
    Abstract: In a method for forming TDD MIMO downlink beams, a BS receives an index of a codebook element from a mobile terminal. The codebook element refers to a codebook element whose correlation value has a greatest modulus value among correlation values that are calculated by the mobile terminal and are about correlation between the codebook element and a channel corresponding to a non-transmitting antenna of the mobile terminal. The BS calculates a channel vector corresponding to the non-transmitting antenna of the mobile terminal. The BS calculates channel vectors of the transmitting antennas of the mobile terminal, and performs SVD to determine a best transmitting precoding matrix.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: September 11, 2012
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Luxi Yang, Daofeng Xu, Yinggang Du
  • Patent number: 8262099
    Abstract: An apparatus for adapting a workpiece holding device to a chuck of a machine tool includes a plurality of chuck locators configured for attachment to the chuck, such that the plurality of chuck locators includes at least three chuck locators. The apparatus further includes a mounting plate configured for attachment to the workpiece holding device. The mounting plate includes a body and a plurality of mounting plate locators corresponding to the plurality of chuck locators, such that the plurality of mounting plate locators are attached to the body and are configured to interface with the plurality of chuck locators.
    Type: Grant
    Filed: August 2, 2006
    Date of Patent: September 11, 2012
    Assignee: Lockheed Martin Corporation
    Inventors: Thomas C. Evans, Willis A. Rowcliffe
  • Patent number: 8263451
    Abstract: A method of forming an integrated circuit structure includes providing a wafer including a substrate and a semiconductor fin at a major surface of the substrate, and performing a deposition step to epitaxially grow an epitaxy layer on a top surface and sidewalls of the semiconductor fin, wherein the epitaxy layer includes a semiconductor material. An etch step is then performed to remove a portion of the epitaxy layer, with a remaining portion of the epitaxy layer remaining on the top surface and the sidewalls of the semiconductor fin.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: September 11, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chang Su, Tsz-Mei Kwok, Hsien-Hsin Lin, Hsueh-Chang Sung, Yi-Fang Pai, Kuan-Yu Chen
  • Patent number: 8264077
    Abstract: An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate. The TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is over the backside of the semiconductor substrate and connected to the back end of the TSV. A silicide layer is over and contacting the RDL.
    Type: Grant
    Filed: December 29, 2008
    Date of Patent: September 11, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chih Chiou, Weng-Jin Wu