Abstract: An input port for a network switch includes a cell buffer for receiving incoming unicast and multicast cells and for writing each cell into an internal cell memory. The cell buffer thereafter forwards each unicast cell from the cell memory to one network switch output port and forwards a separate copy of each multicast cell to each of several network switch output ports. When the cell buffer writes a unicast cell to the cell memory, it sends a pointer to the storage location of the unicast cell to a queue manager. When the cell buffer writes a multicast cell to the cell memory, it sends several pointers to the queue manager, one for each output port that is to receive a copy of the multicast cell, with each pointer pointing not to the multicast cell's storage location but to an empty storage location in the cell memory. The cell buffer also maintains a database relating each pointer it sent to the queue manager to an actual storage location of a unicast or multicast cell.

Abstract: Anonymous voice communication between a first station and a second station is facilitated by providing an interface that allows input of a transaction specification from at least one of the first and second stations. A reference code associated with the transaction is generated, there being a defined relationship between the reference code and the address of the second station for voice communication. The reference code is supplied to the first station, and a voice communication request and the reference code are received from the first station. The reference code is used to recover said address and a channel for voice communication is opened between said first and second stations. Voice communication can thereby be established between the first and second stations without providing the address of the second station to the first station.

Abstract: A method of rate control using a picture-based lookahead sliding window in a dual-pass transcoder/encoder compressed video architecture extracts statistics from an input video signal according to a simple compression standard, the input video signal being a compressed video signal for transcoding or an uncompressed video signal for encoding. A trans-factor is calculated for a current picture based on previous pictures in a sliding window to predict the complexity of the current picture, the trans-factor being a ratio of global complexity measures for the simple compression standard versus a sophisticated compression standard. Bits for the current picture are then allocated based on the complexity of future pictures in the sliding window. After encoding the current picture according to the sophisticated compression standard, the target bits of and the picture complexity in the sliding window, as well as the trans-factor, are updated as the window is moved by one picture.

Abstract: The present invention concerns an arrangement for cleaning ducts and chimneys, such as air conditioning ducts. The arrangement comprises a guide wire cable having a cleaning end and a feed end, a brush or some other tool being connected to the cleaning end of the guide wire cable, and a drive unit connected to the feed end of the guide wire cable, the arrangement further comprising transmission means for moving the brush by means of the drive unit. According to the invention the drive unit comprises a hydraulic pump, the transmission means are provided by hydraulic pipes arranged inside the guide wire cable, and the primary drive unit for the brush being a hydraulic motor connected to the cleaning end of the guide wire cable.

Abstract: A quadrature amplitude modulation (QAM) receiver digitizes an analog QAM signal representing a transmitted sequence of complex elements to produce a digital waveform sequence representing amplitudes of successive samples of the QAM signal. The QAM receiver employs a digital signal processing (DSP) circuit to process the digital waveform sequence to produce a soft decision sequence of complex elements, each of value that is a higher resolution approximation of a value of a corresponding transmitted sequence element. A pair of slicers then convert each soft decision sequence element into a lower resolution hard decision sequence element matching the corresponding complex element of the transmitted sequence.

Abstract: A test head for a semiconductor integrated circuit tester, the test head includes a power supply board mounted to a power distribution board and positioned between the power distribution board and a device interface board. The power supply board includes a power supply circuit having power supply input terminals for receiving electrical power at a voltage Vin and force and return terminals for supplying regulated electrical power at a voltage Vout. The power supply board further includes a power connector for connecting the force and return terminals of the power supply circuit to power supply contact elements of the device interface board.

Abstract: A fuel injection arrangement, which comprises a fuel source and a fuel nozzle connected thereto, including a fuel chamber and a needle valve arrangement in connection with the fuel chamber for controlling the fuel injection and an arrangement for bringing about a force effect on the valve of the needle valve arrangement in the closing direction thereof; a fuel control arrangement by means of the different switching positions of which, the fuel flow connection is connectable between the fuel source and the fuel chamber of the fuel nozzle as well as between the fuel source and the arrangement for bringing about a force effect, in which the fuel control arrangement comprises a mechanical force unit for changing its switching positions.

Abstract: To estimate path delays within an IC, a serial database is first created to hold and read out RC extraction data for nets within the IC in an order in which the RC extraction data will be needed when estimating path delays. Thereafter, as the RC extraction data is sequentially read out of the database for each net, the path delay though each section of the net is computed and added to the estimated path delay for each signal path including that net section. The RC extraction data for each net is accessed and accessed only once, thereby minimizing the processing time needed to perform timing analysis by minimizing hard disk read accesses when the RC extraction database resides on a hard disk.

Abstract: A hybrid circuit within a full-duplex transceiver transmits an outgoing signal outward on a communication channel at the same time it receives an incoming signal arriving via the communication channel, and the outgoing and incoming signals sum to form a combined signal. The hybrid circuit generates both the outgoing signal and a replica of the outgoing signal in response to an input signal, and then subtracts the replica from the combined signal in producing a received signal. The received signal includes a component derived from the incoming signal and a residual echo component having peaks resulting from a phase difference between the outgoing signal and its replica. The transceiver periodically digitizes the received signal to produce a data sequence representing the incoming signal.

Abstract: A debugger produces a display based on instructions executed by a circuit simulator or verification tool and on waveform data produced by the simulator or verification tool when executing the instructions. The instructions include a set of statements, each corresponding to a separate circuit signal generated by a circuit and each including a function defining a value of the circuit signal as a function of values of other circuit signals. The simulator evaluates the statements at various simulation times to compute signal values at those simulation times. The waveform data indicates signal values the simulator computes when evaluating the statements. The debugger display includes a set of statement event symbols, each corresponding to a separate evaluation of a statement and each positioned in the display to indicate a simulation time at which the simulator evaluated the statement.

Abstract: A detachable support for an animal riding in a vehicle includes first and second substantially parallel plate-form members connected together at respective upper edges to form a hook structure that is adapted to tit over a window glass of the vehicle when the window glass extends upward from a sill of a window opening to a partially open position, with the first plate-form member being outside the vehicle and the second plate form member being inside the vehicle, whereby the support rests on the sill and is retained in position by engagement of the hook structure with the window glass. A third plate-form member extends inward from a lower edge of the second plate-form member, substantially perpendicular to the second plate-form member, whereby the third member forms a shelf extending inward from the sill. A layer of gripping material is adhered to an upper surface of the third plate-form member.

Abstract: A container opener comprising a handle portion on which force is applicable when removing a lid from a container and a utility portion for engaging with said lid to be removed from said container, one or both of said portions are generally made of a resilient but relatively stiff material, which said utility portion is provided with a gripping means made of an elastomeric material or a soft plastic material for gripping and/or simultaneous movement with said lid.

Abstract: An apparatus for emulating the behavior of an electronic device under test (DUT) includes a computer and one or more resource boards containing emulation resources suitable for emulating portions of the DUT. Each resource board includes transaction device for communicating with one another and with the computer network via data packets transmitted over a packet routing network. The packet routing network and the transaction device on each resource board provide “virtual signal paths” between input and output terminals of resources mounted on separate resource boards. To do so, a transaction device on one resource board sends packets containing data indicating output signal states of local emulation resources to a transaction device on another resource board when then drives signals supplied to input terminals of its local emulation resources to the states indicated by the data conveyed in the packet.

Abstract: An input device receives sets of input data to be stored in a correlation matrix memory. A sampler derives, from each set of input data, a respective set of tuples, and a coder codes each of the tuples, which are then combined for the respective set of input data. A separator generator generates for each set of input data a respective, associated, unique separator, which is stored with its respective set of input data. For each set of input data, the respective combined coded tuples and the respective unique separator are applied to the correlation matrix memory as a row address and as a column address, or vice-versa.

Abstract: A system for testing an integrated circuit device under test (DUT) communicating though synchronous digital signals and through a high speed serialization/de-serialization (serdes) bus includes a serdes interface circuit for communicating with the DUT via the serdes bus and an integrated circuit (IC) tester for communicating with the DUT and with the serdes interface circuit via digital signals. State changes in the digital signals are synchronized to a clock signal within the IC tester. The serdes interface circuit receives instructions from the IC tester via at least one of the digital signals and responds to the instructions by transmitting data to the DUT via the serdes bus using appropriate serdes protocol, by receiving and storing data transmitted by the DUT via the serdes bus, and by thereafter forwarding the stored data to the IC tester via at least one of the digital signals.

Abstract: An input or output switch port for a network switch converts each incoming packet into a cell sequence stores each cell in a cell memory. The switch port includes a traffic manager for queuing cells for departure from the cell memory and then signaling the cell memory to read out and forward cells in the order they are queued. The traffic manager selectively queues cells for departure on either a cell-by-cell or sequence-by-sequence basis. When cells are queued for departure on a cell-by-cell basis, cells of two or more sequences may be alternately read out and forwarded from the cell memory. Thus cells of different sequences may be interleaved with one another as they depart the cell memory. When a cell sequence is queued on a sequence-by-sequence basis all of its cells are read out of the cell memory and forwarded as a contiguous sequence and are not interleaved with cells of other sequences of the same departure queue.