Abstract: A differential pair with input transistors and provided with a variable degeneration resistor. The degeneration resistor comprises a series arrangement of two branches of coupled resistors which are shunted in mutually corresponding points by respective control transistors whose gates are interconnected. The differential pair further comprises a control loop comprising two current mirrors a bias resistor and a current source for providing a control signal to the gates of the control transistors. The control loop does not influence the DC bias of the differential pair.
Abstract: An oscillator in which the transconductance of an amplification transistor (T0) is limited through a measurement of the potential at the input electrode (G0) of the amplification transistor (T0) by means of a differential pair (T1, T2) for safeguarding the starting of the oscillator.
Abstract: A CMOS bias circuit capable of operating down to a supply voltage equal to the sum of the threshold voltage and the saturation voltage. It generates a threshold referenced bias voltage which is independent of the supply voltage. This bias voltage is equal to the gate source voltage of a transistor which supplies a current equal to the gate-source voltage of another transistor divided by the resistance of a feedback resistor. Via the feedback resistor, changes in the supply voltage cause counteracting changes in the gate-source voltages of the transistors, resulting in a bias voltage which is substantially constant with changing supply voltage.
Abstract: A method of manufacturing a semiconductor device with a bipolar transistor (1) and a MOS transistor (2) formed in a silicon body (3) which for this purpose is provided with a field insulation region (4) by which semiconductor regions (6, 7) adjoining a surface (5) of said body are mutually insulated. A first region (6) is to be used for the bipolar transistor and a second region for the MOS transistor. The two regions are provided in that order with a gate dielectric layer (10) and an auxiliary layer (11) of non-crystalline silicon. The auxiliary layer and the gate dielectric layer are subsequently removed from the first region. Then an electrode layer (13) of non-crystalline silicon is deposited. An emitter electrode (15) is formed in the electrode layer on the first region, and a gate electrode (16) is formed both in the electrode layer and in the auxiliary layer on the second region.
Type:
Grant
Filed:
March 27, 1996
Date of Patent:
October 20, 1998
Assignee:
U.S. Philips Corporation
Inventors:
Willem Van Der Wel, Alexander C. L. Jansen, Ronald Koster, Armand Pruijmboom
Abstract: An oscillator provided with an amplitude controller (AMPREG1) which is coupled by an input (G1) to an amplitude reference terminal (AMPREF1). The amplitude of the oscillator signal at the output terminal (KU) can be adjusted through coupling of a voltage-generating means to the amplitude reference terminal (AMPREF1).
Abstract: A high-voltage AC to low-voltage DC converter includes a rectifier circuit for providing a pulsating high-voltage DC signal from the high-voltage AC input and a switch having its main current path coupled between the rectifier circuit output and an output terminal of the converter. A filter capacitor is coupled to the output terminal to filter the low-voltage DC output, and first and second voltage sensors are coupled to the rectifier output and the low-voltage DC output terminal of the converter circuit, respectively. The first voltage sensor is set to sense a low (typically zero) voltage, and the second voltage sensor is set to sense the desired low-voltage DC output level.
Type:
Grant
Filed:
December 12, 1996
Date of Patent:
October 6, 1998
Assignee:
Philips Electronics North America Corporation
Abstract: A method of cleaning probe cards provided with probe tips, in which method the tips are cleaned of a contaminating material by exposing the tips to a cleaning solution by dipping in the solution such that only their ends touch the cleaning solution.
Abstract: A method of manufacturing a semiconductor device is disclosed in which semiconductor switching elements (2) and an integrated microcomponent (3) with a fixed electrode (6) and an electrode (7) which is movable relative to the fixed electrode (6) are provided adjacent a surface of a semiconductor slice (1), which slice (1) is subsequently subdivided into individual semiconductor devices. After the semiconductor switching elements (2) have been provided, metal conductor tracks (20) of a first level are provided on the surface which form the fixed electrode (6) and electrical connections (9), over which an insulating layer (21) and metal conductor tracks (22) of a second level are provided, which form the movable electrode (7) and further electrical connections (8), after which the insulating layer (21) between the fixed (6) and the movable electrode (7) is removed.
Abstract: In a known communication system, synchronous and asynchronous traffic is exchanged between stations using a common communication path, wherein the communication system includes a complicated controlling mechanism for controlling fair allocation of asynchronous traffic. A communication system as disclosed herein includes a simple fairness mechanism for fair allocation of asynchronous traffic to the stations without a scheduler being necessary. To this end, the communication system exchanges information between the stations via the communication path in a frame of synchronous time slots and an asynchronous time slot, the synchronous time slots including an access bit for demanding access to the asynchronous time slot. All stations monitor all access bits of the other stations and set their own access bit in accordance with a set of fairness rules.
Type:
Grant
Filed:
November 29, 1995
Date of Patent:
September 22, 1998
Assignee:
U.S. Philips Corporation
Inventors:
Gerardus M.J. Havermans, Heert R. Kamstra
Abstract: An A/D converter in which an interpolation circuit (15, 16, 17, 18) makes weighted combinations of reference crossing signals (A/Ac,B/Bc) provided by an input circuit (100, 200), so as to obtain an expanded set of reference crossing signals (A/Ac+A1/Ac1 . . . A7/Ac7, B/Bc+B1/Bc1 . . . Bc7). The interpolation circuit (15, 16, 17, 18) is arranged to make at least one weighted combination of reference crossing signals with weighting factors which have a non-integer ratio so as to compensate for a non-linearity in the reference crossing signals (A/Ac,B/Bc). Accordingly, a better compromise is obtained between accuracy, on the one hand, and circuit complexity, on the other hand.
Abstract: A communication system having a transmitter that supplies test sequences formed from several test frequencies and a receiver having test means for testing the quality of a channel. The test means calculates for the plurality of frequencies both the transfer function of the channel and the channel noise variance. By taking the noise caused by the receiver into account, the test means determine the most suitable frequency band and bit rate for the transmission. This information is supplied to the transmitter to establish the transmission.
Type:
Grant
Filed:
March 7, 1996
Date of Patent:
September 1, 1998
Assignee:
U.S. Philips Corporation
Inventors:
Sabine Giorgi, Antoine Chouly, Bruno Ballarin
Abstract: A protected switch has a power semiconductor device (P) having first and second main electrodes (D and S) for coupling a load (L) between first (2) and second (3) voltage supply lines, a control electrode (G) coupled to a control voltage supply line (4) and a sense electrode (S1) for providing in operation of the power semiconductor device a sense current that flows between the first (d) and sense electrodes (S1) and is indicative of the current that flows between the first (D) and second (S) main electrodes. A control arrangement (S) has a sense resistance (R4) coupled to the sense electrode (S1) and across which a sense voltage is developed by the sense current (I.sub.3). A control semiconductor device (M3) has its main electrodes coupled between the control electrode (G) and the second (S) main electrode of the power semiconductor device (P).
Abstract: A method is described for repetitively imaging a mask pattern, on separate fields of a substrate (W), for example, for IC manufacture, which substrate fields are positioned without any field-by-field alignment so that the speed of throughput of substrates can be increased. An accurate interferometer system (50, 100, 150) having five measuring axes (MAX.sub.1, MAX.sub.2, MAX.sub.3, MAX.sub.4, MAX.sub.5) is also described, which system is intended in the first instance for use in an apparatus for performing the method, but which can also be used in a more general way in those cases where an object must be measured in five degrees of freedom.
Abstract: An LIGBT includes an LDMOST structure in which the drain/anode 9, 13 is provided with a pn junction which injects charge carriers into the drift region 8. To prevent latch-up, the base region 6 of the LDMOST is provided with deep zones 6b of the same conductivity type as the base region which extend locally comparatively far into the drift region. These zones collect charge carriers injected by the anode into the drift region and form a low-ohmic connection to the source contact 11 for these charge carriers. Since these zones are provided locally only, the threshold voltage of the LDMOST is not or at least substantially not influenced by the deep zones. In a modification, a ballast series resistance is provided in the source zone, so that latch-up is counteracted also at high temperatures.
Abstract: A semiconductor diode laser amplifier (100) includes an active layer (4) which is situated between two cladding layers (1A, (3,6)) and in which a strip-shaped active region is present which is bounded in longitudinal direction by two end faces (7,8) which are practically perpendicular to the active region and are provided each with an antireflection layer (71,81).The amplification ripple of such a laser amplifier (100) is comparatively high, in particular when radiation of different wavelengths is present in the laser (100), such as the TE and TM portions of the radiation to be amplified.
Abstract: A bi-directional signal transmission system comprises a bi-directional signal path with a low-impedance section coupled to a high-impedance section through a signal coupling for transmission of a binary signal in both directions; and adapting means for adapting the signal coupling under control of the signal itself, dependent on the transmission direction. I.sup.2 C-bus systems in particular benefit from the presence of the adapting means since communicating stations now can be located farther apart than was practical previously. In addition, the driving capability of the transmitting station is no longer a limiting factor.
Type:
Grant
Filed:
October 21, 1994
Date of Patent:
August 4, 1998
Assignee:
Philips Electronics North America Corporation
Abstract: An audio amplifier (20) which includes an arrangement (300) for influencing an audio signal applied to the audio amplifier (20). This arrangement (300) has an amplifier for additionally amplifying a high-frequency range of the audio signal relative to the rest of the audio signal. This additional amplification takes place once a value of the audio signal has exceeded a limit value. The additional amplification only takes place for a brief period of time. The audio amplifier additionally amplifies high-frequency peaks in the audio signal for a brief period of time. The rising and falling slopes of these peaks are briefly enlarged as a result. Especially for pop music, this appears to be an attractive effect.
Abstract: A reservation-based wireless asynchronous transfer mode (ATM) local area network includes a system architecture of mobile nodes (MNs), each MN for communicating with various ones of the other MNs. A plurality of services is supported wherein each service has respective quality-of-service (QoS) requirements. A medium access control (MAC) layer using a reservation-based communications protocol is provided, wherein the protocol divides all MAC-based communications between a control channel and a data channel, the control channel and the data channel together making up a control-data superframe (CDS). The protocol further utilizes the control channel for allocating a bandwidth of the data channel to each service.
Type:
Grant
Filed:
June 3, 1996
Date of Patent:
July 28, 1998
Assignee:
Philips Electronics North America Corporation
Abstract: In a the receiver, a reception signal is digitized (5) with a relatively high sampling frequency. Analog filters (2, 4) prevent aliasing. The digitized reception signal is applied via a splitter (100) to a quadrature digital signal processor (9, 10, 11, 12). In this processor, a desired carrier is selected and demodulated. The splitter (100) transforms the digitized reception signal in accordance with a first and a second transform function (H.sub.1, H.sub.2) to obtain in-phase and quadrature components (xi, yi), respectively. The sampling frequency is reduced (130, 140) in the splitter. A specific relation between the phase and magnitude of the transform functions (H.sub.1, H.sub.2) prevents aliasing. Such a relation can be achieved with relatively simple digital filters (110, 120).
Type:
Grant
Filed:
September 5, 1995
Date of Patent:
July 21, 1998
Assignee:
U.S. Philips Corporation
Inventors:
Alphons A. M. L. Bruekers, Gerardus C. M. Gielis
Abstract: The invention relates to a packet switching system comprising a plurality of inlet circuits which are used each for multiplying a cell coming in by an inlet line, which are provided for transmission via different switches and for producing a time stamp to be supplied with each cell, and the system comprising a plurality of outlet circuits used for selecting a cell to be conveyed by an outlet line from a plurality of received cells that have the same time stamp. An inlet circuit is provided for furthermore producing an inlet number that features the inlet circuit and that is to be supplied with each cell, and the outlet circuit is provided for establishing the correct order of successive cells based upon the time stamp and the inlet number.