Abstract: Various embodiments of a test circuit and methods of fabricating and using the same are provided. In one aspect, a test circuit includes a semiconductor substrate and a mask thereon that has an opening to enable impurity doping of selected portions of the test circuit. A plurality of circuit devices are provided on the substrate that have respective active regions positioned at staggered known distances from the mask opening. Each of the plurality of circuit devices has a gate electrode that extends to the opening and has a first impurity region of a first conductivity type and a second impurity region of a second and opposite conductivity type. Where the predicted on-state output current of a given circuit device exceeds an actual output current of the given circuit device, there is indication of an overlap between the first and second impurity regions of the gate electrode of the given device.

Abstract: Various methods of inspecting a film on a semiconductor workpiece for a residue are provided. In one aspect, a method of inspecting a film on a semiconductor workpiece wherein the film has a known infrared signature is provided. The method includes heating the workpiece so that the film emits infrared radiation and sensing the infrared radiation emitted from the film. The infrared signature of the radiation emitted from the film is compared with the known infrared signature and a signal indicative of a deviation between the infrared signature of the emitted infrared radiation and the known infrared signature is generated. The method enables the rapid and accurate detection of residues, such as oxide residues on nitride films.

Abstract: Various circuit devices for contact defect inspection and methods of fabrication and use thereof are provided. In one aspect, a circuit device is provided that includes a substrate and an insulating film positioned on the substrate that has a plurality of openings therein. A plurality of members is provided. Each of the plurality of members is positioned in one of the plurality of openings and has known dimensions. The plurality of members provide a known set of defects in the plurality of openings to facilitate inspection of the plurality of openings. The circuit device may be used to accurately calibrate inspection tools to detect contact defects.

Abstract: Various methods of inspecting a semiconductor workpiece for defects are provided. In one aspect, a method of inspecting a surface of a semiconductor workpiece for defects is provided that includes applying a negative-tone photoresist film to the surface and baking the negative-tone photoresist film to release solvent therefrom and to facilitate release of catalyzing substances held by the defects into the negative-tone photoresist film. The catalyzing substances react chemically with at least one moiety of the photoresist film to thereby lower the solubility of one or more portions of the negative-tone photoresist film in a developer. The negative-tone photoresist film is developed with the developer and the surface is inspected for the portions of the negative-tone photoresist film remaining after the developing process. The remaining portions of the negative-tone photoresist film are indicative of the locations of the defects.

Abstract: Various methods of fabricating circuit devices incorporating a gate stack are disclosed. In one aspect, a method of fabricating a circuit device on a substrate is provided that includes forming a first insulating film on the substrate and etching the first insulating film to define a temporary gate structure. A second insulating film is formed on the substrate adjacent to the temporary gate structure. The temporary gate structure is removed to leave an opening extending to the substrate. A gate stack is formed in the opening. The process of the present invention provides for metal gate definition with sub-lithographic limit critical dimensions.

Abstract: Various methods of fabricating circuit devices are provided. In one aspect, a method of fabricating a circuit device on a substrate is provided. The method includes forming a doped silicon structure on the substrate and forming a hemispherical grain silicon film on the silicon structure. The substrate is heated from a first temperature to a second temperature while undergoing exposure to a dopant gas to add a dopant to the hemispherical grain silicon film. The method provides for improved capacitor electrode fabrication via concurrent gas exposure and substrate temperature ramp-up. In this way, dopant gas is introduced before the doped silicon structure transitions from an amorphous state to a polycrystalline state.

Abstract: Various methods of fabricating a silicide film and structures incorporating the same are provided. In one aspect, a method of fabricating a silicide film is provided that includes providing a silicon surface and etching the silicon surface at between isotropic and anisotropic etching conditions to define a plurality of oblique surfaces thereon and thereby increase the surface area of the silicon surface. A silicide-forming material is deposited on the plurality of oblique surfaces and the silicon surface is heated to react the silicide-forming material therewith and form silicide. The roughing of the silicon surface facilitates metal-silicide reactions.

Abstract: Methods of removing gaseous phase contaminants from a processing chamber, such as a PVD chamber, are provided. In one aspect, a method of removing gaseous phase water from a processing chamber is provided that includes placing a heated substrate that has a titanium film in the processing chamber to dissociate a first portion of the gaseous phase water into hydrogen and oxygen and capture some of the oxygen in, the titanium film. The dissociated hydrogen and uncaptured oxygen are pumped from the processing chamber and the substrate is removed from the processing chamber. Pump down times and test wafer consumption may be reduced.

Abstract: Various methods of inspecting a workpiece for residue are provided. In one aspect, a test structure is provided that includes a substrate, a first conductor on the substrate and a second conductor on the substrate. A resistor network is coupled in parallel between the first conductor and the second conductor. The resistor network has n resistors and n contacts and a measurable resistance RM. Each of the n resistors has a known resistance Rk and a known position on the substrate.

Abstract: A plug is provided for sealing a port of a downhole tool or other device. In one aspect, the plug includes a disk that has an upper surface, a lower surface and an annular groove in the lower surface. The annular groove has an inner wall and a outer wall. An annular seal member is positioned in the annular groove. An annular member is positioned in the annular groove between the annular seal member and the and the outer wall to retain the annular seal member in the annular groove. A member is provided that has least one external thread for engaging the at least one internal thread of the port whereby rotation of the member in a given direction moves the disk toward and compresses the annular seal member against the bottom surface. The plug provides excellent fluid sealing capability with a short axial dimension suitable for small O.D. and thin-walled tools.

Abstract: A device stack for fabrication of an isolation structure and methods of fabricating the same are provided. In one aspect, a method of processing a substrate is provided that includes exposing the substrate to a plasma ambient containing nitrogen and oxygen to form a nitrogen containing interface. An oxide film is formed on the nitrogen containing interface and a silicon rich nitride film is formed on the oxide film. The silicon rich nitride film is exposed to a plasma ambient containing oxygen to convert an upper portion of the silicon rich nitride film to silicon oxynitride. The optical properties of the nitride film are enhanced so that UV lithographic patterning of etch masking is improved.

Abstract: Various methods of fabricating a silicide structure are provided. In one aspect, a method of fabricating a circuit structure on a silicon surface is provided that includes exposing the silicon surface to a plasma ambient containing hydrogen and an inert gas, and depositing a metallic material capable of forming silicide on the silicon surface. The metallic material is heated to form a metal silicide on the silicon surface. The method provides for low sheet resistance silicide structures by eliminating native oxide films without the risk of spacer material backsputtering.

Abstract: Various methods of fabricating a circuit structure, such as a gate electrode or a resistor are provided. In one aspect, a method of fabricating a circuit structure is provided that includes forming a silicon structure on a substrate and forming an oxide film on the silicon structure. A first portion of the oxide film is masked while a second portion is left unmasked. The second portion of the oxide film is removed by isotropic plasma etching to expose a portion of the silicon structure, and the first portion of the oxide film is unmasked. Use of isotropic etching for removal of a resistor protect oxide reduces the potential for isolation structure damage due to aggressive overetching associated with conventional anisotropic etching techniques.

Abstract: Methods of fabricating source/drain regions and transistors incorporating the same are provided. In one aspect, a method of fabricating a source/drain region in a substrate is provided that includes forming a stack on the substrate with a gate electrode and an insulating layer positioned on the gate electrode that has etch selectivity to the gate electrode. A first doped region is formed in the substrate adjacent to the stack with a first horizontal junction. A second doped region is formed in the substrate that overlaps the first doped region and has a second horizontal junction positioned beneath the first horizontal junction. An implant of impurity ions into the substrate is performed to establish a third doped region that overlaps the second doped region and has a third horizontal junction positioned beneath the second horizontal junction. The insulating layer prevents impurity ions from substantially penetrating through the gate electrode.

Abstract: In one aspect of the present invention, a method of forming a layer of silicide on a surface of a silicon-containing structure surface that is separated from a first structure by a second structure is provided. The method includes the steps of forming a layer of silicide-forming material on the surface of the silicon-containing structure, and the first and second structures. The layer of silicide-forming material is annealed in an ambient containing a nitrogen bearing species at a pressure greater than about one atmosphere to form the layer of silicide on the surface of the silicon-containing structure. The nitrogen bearing species reacts with the silicide-forming material to retard the formation of silicide on the third structure. The method reduces the potential for silicide bridging between, for example, the gate and source/drain regions of a transistor during silicide contact formation.

Abstract: Methods of removing resist residues from semiconductor workpiece surfaces are provided. In one aspect, a method of removing resist from a surface of a workpiece is provided that includes the steps of exposing the workpiece to a plasma and rinsing the workpiece with CO2 and water in a processing chamber to dissolve the resist. Reliance on post plasma strip solvent rinses for resist removal is eliminated. The combination of CO2 with post-plasma strip water rinse increases the solubility and thus the removal rate of resist residues.

Abstract: An auxiliary device for filter exchange in an air filtering system of a clean room for allowing easy exchange of the filter used in the clean room. The auxiliary device for filter exchange may include a block plate having a width to be inserted through a filter frame extended downwardly toward the inside of a production line and equipped with a filter thereon; a support for supporting the bottom of the block plate and facing with the inside wall of the filter frame keeping a constant distance between them; and a tube having an air passage and installed to closely adhere to the filter frame along the circumference of the support for sealing. Adjustable seal inserts (such as corner-shaped inserts) may be provided for auxiliary or additional sealing effect, for example, at corners of a filter frame. A pressure indicator may also be provided for monitoring correct inflation of the tube.

Abstract: Various jars are provided for delivering axial blows to a well string. In one aspect, a jar is provided that includes a mandrel and a housing telescopically positioned about the mandrel. A piston is positioned between the mandrel and the housing and closes a substantially sealed chamber in the housing. The piston has a first flow passage and a second flow passage which enable the selective flow of a fluid into and out of the substantially sealed chamber. A collet is positioned in the housing for selectively engaging the mandrel. A sleeve is positioned around and axially moveable relative to the collet. The sleeve has a reduced inner diameter portion at which the collet selectively expands radially to disengage the mandrel. Axial movement of the mandrel engages the collet, which in turn, moves the piston and pressurizes the chamber. When the reduced diameter portion of the sleeve is reached, the collet releases the mandrel, enabling the mandrel to impact an anvil surface of the housing.

Abstract: A tungsten gate electrode and method of fabricating the same are provided. In one aspect, a method of fabricating a gate electrode stack on a substrate is provided that includes forming an insulating film on the substrate and forming a conductor film on the insulating film by initially depositing a film of amorphous silicon and amorphous tungsten, and thereafter depositing a film of polycrystalline tungsten on the film and annealing the substrate to react the amorphous silicon with the amorphous tungsten to form tungsten silicide on the insulating film and to increase the grain structure of the polycrystalline tungsten film. The tungsten silicide film and the polycrystalline tungsten film are patterned to define the gate electrode stack. The method enables the seamless fabrication of an adhesion layer and a tungsten gate in a single chamber and without resort to titanium.

Abstract: Various embodiments of an ion implantation apparatus are provided. In one aspect, an apparatus for implanting a workpiece with ions is provided that includes a housing enclosing a first chamber. A source of accelerated ions is provided for directing a beam of ions through the first chamber toward the workpiece. A second chamber is provided for holding the workpiece along with a plurality of longitudinally spaced chambers that are defined by the housing and a plurality of longitudinally spaced bulkheads. Each of the bulkheads has an aperture enabling fluid communication between the plurality of longitudinally spaced chambers and the passage of the beam of ions. A source of gas is coupled to the second chamber. A pumping system is provided for evacuating the first chamber, the second chamber and the plurality of longitudinally spaced chambers. The pumping system and the plurality of longitudinally spaced chambers provide an increase in pressure between the first chamber and the second chamber.