Patents Represented by Attorney Wells St. John P.S.
  • Patent number: 8017184
    Abstract: The present invention provides metal-containing compounds that include at least one ?-diketiminate ligand, and methods of making and using the same. In certain embodiments, the metal-containing compounds include at least one ?-diketiminate ligand with at least one fluorine-containing organic group as substituent. In other certain embodiments, the metal-containing compounds include at least one ?-diketiminate ligand with at least one aliphatic group as a substituent selected to have greater degrees of freedom than the corresponding substituent in the ?-diketiminate ligands of certain metal-containing compounds known in the art. The compounds can be used to deposit metal-containing layers using vapor deposition methods. Vapor deposition systems including the compounds are also provided. Sources for ?-diketiminate ligands are also provided.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: September 13, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Dan Millward, Timothy A. Quick
  • Patent number: 8018938
    Abstract: This invention includes methods and packet switches that translate a packet between a switching format and a transport format. One packet switch receives a packet intended for a destination port of a packet switch from a switching fabric of the packet switch and determines, based on the destination port, a treatment to be applied to the packet. The packet switch then applies the treatment to the packet prior to forwarding the packet to the destination port. The treatment may include adding a transport identifier to the packet.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: September 13, 2011
    Assignee: World Wide Packets, Inc.
    Inventors: Kelly Donald Fromm, Keith Michael Bly
  • Patent number: 8013598
    Abstract: Provided is an object detecting device, which can detect the shape of or the distance from an object made of an electrically conductive or magnetic material, and which can detect the position indicated by an object made of an electrically-non-conductive/non-magnetic material, such as a finger. The object detecting device detects the shape of or the distance from an object to be measured, which is placed on a detection surface and made of an electrically conductive or magnetic material, by using an electromagnetic induction. The object detecting device includes a first loop wire group of a plurality of first loop wires (1) arranged in parallel on the same plane, a second loop wire group of a plurality of second loop wires (2) arranged in parallel on the same plane, and a spacer (3) for keeping the distance between them at a constant. The plurality of the second loop wires (2) are individually arranged in a direction perpendicular to the plurality of the first loop wires (1).
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: September 6, 2011
    Assignee: Newcom, Inc.
    Inventor: Yasuji Ogawa
  • Patent number: 8011096
    Abstract: The invention relates to a method for increasing the bending strength and the endurance limit of crankshafts by locally restricted hammering in areas of high stress, such as grooves, the mouths of bores and cross-sectional transition zones, in which method pressure impulse machines or beating devices comprising heating tools are employed. The pressure impulse machines or beating devices only execute a relative displacement of the beating tool against the surface of the crankshaft segment to be processed when the compressive stress is introduced between the heating tool and said surface of the crankshaft segment to be processed. The invention also relates to a device for increasing the endurance limit of crankshafts.
    Type: Grant
    Filed: February 5, 2005
    Date of Patent: September 6, 2011
    Assignee: Maschinenfabrik Alfing Kessler GmbH
    Inventors: Alfons Reeb, Jochen Schmidt, Alexis Boemcke
  • Patent number: 8012847
    Abstract: First and second isolation trenches are formed into semiconductive material of a semiconductor substrate. The first isolation trench has a narrowest outermost cross sectional dimension which is less than that of the second isolation trench. An insulative layer is deposited to within the first and second isolation trenches effective to fill remaining volume of the first isolation trench within the semiconductive material but not that of the second isolation trench within the semiconductive material. The insulative layer comprises silicon dioxide deposited from flowing TEOS to the first and second isolation trenches. A spin-on-dielectric is deposited over the silicon dioxide deposited from flowing the TEOS within the second isolation trench within the semiconductive material, but not within the first isolation trench within the semiconductive material. The spin-on-dielectric is deposited effective to fill remaining volume of the second isolation trench within the semiconductive material.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: September 6, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Robert D. Patraw, M. Ceredig Roberts, Keith R. Cook
  • Patent number: 8012532
    Abstract: There is disclosed a method of forming crystalline tantalum pentoxide on a ruthenium-containing material having an oxygen-containing surface wherein the oxygen-containing surface is contacted with a treating composition, such as water, to remove at least some oxygen. Crystalline tantalum pentoxide is formed on at least a portion of the surface having reduced oxygen content.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: September 6, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Vishwanath Bhat, Rishikesh Krishnan, Dan Gealy
  • Patent number: 8011092
    Abstract: The invention includes methods of utilizing removable mechanical precising mechanisms and/or optical-based precising mechanisms to align chips within sockets. The sockets can be configured so that compression of the sockets opens a clamping mechanism. A chip can be placed within a socket with a manipulator and aligned during compression of the socket. Subsequently, the compression of the socket can be released while the manipulator remains in contact with the chip to hold the chip in place until the clamping mechanism is retaining the chip in the socket. The chip can then be released from the manipulator. The invention also includes systems for utilizing removable nests to align various chip geometries within generic socket designs.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: September 6, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Daniel P. Cram, A. Jay Stutzman
  • Patent number: 8013376
    Abstract: Some embodiments include DRAM having transistor gates extending partially over SOI, and methods of forming such DRAM. Unit cells of the DRAM may be within active region pedestals, and in some embodiments the unit cells may comprise capacitors having storage nodes in direct contact with sidewalls of the active region pedestals. Some embodiments include 0C1T memory having transistor gates entirely over SOI, and methods of forming such 0C1T memory.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: September 6, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Kunal R. Parekh
  • Patent number: 8008144
    Abstract: A recessed access device having a gate electrode formed of two or more gate materials having different work functions may reduce the gate-induced drain leakage current losses from the recessed access device. The gate electrode may include a first gate material having a high work function disposed in a bottom portion of the recessed access device and a second gate material having a lower work function disposed over the first gate material and in an upper portion of the recessed access device.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: August 30, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Venkatesan Ananthan, Sanh D. Tang
  • Patent number: 8009343
    Abstract: An optical imaging device (PL), in particular an objective for semiconductor lithography, is provided with at least one system diaphragm. The system diaphragm comprises a multiplicity of mobile plates, which are rotatably mounted. The plates have a spherical curvature.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: August 30, 2011
    Assignee: Carl Zeiss SMT GmbH
    Inventors: Bernhard Gellrich, Thomas Bischoff, Hermann Bieg, Martin Huber, Francois Henzelin, Gerhard Szekely, Uy-Liem Nguyen, Martin E. Humphries
  • Patent number: 8003482
    Abstract: A method of processing a semiconductor substrate in forming scribe line alignment marks includes forming pitch multiplied non-circuitry features within scribe line area of a semiconductor substrate. Individual of the features, in cross-section, have a maximum width which is less than a minimum photolithographic feature dimension used in lithographically patterning the substrate. Photoresist is deposited over the features. Such is patterned to form photoresist blocks that are individually received between a respective pair of the features in the cross-section. Individual of the features of the respective pairs have a laterally innermost sidewall in the cross-section. Individual of the photoresist blocks have an opposing pair of first pattern edges in the cross-section that are spaced laterally inward of the laterally innermost sidewalls of the respective pair of the features.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: August 23, 2011
    Assignee: Micron Technology, Inc.
    Inventors: William R. Brown, David Kewley, Adam Olson
  • Patent number: 8004055
    Abstract: Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for distributing coolant, for guiding electromagnetic radiation, or for separation and/or characterization of materials. Some embodiments include constructions having micro-structures therein which correspond to voids, conduits, insulative structures, semiconductor structures or conductive structures.
    Type: Grant
    Filed: March 14, 2007
    Date of Patent: August 23, 2011
    Assignee: Micron Technology, Inc.
    Inventor: David H. Wells
  • Patent number: 8002102
    Abstract: A thermoformed article stack guiding apparatus is provided with a frame, a guide ramp and an array of juxtaposed article guide channels. The guide ramp receives and guides individual stacks of inter-nested articles exiting a female die of a thermoforming trim press from multiple rows and multiple levels. A first set of article guide channels is inter-nested with a second set of article guide channels in an alternating array. Each of the first set and the second set is spread out laterally in a direction from an entrance end of the guide ramp to an exit end of the guide ramp to accept respective stacks of inter-nested articles from an upper row and a lower row of a trim press and transfer the stacks into a common exit row. A method is also provided.
    Type: Grant
    Filed: October 23, 2007
    Date of Patent: August 23, 2011
    Inventor: Jere F. Irwin
  • Patent number: 8003526
    Abstract: A process for forming a local interconnect includes applying a layer of metal over a semiconductor layer. A layer of metal silicide is formed over the layer of metal. The layer of metal silicide is patterned to define the boundaries of the local interconnect. The metal silicide is reacted with the layer of metal to form a composite structure. The composite structure includes the metal silicide, another metal silicide formed as silicon from the metal silicide reacts with the underlying layer of metal and an intermetallic compound of the metal from the layer of metal and metal from the layer of metal silicide. The unreacted layer of metal is removed with the composite structure remaining as the local interconnect.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: August 23, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Jigish D. Trivedi
  • Patent number: 8003000
    Abstract: A plasma processing method includes providing a substrate in a processing chamber, the substrate having a surface, and generating a plasma in the processing chamber. The plasma provides at least two regions that exhibit different plasma densities. The method includes exposing at least some of the surface to both of the at least two regions. Exposing the surface to both of the at least two regions may include rotating the plasma and may cyclically expose the surface to the plasma density differences. Exposing to both of the at least two regions may modify a composition and/or structure of the surface. The plasma may include a plasmoid characterized by a steady state plasma wave providing multiple plasma density lobes uniformly distributed about an axis of symmetry and providing plasma between the lobes exhibiting lower plasma densities. Depositing the layer can include ALD and exposure may remove an ALD precursor ligand.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: August 23, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Neal R. Rueger
  • Patent number: 8003541
    Abstract: A method of etching a material that includes comprising germanium, antimony, and tellurium encompasses exposing said material to a plasma-enhanced etching chemistry comprising Cl2 and CH2F2. A method of forming a variable resistance memory cell includes forming a conductive inner electrode material over a substrate. A variable resistance chalcogenide material comprising germanium, antimony, and tellurium is formed over the conductive inner electrode material. A conductive outer electrode material is formed over the chalcogenide material. The germanium, antimony, and tellurium-comprising material is plasma etched using a chemistry comprising Cl2 and CH2F2.
    Type: Grant
    Filed: October 11, 2010
    Date of Patent: August 23, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Tuman Earl Allen
  • Patent number: 8002737
    Abstract: A syringe device having a syringe barrel and a syringe piston having a container housing. At least a portion of the container housing is insertable within an internal chamber of the syringe barrel. A fluid passageway extends from the container housing through a piston stem. A method of protecting a syringe handler including providing the components of a syringe device and encasing the components in a protective film. The protective film is loose to allow manipulation of the syringe components relative to one another without opening or puncturing the film. Protective syringe device packaging that includes a laminate film of material sealed to encase the components of a syringe device containing a potentially harmful agent.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: August 23, 2011
    Assignee: Hyprotek, Inc.
    Inventor: Patrick O. Tennican
  • Patent number: 7998813
    Abstract: Fabrication methods for gate transistors in integrated circuit devices enable the formation of recessed access device structures or FinFET structures having P-type workfunctions. The fabrication methods also provide for the formation of access transistor gates of an access device following formation of the periphery transistor gates. Access devices and systems including same are also disclosed.
    Type: Grant
    Filed: December 6, 2010
    Date of Patent: August 16, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Gordon A. Haller, Sanh D. Tang
  • Patent number: 7997629
    Abstract: A knot tying apparatus for tying a pair of fishing lines to one another is provided. The apparatus includes a tubular body having a through passage extending between opposite first and second ends with a slot extending from the first end toward the second end. Further, the apparatus has an actuator coupled to the tubular body for sliding movement between the first and second ends. The actuator is moveable between the first and second ends via application of an external force to removed loops of the one of the lines from the tubular body onto the other of the lines.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: August 16, 2011
    Assignee: Dr. Slick Company
    Inventor: Kenneth A. High
  • Patent number: 7999330
    Abstract: The invention includes methods of utilizing compositions containing iridium and tantalum in semiconductor constructions, and includes semiconductor constructions comprising compositions containing iridium and tantalum. The compositions containing iridium and tantalum can be utilized as barrier materials, and in some aspects can be utilized as barriers to copper diffusion.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: August 16, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Yongjun Jeff Hu