Patents Represented by Attorney William K. Bucher
  • Patent number: 5388172
    Abstract: An optical switching apparatus includes a housing having a base and sidewalls with an optical device disposed within the housing for directing optical energy between a first optical waveguides disposed within a first optical passageway formed in the sidewalls and second and third optical waveguides disposed within a second optical passageway formed in the sidewalls. Focusing means, such as collimating lenses, are mounted on the sidewall for focusing the optical energy into the optical waveguides. The optical waveguides are positioned at the focal plane of the respective lenses with the first and second optical waveguides being disposed on the optical axes of their respective collimating lenses. The optical device may be an acousto-optic switch for selectively directing optical energy into the optical passageways. The optical switching apparatus may be used in an optical time domain reflectometer for selectively blocking high amplitude Fresnel reflections from passing through the optical device.
    Type: Grant
    Filed: May 20, 1993
    Date of Patent: February 7, 1995
    Assignee: Tektroniz, Inc.
    Inventor: Duwayne R. Anderson
  • Patent number: 5373356
    Abstract: A controller (124) analyzes a set of OTDR return data stored in a memory (134) and determines if a particular event is an echo by comparing its measured location and/or amplitude (loss) with calculated locations (208) and amplitudes for various-order echoes. Possible echoes are optionally assigned an echo probability level (220, 224, 228) based on the degree to which their measured locations and/or amplitudes match the calculated echo locations and amplitudes. Possible echoes are appropriately marked (210) so that an OTDR display (136) indicates to a user which events are possible echoes. Optionally, events may be marked as having a low, medium, or high probability of being echoes.
    Type: Grant
    Filed: May 21, 1993
    Date of Patent: December 13, 1994
    Assignee: Tektronix, Inc.
    Inventor: Duwayne R. Anderson
  • Patent number: 5365328
    Abstract: A method for characterizing an event in acquired digital data is described where the event has a known shape and a pattern having amplitude and location coefficients is applied to the data for determining a best fit between the data and the pattern as a function of a peak RMS value. The derived RMS value is compared to a threshold value for verifying the existence of the event. The event is characterized as to amplitude and location using the amplitude and location coefficients of the pattern. Such a method is useful in characterizing non-reflective events in acquired optical time domain reflectometry data.
    Type: Grant
    Filed: May 21, 1993
    Date of Patent: November 15, 1994
    Assignee: Tektronix, Inc.
    Inventor: Duwayne R. Anderson
  • Patent number: 5225796
    Abstract: An improved coplanar transmission structure has a coplanar transmission line formed on one surface of a substrate and a lossy resistive material formed on the opposite surface of the substrate for suppressing spurious electromagnetic modes propagating through the substrate. The lossy resistive material may be nichrome or the like and is patterned on the substrate using thin or thick film processing.
    Type: Grant
    Filed: January 27, 1992
    Date of Patent: July 6, 1993
    Assignee: Tektronix, Inc.
    Inventors: Frank R. Williams, Thomas G. Ruttan
  • Patent number: 5223787
    Abstract: A high-speed, low-profile logic analyzer test probe has a body of insulating material molded directly onto a narrow elongate substrate having electrical circuitry disposed thereon. The molded insulating material has a notch formed therein for exposing a conductive surface formed on the substrate. The exposed conductive surface is used for making a ground connection between the substrate and the ground of a device under test. The probe may be adapted for use in probe holder for multichannel probing wherein the probe holder has an electrically conductive chip disposed within the probe holder housing for providing the shortest possible ground connections between the ground pins on the device under test and the ground connections on the probes.
    Type: Grant
    Filed: May 29, 1992
    Date of Patent: June 29, 1993
    Assignee: Tektronix, Inc.
    Inventors: Monty Smith, Garry P. Liddell, James E. Trimble, David G. Payne
  • Patent number: 5220274
    Abstract: An electrical switch usable in an electrical test probe has electrical contact pads formed on a substrate acting as fixed electrical switch contacts. A frame member is laterally disposed from the fixed electrical switch contacts. An actuator is disposed within the frame member having a movable switch pole contact extending from the actuator past the frame member for wipingly engaging the fixed electrical contacts on the substrate as the actuator is moved between first and second switch positions. For use in a switchable passive voltage probe, the electrical switch is formed on a circuit board that is disposed in an electrically conductive tubular body. Insulating material surrounds the fixed switch contacts on the circuit board to electrically isolate the contacts from the tubular body. The switch pole contact reaches into the electrically isolated region to perform the switching function.
    Type: Grant
    Filed: April 7, 1992
    Date of Patent: June 15, 1993
    Assignee: Tektronix, Inc.
    Inventors: Mark W. Nightingale, Jonathan E. Myers
  • Patent number: 5208846
    Abstract: A subscriber loop tester for testing local loops of telephone switching networks has a partitioned "U" interface and an internal bus architecture for converting various transceiver circuit output data formats to a common data format. The "U" interface has a high impedance transformer meeting bandwidth and line matching requirements for different line codes and protocols for ISDN telecommunication systems. The transformer is selectively coupled to option cards each containing circuitry having AC and DC terminations matching specific line codes and protocols for ISDN telecommunications systems and other types of telecommunications systems. The option cards further contain programmable attenuators for producing a proper nominal signal level as a function of the specific line code and protocol and providing variable insertion loss. A high speed bus is selectively coupled to the option cards for coupling the formatted transceiver circuit output data between the cards and a digital bus translator.
    Type: Grant
    Filed: September 3, 1991
    Date of Patent: May 4, 1993
    Assignee: Tektronix, Inc.
    Inventors: John A. Hammond, James W. Edwards, Andre Lubarsky, Jr.
  • Patent number: 5202622
    Abstract: A test fixture for a high pin count surface mounted IC device has a test head assembly connected to an adapter having electrically conductive elements that couple the output of the IC device to test points on the test head assembly. The test points are coupled to conductive pads on the test head assembly via conductive runs. The test head assembly conductive pads mate with conductive pad formed in the electrically conductive elements of the adapter. The conductive elements engage leads on the IC device providing conductive paths between the IC leads an the test points on the test head assembly. The test fixture is secured to the IC device by friction forces between the periphery of the IC device and the inner surface of the adapter. The test fixture or the adapter is usable as a low profile chip carrier by inverting the fixture or adapter and as a circuit board interconnect.
    Type: Grant
    Filed: June 24, 1991
    Date of Patent: April 13, 1993
    Assignee: Tektronix, Inc.
    Inventors: Paul A. Cole, Bozidar Janko, Richard G. Chambers, Wolfgang H. Herr, Douglas W. Trobough, Peter M. Compton
  • Patent number: 5185635
    Abstract: An input signal is sampled by alternately coupling the input signal and a reference level to a sample storage element, whereby the magnitude of the signal stored by the storage element immediately following application of the input signal to the storage element is a function of the input signal magnitude and the magnitude of the signal stored by the storage element immediately preceding coupling of the input signal to the storage element is a function of the reference level.
    Type: Grant
    Filed: July 29, 1991
    Date of Patent: February 9, 1993
    Assignee: Tektronix, Inc.
    Inventors: William A. Trent, Kevin B. McDonald, Florian G. Bell
  • Patent number: 5185874
    Abstract: An address generator that provides equivalent time sampling for a time domain reflectometer generates read and write addesses for simultaneous application to an aquisition memory over an address bus. For each iteration of a repetitive input signal an excitation pulse is delayed by an amount, dt, that is an integer submultiple of a sampling period, T. Read addresses for each iteration of the repetitive input signal start from an initial address and increment by T/dt for each data sample. Corresponding write addresses are generated from the read addresses one sample time later so that the address on the address bus has a read address that is one address ahead of the write address. The acquisition memory reads out data from the read address for accumulation with corresponding sampled data while accumulated data is being input to the write address.
    Type: Grant
    Filed: October 30, 1989
    Date of Patent: February 9, 1993
    Assignee: Tektronix, Inc.
    Inventors: William A. Trent, Mark Marineau
  • Patent number: 5184065
    Abstract: A twist lock probe tip has a flexible body of an insulative material with an electrical conductor embedded within the flexible body or coated on one side of a flat flexible body. The flexible body has a notch for exposing the embedded electrical conductor and/or for engaging a lead of an electrical component. The flexible body is inserted between the leads of the electrical component and twisted by means of an attached knob or wing lever so that the notches engage adjacent leads and the conductor contacts the desired lead.
    Type: Grant
    Filed: October 7, 1991
    Date of Patent: February 2, 1993
    Assignee: Tektronix, Inc.
    Inventor: Warren L. Chism
  • Patent number: 5166609
    Abstract: A test fixture for a high pin count surface mounted IC device has a test head assembly connected to an adapter having electrically conductive elements that couple the output of the IC device to test points on the test head assembly. The test points are coupled to conductive pads on the test head assembly via conductive runs. The test head assembly conductive pads mate with conductive pad formed in the electrically conductive elements of the adapter. The conductive elements engage leads on the IC device providing conductive paths between the IC leads an the test points on the test head assembly. The test fixture is secured to the IC device by friction forces between the periphery of the IC device and the inner surface of the adapter. The test fixture or the adapter is usable as a low profile chip carrier by inverting the fixture or adapter and as a circuit board interconnect.
    Type: Grant
    Filed: May 24, 1990
    Date of Patent: November 24, 1992
    Assignee: Tektronix, Inc.
    Inventors: Paul A. Cole, Bozidar Janko, Richard G. Chambers, Wolfgang H. Herr, Douglas W. Trobough, Peter M. Compton
  • Patent number: 5156649
    Abstract: An adapter for coupling electrical signal to and from an integrated circuit device mounted on a circuit board has a frame composed of individual side sections with each side section having ribs formed therein for providing detented cantilever engagement of the side sections to the sides of the IC device. Electrically conductive elements fit in between the ribs and engage the leads on the IC. The electrically conductive elements are connected to conductive pads formed on a substrate that is secured with the frame. A securing means that includes pins are used for securing the side sections together.
    Type: Grant
    Filed: November 27, 1991
    Date of Patent: October 20, 1992
    Assignee: Tektronix, Inc.
    Inventors: Peter M. Compton, Paul A. Cole
  • Patent number: 5155439
    Abstract: A method for examining a propagative medium, such as a signal transmission cable, that requires the acquisition and examination of a minimum number of data points to determine the presence of an anomaly in the medium. When an anomaly is detected, its characteristics, such as loation, type and amount of loss are determined. The characteristics are then displayed. If the anomaly is a reflectionless loss, the region containing the anomaly is examined repetitively to determine its location and to improve the accuracy of its location measurement. With each successive level of examination, additional samples are collected within the region. The new samples are combined with the existing samples to reduce random noise in the data. Through this method the location of the anomaly is re-determined with greater accuracy.
    Type: Grant
    Filed: December 12, 1989
    Date of Patent: October 13, 1992
    Assignee: Tektronix, Inc.
    Inventors: Dennis L. Holmbo, Wendelyn Gavett, Barry L. Rosenow, Michael S. Overton
  • Patent number: 5151775
    Abstract: An integrated circuit device having improved substrate capacitance isolation for use in a ultra low capacitance probe or an input to an oscilloscope or the like has an electrically conductive layer formed directly underneath an input node on the integrated circuit. The electrically conductive layer has a geometry substantially equal to the input node and is driven by a voltage output from a high impedance unity gain circuit. In one embodiment, the electrically conductive layer is formed in the first metal layer of the integrated circuit while an alternate embodiment an emitter region of a semiconductor device in the high impedance circuit is used as the electrically conductive layer.
    Type: Grant
    Filed: October 7, 1991
    Date of Patent: September 29, 1992
    Assignee: Tektronix, Inc.
    Inventor: Matthew J. Hadwin
  • Patent number: D334147
    Type: Grant
    Filed: June 13, 1990
    Date of Patent: March 23, 1993
    Assignee: Tektronix, Inc.
    Inventors: Glen Aukstikalnis, Mark Nightingale
  • Patent number: D344681
    Type: Grant
    Filed: April 7, 1992
    Date of Patent: March 1, 1994
    Assignee: Tektronix, Inc.
    Inventors: Mark W. Nightingale, Jonathan E. Myers
  • Patent number: D346122
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: April 19, 1994
    Assignee: Tektronix, Inc.
    Inventors: Mark W. Nightingale, Jonathan E. Myers
  • Patent number: D346338
    Type: Grant
    Filed: February 26, 1993
    Date of Patent: April 26, 1994
    Assignee: Tektronix, Inc.
    Inventors: Mark W. Nightingale, Jonathan E. Myers
  • Patent number: D354923
    Type: Grant
    Filed: January 31, 1994
    Date of Patent: January 31, 1995
    Assignee: Tektronix, Inc.
    Inventor: Mark W. Nightingale