Abstract: The present invention is directed to the creation of macroscopic materials and objects comprising aligned nanotube segments. The invention entails aligning single-wall carbon nanotube (SWNT) segments that are suspended in a fluid medium and then removing the aligned segments from suspension in a way that macroscopic, ordered assemblies of SWNT are formed. The invention is further directed to controlling the natural proclivity of nanotube segments to self assemble into ordered structures by modifying the environment of the nanotubes and the history of that environment prior to and during the process. The materials and objects are “macroscopic” in that they are large enough to be seen without the aid of a microscope or of the dimensions of such objects.

Abstract: A method and circuit for mitigating gate leakage during a sleep state. An input pattern may be applied to one or more of a plurality of devices in a circuit, e.g., static circuit, dynamic circuit, during a sleep state. In response to the application of the input pattern, a majority of the devices in the circuit may have a substantially identical voltage at each of its terminals, i.e., the source, gate and drain terminal, thereby mitigating gate leakage.

Abstract: An induction generator having one or more energy windings and one or more auxiliary windings where the auxiliary windings have fixed and switched capacitors which are used to control the induction generator output under variable load conditions. The auxiliary windings are electrically and magnetically isolated from the energy windings. The fixed capacitors are used under minimum load condition and the switched capacitors added in response to controls signals. The control signals are determined by analyzing the load voltage and current and the voltage across the particular capacitor being added. The induction generator is included in systems where the generator is rotationally driven by an engine and which couples the energy windings to a power grid and/or to a variable load. The engine may also employ a controller that receives the load current and voltage signals to determine engine speed.

Abstract: A method and apparatus for reducing power dissipation within a functional unit of a microprocessor includes a power sensing circuit for sensing power dissipation of the functional unit. A low power mode identifying circuit identifies when the measured power dissipation of the functional unit exceeds a predetermined amount or value. Upon such a condition, a low power mode circuit operates the functional unit in a low power mode thereby reducing its power dissipation. Operation of the functional unit in the low power mode continues until the power dissipation reaches a safe level. The functional unit internally determines power dissipation and selectively enters a low power mode to reduce power dissipation of the functional unit. Low power mode operation of the functional unit reduces power dissipation of the functional unit.

Abstract: A transparent emissive display is created using a transparent anode and a transparent cathode so that images can be viewed from both sides of the field emission display panel. When the phosphor material emits the image, it can pass through the field emission material, if such a material is effectively made transparent by the manner in which it is deposited. The cathode conducting layer and the cathode substrate are thus also made transparent. Alternatively, multiple displays can be stacked together.

Abstract: Clock generation circuitry 1300 includes an oscillator 1302 for generating a first signal from a crystal 1301 of a selected oscillating frequency. A first frequency multiplier 1304 selectively multiplies the frequency of the first signal by a predetermined factor to obtain a second signal having a frequency of a preselected multiple of a first set of clock signals. A divider 1305 selectively divides the frequency of the second signal by a second factor to obtain a third signal of a selected frequency.

Abstract: A system and method for synthesizing nanopowder which provides for precursor material ablation from two opposing electrodes that are substantially axially aligned and spaced apart within a gaseous atmosphere, where a plasma is created by a high power pulsed electrical discharge between the electrodes, such pulse being of short duration to inertially confine the plasma, thereby creating a high temperature and high density plasma having high quench and/or reaction rates with the gaseous atmosphere for improved nanopowder synthesis.

Abstract: A method and system for attached processing units accessing a shared memory in an SMP system. In one embodiment, a system comprises a shared memory. The system further comprises a plurality of processing elements coupled to the shared memory. Each of the plurality of processing elements comprises a processing unit, a direct memory access controller and a plurality of attached processing units. Each direct memory access controller comprises an address translation mechanism thereby enabling each associated attached processing unit to access the shared memory in a restricted manner without an address translation mechanism. Each attached processing unit is configured to issue a request to an associated direct memory access controller to access the shared memory specifying a range of addresses to be accessed as virtual addresses. The associated direct memory access controller is configured to translate the range of virtual addresses into an associated range of physical addresses.

Abstract: The present invention relates to dynamic configuration of Telnet 3270 Clients and more particularly to a method and system for optimizing selection of a Server according to some response time and availability criteria. The invention rests on an Intermediate Selection Application mechanism using Availability and Response Time Probes. The present invention comprises the steps of retrieving known SNA Application Welcome Screens from SNA Applications through each server, measuring associated response times, and detecting failures and degradation of response time. The present invention uses a CGI (Common Gateway Interface) program for dynamically creating a Selection Screen (a web page in HTML code in one embodiment) on an Intermediate Selection Application.

Abstract: A method, computer program product and system for monitoring and locating an object using secure communications without relying on GPS. A monitoring device may activate a monitored unit (unit monitored by monitoring device) by transmitting a seed of an algorithm and a time synchronization to the monitored unit. The seed and time synchronization may be used in conjunction with an algorithm, e.g., frequency hopping table, stored in both the monitoring device and the monitored unit, to allow both the monitoring device and the monitored unit to communicate with one another at a uniquely synchronized time and frequency thereby making it more difficult for a third party to locate the monitored unit. An alert may be generated when the monitored unit is located beyond a predetermined zone. The monitored unit may be located by activating a directional antenna in conjunction with a digital compass on the monitoring device.

Abstract: A method and system for performing failure analysis on a silicon on insulator (SOI) semiconductor device is disclosed. The SOI device includes a plurality of conductive structures in a silicon region. The silicon resides on a box insulator, which resides on a silicon substrate. The method and system include providing a cross-section of the SOI semiconductor device. The cross-section of the SOI semiconductor device includes a portion of the plurality of conductive structures. The method and system also include staining the cross-section of the SOI semiconductor device using a stain. The stain etches the silicon region in the SOI semiconductor device without etching a remaining portion of the SOI semiconductor device not composed of silicon.

Abstract: Aspects for revealing active regions of a silicon-on-insulator (SOI) circuit for inspection from a backside of a DUT are described. The aspects include etching a substrate layer of an SOI circuit and removing a buried oxide layer beneath the substrate layer. From these steps, active regions beneath the buried oxide layer are revealed.

Abstract: An apparatus and method by which repeaters are able to temporarily or permanently store data in a local repository called a depot. Two uses for the depots are checkpoint restart functionality and the ability to store commonly installed software distributions on nodes closer to their destinations. Large software programs such as Office 95™ can be stored on local repeaters for fast and efficient distribution. A particular distribution can be stored in more than one depot. Depots will provide an interface to allow administrators to list the contents of a depot, store new distributions and delete old distributions. Data may be added to a depot by either an explicit administrator command or by retaining data sent as part of a distribution. Applications can decide what data is appropriate for depoting, and mark those distribution segments as “storable”.

Abstract: A method and systems for projecting an image onto a screen in high ambient light. The image is composed as pixels comprising selected intensities of preselected bands of visible light. The pixels are created by modulating three frequencies of light corresponding to hues in the red, green, and blue spectrum. The modulated light selectively generates pixels of a frame of the image. A diffusive projection screen has a triple bandpass light filter surface that selectively transmits preselected bands of light frequencies around the red, green, and blue spectrums of the modulated light source. The triple bandpass light filter is used with projection screens in front and rear projection systems. The hues of red, green, and blue may be generated from LEDs or from extracting the frequencies from a broadband source. The modulator system may comprise a time multiplexed single modulator design or a triple modulator design.

Abstract: A system for minimizing the length of the longest diagonal interconnection. A multiple chip module may comprise a first chip connected to a second chip located diagonally to the first chip. The first and second chip are interconnected by one or more interconnections commonly referred to as diagonal interconnections. Since the one or more diagonal interconnections between the first chip and the second chip are interconnected between a set of pins on each chip that form a triangular pattern, the longest diagonal interconnection is substantially the same length as the length of the longest orthogonal interconnection. Furthermore, since the one or more diagonal interconnections between the first chip and the second chip are interconnected between a set of pins on each chip that form a triangular pattern, the longest diagonal interconnection is substantially the same length as the length of the second longest diagonal interconnection.

Abstract: A system and method for removing a conductive line from a semiconductor device is disclosed. The conductive line includes a conductive layer and a barrier layer separating the conductive layer from a portion of the semiconductor device. The method and system include exposing a portion of the barrier layer, etching the barrier layer after the barrier layer has been exposed, and lifting off the conductive layer after the barrier layer has been etched.

Abstract: A method, system and computer program product for extracting parasitic resistance and capacitance values to simulate performance of an integrated circuit. A selected number of interconnections in an integrated circuit may be identified (“interconnections of interest”). A netlist containing a list of the transistors in the integrated circuit may be pruned by selecting those transistors in the netlist that are in the channel connected regions on the driving side of the interconnections of interest and those on the receiving side of the interconnections of interest. Parasitic resistance and capacitance values for layout layers connected to the interconnections of interest may be extracted. These extracted parasitic resistance and capacitance values may be associated with the transistors connected to those layout layers in the pruned netlist.

Abstract: In a system where a path history vector is used in conjunction with a branch history table, an algorithm is disclosed for reducing the number of bits required for a path history vector. The path history vector is used to address a branch history table. Since the path history vector may contain a large number of zeros, this may lead to branch predictions that are inaccurate because of the limited size of the path history vector and the corresponding branch history table. A compression algorithm is disclosed where zeros in the path history vector are compressed. The number of zeros greater than one but less than a maximum are compressed in a single zero. With a compressed path history vector, inner loops with larger iterations or loops with larger instructions or branches are predicable with greater accuracy.

Abstract: A system and method of cleaning a gas of undesired particulate, aromas, and gases of the type utilizing a centrifuge with various combinations and apparatus used to liquid wet a gas stream is provided. The gas scrubber of the present invention includes a container for containing a liquid having a surface forming a space between said surface and the container top; a motor having a rotatable vertically mounted shaft mounted above said top with said shaft connected to and rotatable with a centrifuge cylinder having an inlet positioned outside of said container and having an outlet positioned in said space. Said cylinder contains fan blades to draw gas from said cylinder inlet and out said cylinder outlet. A vertically mounted rotatable siphon pipe, connected to said shaft, that has an inlet positioned below said surface and an outlet positioned proximate said centrifuge inlet to draw liquid up and out to the centrifuge inlet and flow down the centrifuge wall to clean the wall and mix with said gas.

Abstract: A field emission cathode device consisting of an electrically conducting material and with a narrow, rod-shaped geometry or a knife edge, to achieve a high amplification of the electric field strength is characterized in that the electron-emitting part of the field emission cathode at least partly has preferred cylindrical host molecules and/or compounds with host compounds and/or cylindrical atomic networks, possibly with end caps with diameters measuring in the nanometer range.