Patents Assigned to Adtran
  • Clip-based fastening arrangement for attaching multi-pin connector to rear panel of electronic equipment chassis
    Patent number: 7476126
    Abstract: A clip is attachable to a flange of a connector terminating an electrical cable, and is configured to mechanically couple one side of the flange to an edge of a connector-installation aperture of a chassis, such that a distal end of the connector may engage a receptacle within the chassis. When the connector, with the clip attached, is placed in the chassis' connector-installation aperture, a notch region of the clip engages the chassis at an edge of its connector-installation aperture, causing a bore on a second side of the flange to be coaxial with a bore in the chassis, so that a hardware fitting therethrough may secure the connector to the chassis.
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: January 13, 2009
    Assignee: Adtran, Inc.
    Inventor: Scott L. Carden
  • Policing engine providing dynamic adjustment of peak and sustained data cell rates and efficient transfer of AAL5 cells
    Patent number: 7477596
    Abstract: A policing engine for use in a telecommunication equipment shelf is operative to control the rate at which customer-sourced ATM packets are passed to buffers associated with different classes of service to which customers may subscribe. The policing engine examines the rate at which ATM cells are supplied to it from the line card ports, whether the cells are AAL5 cells, and how full are the buffers into which the cells are to be written. If cells are supplied to the policing engine at a rate faster than prescribed peak or sustained cell rates, or if the cell buffer begins to fill up, the policing engine controllably discards incoming cells, thereby effectively ‘throttling’ the cell flow rate through it.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: January 13, 2009
    Assignee: Adtran, Inc.
    Inventors: Richard A. Burch, Neil M. Jensen, Dennis B. McMahan, Timothy David Rochell
  • System and method for controlling transceivers based on a location indicator
    Patent number: 7471931
    Abstract: A system for controlling transceivers based on a location of the transceivers, as indicated by a location indicator, helps to reduce crosstalk interference in signals transmitted from central offices. The system utilizes a location indicator and logic. The location indicator is communicatively coupled to each of a plurality of transceivers and is indicative of whether the plurality of transceivers are located at an intermediate terminal or a central office. The logic is configured to control a physical layer of each of the transceivers based on the location indicator.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: December 30, 2008
    Assignee: ADTRAN, Inc.
    Inventor: Arlynn Wilson
  • System and method for detecting anomalies along telecommunication lines
    Patent number: 7460498
    Abstract: An anomaly detection system comprises an echo canceler and anomaly detection logic. The echo canceler has a plurality of taps respectively associated with a plurality of tap coefficients. The anomaly detection logic is configured to determine a difference between a new tap coefficient associated with one of the taps and a previous tap coefficient associated with the one tap. The anomaly detection logic is configured to perform a comparison between the difference and a threshold and to detect an anomaly along a telecommunication line based on the comparison.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: December 2, 2008
    Assignee: ADTRAN, Inc.
    Inventors: Gary Hunt, Fred Chu, Lee T. Gusler, Jr.
  • System and method for protecting communication between a central office and a remote premises
    Patent number: 7457234
    Abstract: A data communication system for communicating between a central office and a remote premises comprises a first transceiver, a second transceiver, and control logic. The first transceiver is coupled to a first communication connection extending from the central office to the remote premises and is configured to communicate with a central office transceiver. The second transceiver is coupled to a second communication connection extending from the central office to the remote premises. The control logic resides at the remote premises and is configured to detect an error condition associated with communication between the first transceiver and the transceiver located at the central office.
    Type: Grant
    Filed: March 1, 2004
    Date of Patent: November 25, 2008
    Assignee: Adtran, Inc.
    Inventors: John B. Bartell, Dean D. Bekken, II, Mark J. Ogden
  • System architecture for linking channel banks of a data communication system
    Patent number: 7433365
    Abstract: A single switch fabric-based, multi-channel bank digital subscriber line access multiplexer includes a master channel bank containing a master switch module in which the switch fabric and a downstream-directed traffic scheduler reside, and one or more expansion channel banks that are linked with the master channel bank by way of upstream and downstream communication links. Distributed among the channel banks are respective policing mechanisms and cell rate control mechanisms that control upstream-directed communications from line card ports of each expansion channel bank to the switch fabric. Downstream data transmissions are locked to network timing, and are scheduled by a centralized scheduling mechanism resident in the master channel bank.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: October 7, 2008
    Assignee: Adtran, Inc.
    Inventors: Richard A. Burch, Neil M. Jensen, Dennis B. McMahan, Timothy David Rochell, Robert James Toth
  • Transformer interface for preventing EMI-based current imbalances from falsely triggering ground fault interrupt
    Patent number: 7375940
    Abstract: A transformer interface prevents a false ground fault interrupt in a power supply arrangement. The power supply arrangement has a line wire and a neutral wire connected by way of a ground fault interrupt circuit to an electrically powered device, to which a ground wire is also coupled. The interface has current imbalance sensor transformer windings coupled to the line and neutral wires. A ground wire current sensor transformer winding is coupled to the ground wire. A detector transformer winding produces a signal that triggers operation of the ground fault interrupt circuit, in response to the difference between currents produced by the current imbalance sensor transformer windings exceeding detected ground wire current by a prescribed value.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: May 20, 2008
    Assignee: Adtran, Inc.
    Inventor: Jeffrey John Bertrand
  • Dual-PHY based integrated access device
    Patent number: 7366179
    Abstract: A dual PHY-based integrated access device (IAD) platform employs a highly integrated time division multiplexed (TDM), a synchronous transfer mode (ATM) cell based architecture, to provide enhanced interfacing flexibility for multiple and diverse signaling protocols, effectively reducing the cost and constraints as to choice of host processor used in conventional digital signal processor (DSP)-based IADs. With the signaling transport speed of the dual PHY based path being an order of magnitude greater than that of any of the plurality of communication paths with which the IAD is interfaced, the IAD of the invention provides effectively real time support for different communication requirements, including TDM, ATM, HDLC, and the like.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: April 29, 2008
    Assignee: Adtran, Inc.
    Inventors: Paul Graves McElroy, Phillip Stone Herron, Bruce Edward Mitchell, Darrin Leroy Gieger
  • Full duplex voice path capture buffer with time stamp
    Patent number: 7366161
    Abstract: For diagnostic and trouble-shooting purposes, an audio/voice signal capture mechanism is adapted to be interfaced with a time division multiplexed (TDM) transport path-cascaded echo canceler and compression arrangement for an integrated access device (IAD). The audio/voice signal capture mechanism captures a ‘snapshot’ of the audio/voice signals by storing a prescribed number of seconds of audio/voice path signals transmitted in both directions through the IAD, and time stamping the captured audio/voice signals and associated signaling events of interest. In this way, the invention operates as a ‘virtual’ oscilloscope, as it is able to capture pertinent data for any voice call problem along with an associated time stamp event log.
    Type: Grant
    Filed: January 6, 2003
    Date of Patent: April 29, 2008
    Assignee: Adtran, Inc.
    Inventors: Bruce E. Mitchell, Christopher A. Otto
  • System and method for remotely updating a network device
    Patent number: 7349327
    Abstract: A router in one embodiment of the present disclosure has first router logic and boot logic. The first router logic is configured to operate the router, and the boot logic is configured to receive updated router logic from a network and to perform a first reboot. The boot logic is further configured to initialize deactivation of the first router logic and initialize activation of the updated router logic during the first reboot such that a plurality of functions for the router are enabled during execution of the updated router logic. The boot logic is also configured to perform, in response to an error during execution of the updated router logic, a second reboot such that at least one of the functions is disabled.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: March 25, 2008
    Assignee: ADTRAN, Inc.
    Inventors: Roberto Puon, David Glenn Perkinson
  • Method and system for preserving channel bank provisioning information when unit location changes within multi-shelf equipment rack
    Patent number: 7349420
    Abstract: An inter-channel bank addressing and identification protocol, for use with a multi channel bank, digital subscriber line access multiplexer (DSLAM), enables the control processor of a master channel bank to selectively communicate with control processors of subtended slave channel banks, and allows a subtended slave shelf to retain provisioning information, irrespective of a change in shelf location or removal of a subtended slave shelf between the master shelf and another subtended slave shelf. The inter-channel bank addressing and identification protocol uses a shelf address code that is controllably incremented or decremented during the transport of a packet between the master and a slave shelf. In addition, a shelf address code is assigned each slave shelf during initialization. These two codes enable the master to track which channel bank is in which shelf bay.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: March 25, 2008
    Assignee: Adtran, Inc.
    Inventors: Robert James Toth, Neil M. Jensen, Dennis B. McMahan, Timothy David Rochell
  • T1 radio having coding gain adjustable for number of channels
    Patent number: 7305042
    Abstract: A communication system for transmitting (T1) digital communication signals between a transmit site and a receiver site includes an M:1 multiplexer, coupled to a rate 1/N convolutional encoder, which is operative to output an encoded output signal modulated in quaternary phase shift keyed (QPSK) space having a prescribed symbol rate. The receive site has a rate 1/N Viterbi decoder which is operative to decode the encoded output signal output by the rate 1/N convolutional encoder, and a 1:M demultiplexer having an input coupled to the Viterbi decoder and M plurality of outputs, and being operative to demultiplex the decoded signal from the Viterbi decoder into a plurality of M time division multiplexed digital communication signals. For any selected values for of M and N, the product of M and N is constant.
    Type: Grant
    Filed: May 5, 2004
    Date of Patent: December 4, 2007
    Assignee: Adtran, Inc.
    Inventors: Timothy G. Mester, Matthew A. Kliesner
  • Method of detecting remote ground condition
    Patent number: 7302047
    Abstract: Whether or not protection circuitry for a span-powered remote digital subscriber loop unit is properly connected to earth ground is determined by the deliberate assertion and detection of a ground fault from a central office line card location. The span-powered remote unit is augmented to place a controllable conduction path in circuit with the span-powered loop and an earth ground pin. If the earth ground pin has been properly connected to earth ground, applying the conductive path will place a ground fault on the span, which is detected by a ground fault detector within the central office line card. If the ground fault detector does not detect a ground fault in response to the application of the conductive path, the line card forwards a negative ground fault event message to a test center, so that a service technician may be dispatched to the remote unit to correct the problem.
    Type: Grant
    Filed: December 8, 2005
    Date of Patent: November 27, 2007
    Assignee: Adtran, Inc.
    Inventors: Bradley Dwayne Tidwell, Steven M. Robinson, James Michael Hawkins
  • Voice playout buffer for dual-PHY based integrated access device
    Patent number: 7289532
    Abstract: A voice playout buffer for a dual PHY-based integrated access device platform has a plurality of voice signal buffer sections. A respective buffer section has a capacity in excess of the number of digitized voice signal bytes contained in a respective cell-based communication signal. The storage capacity of a buffer section accommodates a communications control processor writing new outgoing digitized voice signal bytes into the first portion of the voice signal buffer section for transport over a TDM communication link, prior to digitized voice signals newly received from the TDM communication link being written into the first portion of the voice signal buffer section.
    Type: Grant
    Filed: May 19, 2003
    Date of Patent: October 30, 2007
    Assignee: Adtran, Inc.
    Inventors: Darrin L. Gieger, Phillip Stone Herron, Dennis B. McMahan
  • Path engine for optical network
    Patent number: 7289448
    Abstract: A method and system for selecting ring paths in service provisioning on optical networks including a plurality of interconnected rings. The method includes: receiving a request to provision a service between a first end point and a second end point in the optical network; identifying a plurality of possible ring paths between the first and second end points; validating a bandwidth of each ring path, including validating bandwidths of bandwidth bottlenecks in each ring path; selecting a path from the validated ring paths; and provisioning the service on the selected path. The system utilizes a path engine on a network management server that knows about the bandwidth allocation in the entire network and implements the method. The resources of the optical network used by the provisioned service is thus minimized.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: October 30, 2007
    Assignee: Adtran, Inc.
    Inventors: Hasnain Rashid, Masood Ahmad, Paddy Vishnubhatt, Phyllis Yip, Jason C. Fan, Peter G. Jones, Saravanan R. Coimbatore
  • Programmable network-DTE interface containing selectively enabled T1/E1 framed, data pump and microprocessor
    Patent number: 7283514
    Abstract: A programmable network-DTE interface integrates T1/E1 framer, data pump and microprocessor components into a common subsystem chip architecture, and interfaces each of these components by means of a user programmable multiplexing subsystem, so as to allow any of the functional blocks of the architecture to be selectively enabled or disabled/by-passed by the user.
    Type: Grant
    Filed: January 8, 2003
    Date of Patent: October 16, 2007
    Assignee: Adtran, Inc.
    Inventors: Charles David Capps, Clarke Edgar Moore, Dwight Edwin Wright
  • Adaptive frequency duplexing system and method
    Patent number: 7266092
    Abstract: A communication system and method adaptively control frequency ranges of a pair of interconnected transceivers in an effort to enhance the data rate in one direction. In this regard, a full duplex communication session is established between a first transceiver and a second transceiver. Signals having frequencies within an overlapping bandwidth are communicated between the first and second transceivers during a data phase. A transmission capacity of one of the transceivers is determined based on the communicated signals, and a comparison between this transmission capacity and a specified transmission capacity for the one transceiver is performed. A portion of the overlapping bandwidth is adaptively selected based on the comparison, and the one transceiver is prevented from transmitting signals having frequencies within the selected portion of the bandwidth during the data phase.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: September 4, 2007
    Assignee: Adtran, Inc.
    Inventors: Kevin W. Schneider, Arlynn W. Wilson
  • Circuit and method for controlling quiescent current of an amplifier
    Patent number: 7262664
    Abstract: Typical amplifier circuits used to implement various type of power amplifiers, including line drivers, are capable of supplying high output currents while maintaining a low standby current. Variation in the manufacturing process, however, can lead to large variations in quiescent current of the amplifier. In particular, transistor mismatch and input offset voltage can cause the quiescent current to be very inconsistent from chip to chip. An amplifier in accordance with the present disclosure uses a transconductance amplifier to stabilize the quiescent current. The transconductance amplifier reduces the gain of the amplifier's input stage for very small signals such as the input offset voltage. The transconductance amplifier saturates for input signals larger than the expected offset voltage, allowing the normal high gain of the input stage to amplify the signal without significant gain reduction.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: August 28, 2007
    Assignee: Adtran, Inc.
    Inventors: Daniel M. Joffe, Paul Calvin Ferguson
  • Data buffer-controlled digital clock regenerator
    Patent number: 7212598
    Abstract: A clock regeneration scheme for a digital communication receiver has a first-in, first-out (FIFO) storage buffer into which received data is clocked in accordance with an input clock signal and a data valid signal. A fixed fractional delay line is coupled to provide respectively different phase delayed versions of the input clock signal and feeds a multiplexer that is controllably operative to couple one of the outputs of the fixed fractional delay line to a regenerated clock output port. A control loop, which includes the FIFO storage buffer, the output port and a steering control input of the multiplexer circuit, is operative to selectively change which output of the fixed fractional delay line is coupled by the multiplexer to the output port, so as to controllably cause the output clock signal to track the effective frequency of the valid data signal.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: May 1, 2007
    Assignee: Adtran, Inc.
    Inventors: Matthew A. Kliesner, Timothy G. Mester, Eric M. Rives
  • IP phone
    Patent number: D577706
    Type: Grant
    Filed: January 4, 2007
    Date of Patent: September 30, 2008
    Assignee: Adtran, Inc.
    Inventors: Christopher Scott Andrews, R. Randall Belk, James Brian Coker