Patents Assigned to Adtran
  • Patent number: 6937095
    Abstract: The invention provides a switched linear amplifier for amplifying an input signal for provision to a communication medium. The switched linear amplifier includes a linear amplifier, an output current detector, and a switched inductive circuit. The linear amplifier amplifies the input signal to produce a linearly amplified signal. The output current detector is operative to detect an output current level having a magnitude greater than a predetermined threshold and provide a control signal. The switched inductive circuit is responsive to the control signal from the output current detector to provide an output current via a switched (and ideally lossless) inductive path, to provide a highly efficient means of generating a linearly amplified signal for provision to the communication medium.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: August 30, 2005
    Assignee: ADTRAN, Inc.
    Inventor: Daniel M. Joffe
  • Patent number: 6934345
    Abstract: An apparatus, method and system are provided for correlated noise reduction, in a trellis decoding environment, such as second generation HDSL, in which crosstalk impairments may be significant. The preferred embodiments provide equalization and correlated noise reduction, utilizing a training period to generate corresponding coefficients, and utilizing two different training error signals. In addition, the apparatus method and system also provide continued and adaptive correlated noise reduction during data transmission, utilizing two additional error signals, a trellis error signal and a tentative error signal. The trellis error signal is a decision error of a selected previous state of a selected trellis path, in which the selected trellis path has a smallest cumulative error of a plurality of trellis paths, and the selected previous state is preferably the immediately previous state.
    Type: Grant
    Filed: January 17, 2001
    Date of Patent: August 23, 2005
    Assignee: ADTRAN, Inc.
    Inventors: Fred Chu, Kevin W. Schneider
  • Patent number: 6928071
    Abstract: A communication control mechanism installable in the communications controller of an ISDN terminal adapter is operative to conduct in-band communications with its digital terminal device during an internet communication session between the digital terminal device and a digital communication network interface of an internet service provider. The terminal adapter monitors the data link establishment communication exchange between the network access server and the personal computer, to identify and capture internet protocol addresses for the digital terminal device and the network access interface. These addresses are then used by the terminal adapter to communicate in-band with the digital terminal device using user datagram protocol (UDP)-based messages.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: August 9, 2005
    Assignee: Adtran, Inc.
    Inventors: Kyle A. Farnsworth, C. Brian Goodwin, Lin Yow-Chern Chang
  • Patent number: 6927954
    Abstract: A ground fault current-limiting circuit for limiting telecommunication wireline voltage and ground fault current to prescribed safety parameters has a ground fault current sense resistor and associated line voltage control circuit installed in a ground-coupling link to the center tap of the output winding of a bipolar voltage converter's output transformer. The control circuit compares ground fault current of either polarity flowing through the sense resistor to a prescribed value. In response to this current limit being exceeded, the control circuit produces an output signal that causes the power source to reduce its output voltage so that the ground fault current will drop to within acceptable limits.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: August 9, 2005
    Assignee: Adtran, Inc.
    Inventors: Ralph R. Boudreaux, Jr., John S. McGary, Steven M. Robinson
  • Patent number: 6924566
    Abstract: A electrical power control mechanism ensures start-up of all telecommunication devices (repeaters and a remote terminal) along a span-powered wireline. Input voltage start-up thresholds of power control circuits at the devices are higher than the steady-state voltage across the repeater closest to the span supply, when the span voltage is at a minimum DC wireline voltage that sustains operation of all devices. The maximum input voltage start-up threshold of a device is less than the maximum voltage that could be applied during start-up, and the remote terminal has an input voltage start-up threshold value higher than that of any repeater. The maximum standby current of each device is specified, and input power is limited to its steady state maximum during start-up.
    Type: Grant
    Filed: August 6, 2002
    Date of Patent: August 2, 2005
    Assignee: Adtran, Inc.
    Inventors: Steven M. Robinson, Ralph R. Boudreaux, Jr., John S. McGary
  • Publication number: 20050165991
    Abstract: A test apparatus for telecommunication equipment includes motherboard that executes a resident operation control mechanism, so that the test apparatus exhibits default hardware functionality. However, if a daughtercard has been plugged into the motherboard, the motherboard ignores the default firmware and executes whatever replacement operation control software is provided on the daughtercard—causing the test apparatus to acquire a hardware functionality exclusive of the motherboard default.
    Type: Application
    Filed: January 23, 2004
    Publication date: July 28, 2005
    Applicant: ADTRAN, INC.
    Inventors: Robert Appleton, Patrick Grant, David Etzkorn
  • Publication number: 20050166002
    Abstract: An electronic signal processing apparatus contains a security key memory. Unless the security key memory contains a prescribed security key, a user is unable to operate the electronic signal processing apparatus. An intrusion detection and protection mechanism prevents access to the security key in the event of a compromise in the integrity of a housing for the security key memory. For this purpose, an intrusion detection circuit is adapted to monitor the integrity of the housing. A memory contents modification circuit is operative, in response to the intrusion detection circuit detecting a compromise in the integrity of the housing (opening of the housing), to modify (e.g., scramble) the contents of the security key memory and thereby effectively remove the security key from the security key memory.
    Type: Application
    Filed: January 26, 2004
    Publication date: July 28, 2005
    Applicant: ADTRAN, INC.
    Inventors: David Wallace, Jones Allison, Jason Bridges
  • Publication number: 20050163308
    Abstract: A method and apparatus detects a ground fault on a span-powered telecommunication wireline within a plurality of span-powered wireline segments, to respective ones of which DSL-Cs are coupled, so that a ground fault may be detected when power is delivered by the DSL-C over a respective wireline segment to a respective downstream functional RT. A respective DSL-C measures a first voltage across a first sense resistor representative of current flowing in a first portion of its wireline segment to the RT, and also measures a second voltage across a second sense resistor representative of current flowing in a second portion of the wireline segment from the RT. In response to a difference in the first and second voltages an output representative of a ground fault in that wireline segment is generated.
    Type: Application
    Filed: January 20, 2004
    Publication date: July 28, 2005
    Applicant: ADTRAN, INC.
    Inventors: Scott Smith, Steven Robinson
  • Publication number: 20050162096
    Abstract: A current-regulating driver circuit for a light emitting diode (LED) maintains energization drive to and thereby illumination provided by the LED at a prescribed, substantially constant value, over a relatively wide range of input (AC or DC) voltage. First and second input nodes are coupled to a source of AC or DC voltage and to a load, powered by the source of AC or DC voltage. An input rectifying diode is coupled to the first input node. A controlled current flow element is coupled in a first current flow path between the input rectifying diode and the LED and is controllably operative to supply current for illuminating the LED.
    Type: Application
    Filed: January 23, 2004
    Publication date: July 28, 2005
    Applicant: ADTRAN, INC.
    Inventor: Jeffrey Bertrand
  • Patent number: 6917681
    Abstract: A power management circuit for a remote access platform extracts power from a wireline for powering a ring generator that generates a ringing voltage signal that is distributed to a plurality of subscriber circuits. A power-limited voltage converter steps up the wireline voltage to a higher ‘isolating’ voltage, charging a capacitor coupled to the ring generator. A monitor circuit reduces the power that the power-limited voltage converter can draw, if the wireline voltage drops too low. This prevents the wireline voltage from collapsing should the remote terminal be deployed at a distance from wireline voltage source (the central office) greater than its specified capability.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: July 12, 2005
    Assignee: Adtran, Inc.
    Inventors: Steven M. Robinson, Ralph R. Boudreaux, Jr., John S. McGary, John B. Wilkes, Jr.
  • Patent number: 6907267
    Abstract: A loop-powered T1 digital radio is coupled to a powered T1 wireline. The radio not only interfaces digital T1 communication signals with the line, but is configured to extract and convert electrical power from the line to voltages necessary for operating the radio. The loop-powered T1 radio transmits and receives RF energy containing the T1 digital communication signals with respect to a remote digital radio, such as a ‘blue tooth’ type radio.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: June 14, 2005
    Assignee: Adtran, Inc.
    Inventors: Eric Malcolm Rives, David Hoy Nabors
  • Publication number: 20050110349
    Abstract: A dual solid state switch architecture has a plurality of control/monitor ports, selected ones of which are used to-control the operation of a pair of power MOSFETs current flow paths through which are coupled to prescribed ones of a plurality of input/output ports that are adapted to be coupled to a circuit path containing a load and either and AC or DC power source therefor. Selected others of the control/monitor ports are used to monitor current delivered to the load. A leakage current by-pass resistor is connected between selected input/output ports, to which a neon tube may be connected for indicating the switching on of an AC source. This resistor serves to provide a bypass path for leakage current through the MOSFETs, so as to prevent the neon tube from being erroneously illuminated, when the MOSFETs have been turned off.
    Type: Application
    Filed: November 24, 2003
    Publication date: May 26, 2005
    Applicants: ADTRAN, INC.
    Inventor: Jeffrey Bertrand
  • Patent number: 6898203
    Abstract: A buffer delay control mechanism controls the operation of a packet buffer of a digitized packet-based transmission network. The packet buffer receives packets from the network and controllably reads out packets for application to a digitized packet signal processor. A nominal buffer delay is maintained in the absence of an increase in delay in receipt of packets from the network. In response to an increase in network delay, the buffer delay is increased, and thereafter maintained at the increased value in the absence of a further increase in delay in receipt of packets from the network. For any further increase in throughput delay, the buffer delay is again updated, so as to maintain the value of buffer delay at a value associated with maximum encountered transport delay through the network.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: May 24, 2005
    Assignee: Adtran, Inc.
    Inventor: R. Randall Belk
  • Patent number: 6889035
    Abstract: An RF cable-less interconnect arrangement couples a diplexer to a radio transceiver by providing each of the transceiver and the diplexer by means of respective pairs of RF transmission and receiver channel connectors. The two sets of connectors are supported at a prescribed spatial separation for blind-mating RF connectivity for either of two orientations and translation (insertion) of the diplexer into the radio. Eliminating lossy and relatively fragile RF cable, that would otherwise occupy space within the radio's housing, and require installation by a skilled technician during assembly of the radio, allows the customer to easily change the radio's frequency plan by simply removing, rotating and reinserting the diplexer.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: May 3, 2005
    Assignee: Adtran, Inc.
    Inventor: Joseph L. Harris
  • Patent number: 6888896
    Abstract: A method and apparatus for reducing signal distortion in a high speed data communications system caused by a flux imbalance in a system coupling transformer. The signal distortion is monitored by a combination echo canceller circuit connected to the equipment side winding of the transformer, thereby generating an error signal. Changes in the error signal are used by a flux controller to provide a flux cancellation signal. The flux cancellation signal is added with the data signal to generate an offsetting flux signal to the transformer.
    Type: Grant
    Filed: March 17, 2000
    Date of Patent: May 3, 2005
    Assignee: Adtran, Inc.
    Inventors: Daniel M. Joffe, Richard L. Goodson, Curtis W. Dodd
  • Patent number: 6876736
    Abstract: A called telephone number substitution mechanism is incorporated into the call-routing software employed by the microcontroller of a customer premises-installed communication device, through which digitized voice and data services are supplied to a customer site. The number substitution mechanism automatically selectively modifies digits of an original (dialed) telephone number, as necessary, to conform with the connectivity requirements of the communication link serving the destination device, thereby enabling the call to reach the destination device.
    Type: Grant
    Filed: October 16, 2001
    Date of Patent: April 5, 2005
    Assignee: Adtran, Inc.
    Inventors: Michael F. Lamy, Paul Graves McElroy, Charles A. Wilson, Arthur Edward Aldridge
  • Patent number: 6876696
    Abstract: A method of training and operating a dual-duplex, four-wire communications system to provide for time alignment in the receivers of data that is time aligned in the transmitters, even in the presence of a differential transmission delay in the wire pairs. In a training mode, a known sequence of training data is concurrently sent across each wire pair such that equalizers in the receivers are forced to train together. After the equalizers have been trained to eliminate the differential delay, the system is switched to a data mode.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: April 5, 2005
    Assignee: Adtran, Inc.
    Inventors: Richard L. Goodson, Steven R. Blackwell, Ayman Ghobrial, Cynthia Lin
  • Patent number: 6862350
    Abstract: A digital communication link establishment control mechanism, termed ‘dial on off-hook’ (DOO) call routing, is incorporated into call routing control software employed by the microcontroller of an integrated access device (IAD). The DOO routine automatically routes an outgoing call to a user pre-specified destination number of a called circuit, in response to detecting an off-hook signaling state of the calling circuit. No user dialing is required.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: March 1, 2005
    Assignee: Adtran, Inc.
    Inventor: Scott William Dendy
  • Patent number: 6859900
    Abstract: An in-band communication scheme reports the results of loop performance measurements from a remote site to a test site, by deliberately injecting, into a loopback sequence of a repeated code word, a selected one of different numbers of errors. The number of errors is selectable from among a plurality of different quantification values, based upon in which of a plurality of respective ranges of loop performance parameters, measured parameter values fall. The error data is thus effectively a gray-scale type of quantification of loop performance measurement data.
    Type: Grant
    Filed: December 5, 2001
    Date of Patent: February 22, 2005
    Assignee: Adtran, Inc.
    Inventors: Martin Garza, Joe Luna, Mark Jefferies Ogden, James Ernest Owen, James Denson Wilson, Jr.
  • Patent number: 6859043
    Abstract: A test fixture interfaces plural units under test (UUTs) with test equipment within a common equipment rack. The test fixture supports a plurality of vertically spaced apart shelf units. A shelf unit has a support surface and an input/output connector panel adjacent thereto, that define a UUT insertion cavity. An input/output connector panel contains cable terminations that terminate cables to various testing equipments. Insertion of a UUT into the insertion cavity places communication ports of the UUT adjacent to cable terminations of the adjacent input/output connector panel. Jumper cables interconnect communication ports of the UUT with cable terminations of the adjacent input/output connector panel.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: February 22, 2005
    Assignee: Adtran, Inc.
    Inventors: Phillip H. Ewing, Marc L. Roth, Paul L. Wooten