Patents Assigned to Advanced Micro Devices
  • Method and apparatus for remapping interrupt types
    Patent number: 8656079
    Abstract: A method and apparatus are provided for controlling system management interrupts is disclosed. The method comprises: receiving an interrupt signal; determining a type associated with the interrupt signal; using the determined type to access control information indicating an action to be applied to the determined type of interrupt; and blocking, passing or remapping the interrupt signal in response to the control information. The apparatus comprises a memory, an interrupt unit and a logic circuit. The memory is adapted to store control information regarding a plurality of types of interrupt signals. The interrupt unit is adapted to receive the interrupt signal, and use the interrupt type contained in the interrupt signal to access the control information stored in the memory. The logic circuit is adapted to block, pass or remap said interrupt signal in response to the control information.
    Type: Grant
    Filed: December 19, 2011
    Date of Patent: February 18, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Andrew G. Kegel, Michael D. Vance
  • Electronic comparison circuit
    Patent number: 8653859
    Abstract: An electronic circuit includes a differential input section, a current mirror section, an operational amplifier, an inverter, and a compensation voltage generator. The differential input section and the current mirror section are coupled together, forming a first common drain node and a second common drain node. The current mirror section has two p-type transistors coupled together at a common gate node. The operational amplifier has a positive input coupled to the first common drain node, a negative input coupled to the compensation voltage generator, and an output coupled to the common gate node. The inverter has an input node coupled to the second common drain node. The compensation voltage generator provides a compensation voltage to replicate a switching threshold voltage of the inverter.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: February 18, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Stephen F. Greenwood
  • Method for analyzing sensitivity and failure probability of a circuit
    Patent number: 8656339
    Abstract: A method, implemented in a processor, of determining a likelihood of failure of a circuit to be made in accordance with a circuit design, and a computer-readable storage medium storing instructions to the processor for carrying out the method. A sensitivity of a figure of merit to each variable of a plurality of variables is determined by simulating operation of the circuit using the processor. Determining the sensitivity is based on a departure of each of the variables from a respective mean value, where the variables include at least one variable derived from measurements of a fabricated component or component combination to be included in the circuit. Results from the simulation are used to predict a failure probability of the circuit to be made in accordance with the circuit design.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: February 18, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kevin M. Gillespie, Timothy J. Correia, Donald A. Priore
  • Method and apparatus for prioritizing processor scheduler queue operations
    Patent number: 8656401
    Abstract: A method and processor are described for implementing programmable priority encoding to track relative age order of operations in a scheduler queue. The processor may comprise a scheduler queue configured to maintain an ancestry table including a plurality of consecutively numbered row entries and a plurality of consecutively numbered columns. Each row entry includes one bit in each of the columns. Pickers are configured to pick an operation that is ready for execution based on the age of the operation as designated by the ancestry table. The column number of each bit having a select logic value indicates an operation that is older than the operation associated with the number of the row entry that the bit resides in.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: February 18, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ganesh Venkataramanan, Srikanth Arekapudi, James Vinh, Mike Butler
  • Method and apparatus for memory power management
    Patent number: 8656198
    Abstract: A method for power management is disclosed. The method may include monitoring requests for access to a memory of a memory subsystem by one or more processor cores; and monitoring requests for access to the memory conveyed by an input/output (I/O) unit. The method may further include determining if at least a first amount of time has elapsed since any one of the processor cores has asserted a memory access request and determining if at least a second amount of time has elapsed since the I/O unit has conveyed a memory access request. A first signal may be asserted if the first and second amounts of time have elapsed. A memory subsystem may be transitioned from operating in a full power state to a first low power state responsive to assertion of the first signal.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: February 18, 2014
    Assignees: Advanced Micro Devices, ATI Technologies ULC
    Inventors: Alexander Branover, Maurice B. Steinman, Anthony Asaro, James B. Fry
  • CONTACTS FOR SEMICONDUCTOR DEVICES
    Publication number: 20140042514
    Abstract: A memory device includes a number of memory cells and a dielectric layer formed over the memory cells. The memory device also includes contacts formed in the dielectric layer and spacers formed adjacent the side surfaces of the contacts. The spacers may inhibit leakage currents from the contacts.
    Type: Application
    Filed: October 21, 2013
    Publication date: February 13, 2014
    Applicants: Spansion LLC, Advanced Micro Devices, Inc.
    Inventors: Angela T. Hui, Wenmei Li, Minh Van Ngo, Amol Ramesh Joshi, Kuo-Tung Chang
  • SYSTEM AND METHOD FOR ALLOCATING A CLUSTER OF NODES FOR A CLOUD COMPUTING SYSTEM BASED ON HARDWARE CHARACTERISTICS
    Publication number: 20140047342
    Abstract: The present disclosure relates to a method and system for configuring a computing system, such as a cloud computing system. A method includes initiating a hardware performance assessment test on a group of available nodes to obtain actual hardware performance characteristics of the group of available nodes. The method further includes selecting a subset of nodes for the computing system from the group of available nodes based on a comparison of the actual hardware performance characteristics of the group of available nodes and desired hardware performance characteristics.
    Type: Application
    Filed: August 7, 2012
    Publication date: February 13, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Mauricio Breternitz, Keith A. Lowery, Patryk Kaminski, Anton Chernoff
  • PACKAGE RETENTION FRAME
    Publication number: 20140043768
    Abstract: The present invention provides embodiments of a package retention frame. One embodiment of the package retention frame is configured for deployment adjacent a top surface of an integrated circuit package. A grid of contacts is on a bottom surface of the integrated circuit package. The package retention frame when deployed substantially maintains alignment of the grid of contacts with a grid of pins in a socket. An outer boundary of the package retention frame is substantially encompassed by an outer boundary of the socket.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 13, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Mahesh Hardikar, Stephen F. Heng
  • SYSTEM AND METHOD FOR MODIFYING A HARDWARE CONFIGURATION OF A CLOUD COMPUTING SYSTEM
    Publication number: 20140047084
    Abstract: The present disclosure relates to a method and system for configuring a computing system, such as a cloud computing system. A method includes determining, based on a shared execution of a workload by a cluster of nodes of the computing system, that at least one node of the cluster of nodes operated at less than a threshold operating capacity during the shared execution of the workload. The method further includes selecting a modified hardware configuration of the cluster of nodes based on the determining such that the cluster of nodes with the modified hardware configuration has at least one of a reduced computing capacity and a reduced storage capacity.
    Type: Application
    Filed: August 7, 2012
    Publication date: February 13, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Mauricio Breternitz, Keith A. Lowery, Patryk Kaminski, Anton Chernoff
  • SYSTEM AND METHOD FOR CONFIGURING CLOUD COMPUTING SYSTEMS
    Publication number: 20140047341
    Abstract: The present disclosure relates to a method, system, and apparatus for configuring a computing system, such as a cloud computing system. A method includes, based on user selections received via a user interface, configuring a cluster of nodes by selecting the cluster of nodes from a plurality of available nodes, selecting a workload container module from a plurality of available workload container modules for operation on each node of the selected cluster of nodes, and selecting a workload for execution with the workload container on the cluster of nodes. Each node of the cluster of nodes includes at least one processing device and memory, and the cluster of nodes is operative to share processing of a workload.
    Type: Application
    Filed: August 7, 2012
    Publication date: February 13, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Mauricio Breternitz, Keith A. Lowery, Patryk Kaminski, Anton Chernoff
  • SYSTEM AND METHOD FOR EMULATING A DESIRED NETWORK CONFIGURATION IN A CLOUD COMPUTING SYSTEM
    Publication number: 20140047079
    Abstract: The present disclosure relates to a method and system for configuring a computing system, such as a cloud computing system. A method includes selecting a cluster of nodes for the computing system from a plurality of available nodes coupled to a communication network based on a comparison of a communication network configuration of an emulated node cluster and an actual communication network configuration of the plurality of available nodes. The method further includes modifying a network configuration of at least one node of a cluster of nodes to modify network performance of the at least one node on a communication network coupled to the cluster of nodes.
    Type: Application
    Filed: August 7, 2012
    Publication date: February 13, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Mauricio Breternitz, Keith A. Lowery, Patryk Kaminski, Anton Chernoff
  • Handling Pointers in Program Code in a System that Supports Multiple Address Spaces
    Publication number: 20140047419
    Abstract: Some embodiments include a processing subsystem that compiles program code to generate compiled program code. In these embodiments, while compiling the program code, the processing subsystem first identifies a pointer in the program code that points to an unspecified address space. The processing subsystem then analyzes at least a portion of the program code to determine one or more address spaces to which the pointer may point. Next, the processor updates metadata for the pointer to indicate the one or more address spaces to which the pointer may point, the metadata enabling a determination of an address space to which the pointer points during subsequent execution of the compiled program code.
    Type: Application
    Filed: October 1, 2012
    Publication date: February 13, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventor: Benedict R. Gaster
  • SYSTEM AND METHOD FOR TUNING A CLOUD COMPUTING SYSTEM
    Publication number: 20140047095
    Abstract: The present disclosure relates to a method and system for configuring a computing system, such as a cloud computing system. A method includes initiating a plurality of executions of a workload on a cluster of nodes based on a plurality of different sets of configuration parameters. The configuration parameters include at least one of an operational parameter of a workload container, a boot-time parameter of at least one node, and a hardware configuration parameter of at least one node. A set of configuration parameters is selected for the cluster of nodes from the plurality of different sets of configuration parameters based on a comparison of at least one performance characteristic of the cluster of nodes monitored during each execution of the workload and at least one desired performance characteristic. The workload is provided to the cluster of nodes for execution.
    Type: Application
    Filed: August 7, 2012
    Publication date: February 13, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Mauricio Breternitz, Keith A. Lowery, Patryk Kaminski, Anton Chemoff
  • SYSTEM AND METHOD FOR CONFIGURING BOOT-TIME PARAMETERS OF NODES OF A CLOUD COMPUTING SYSTEM
    Publication number: 20140047227
    Abstract: The present disclosure relates to a method and system for configuring a computing system, such as a cloud computing system. A method includes providing a user interface comprising selectable boot-time configuration data and selecting, based on at least one user selection of the boot-time configuration data, a boot-time configuration for at least one node of a cluster of nodes of the computing system. The method further includes configuring the at least one node of the cluster of nodes with the selected boot-time configuration to modify at least one boot-time parameter of the at least one node.
    Type: Application
    Filed: August 7, 2012
    Publication date: February 13, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Mauricio Breternitz, Keith A. Lowery, Patryk Kaminski, Anton Chernoff
  • SYSTEM AND METHOD FOR CONFIGURING A CLOUD COMPUTING SYSTEM WITH A SYNTHETIC TEST WORKLOAD
    Publication number: 20140047272
    Abstract: The present disclosure relates to a method and system for configuring a computing system, such as a cloud computing system. A method includes selecting, based on a user selection received via a user interface, a workload for execution on a cluster of nodes of the computing system. The workload is selected from a plurality of available workloads including an actual workload and a synthetic test workload. The method further includes configuring the cluster of nodes of the computing system to execute the selected workload such that processing of the selected workload is distributed across the cluster of nodes. The synthetic test workload may be generated by a code synthesizer based on a set of user-defined workload parameters provided via a user interface that identify execution characteristics of the synthetic test workload.
    Type: Application
    Filed: August 7, 2012
    Publication date: February 13, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Mauricio Breternitz, Keith A. Lowery, Patryk Kaminski, Anton Chernoff
  • Method of fabricating a semiconductor chip with supportive terminal pad
    Patent number: 8647974
    Abstract: Various semiconductor chip input/output structures and methods of making the same are disclosed. In one aspect, a method of manufacturing is provided that includes providing a semiconductor chip that has a first conductor pad and a passivation structure. A second conductor pad is fabricated around but not in physical contact with the first conductor pad to leave a gap. The second conductor pad is adapted to protect a portion of the passivation structure.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: February 11, 2014
    Assignees: ATI Technologies ULC, Advanced Micro Devices, Inc.
    Inventors: Roden R. Topacio, Michael Z. Su, Neil McLellan
  • Persistent Folder Associations for Personal Internet Communicator
    Publication number: 20140040329
    Abstract: In a personal Internet communication device, a system for directing the storage of files uses a file navigation program to control the location of where files may be stored by the user. With the system, attempts to save files by the file navigation program are directed to a predefined or default storage location in a fixed directory structure. All other applications on the person Internet communicator may also be modified to control file save operations. The person Internet communicator is further configured to maintain the file save associations with the predefined or default storage location, even when the user has previously saved files to another location.
    Type: Application
    Filed: October 7, 2013
    Publication date: February 6, 2014
    Applicant: Advanced Micro Devices, Inc.
    Inventor: Jeffrey M. Lavin
  • Queue freeze on protocol error
    Patent number: 8645762
    Abstract: A method and apparatus for retrieving a state of a processor at a time at which failure is detected. More specifically, the detection of one or more protocol errors results in the halting of operations of one or more system elements, and the retrieving of the state of the processor at the time of the failure.
    Type: Grant
    Filed: December 8, 2010
    Date of Patent: February 4, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Greggory D. Donley
  • Pipelined serial ring bus
    Patent number: 8645588
    Abstract: The present invention provides embodiments of an apparatus used to implement a pipelined serial ring bus. One embodiment of the apparatus includes one or more ring buses configured to communicatively couple registers associated with logical elements in a processor. The ring bus(s) are configured to concurrently convey information associated with a plurality of load or store operations.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: February 4, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher D. Bryant, David Kaplan
  • Spacer lithography
    Patent number: 8642474
    Abstract: Ultrafine dimensions are accurately and efficiently formed in a target layer using a spacer lithographic technique comprising forming a first mask pattern, forming a cross-linkable layer over the first mask pattern, forming a cross-linked spacer between the first mask pattern and cross-linkable layer, removing the cross-linkable layer, cross-linked spacer from the upper surface of the first mask pattern and the first mask pattern to form a second mask pattern comprising remaining portions of the cross-linked spacer, and etching using the second mask pattern to form an ultrafine pattern in the underlying target layer.
    Type: Grant
    Filed: July 10, 2007
    Date of Patent: February 4, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ryoung-han Kim, Yunfei Deng, Thomas I. Wallow, Bruno La Fontaine