Abstract: The invention provides an advisory alert indicating conditions are such that an ongoing telephone call involving a cellular telephone may be dropped due to insufficient signal strength. A decrease in signal strength over time that exceeds a specified percentage decrease provides the primary basis for triggering the advisory alert. This advisory alert warns one or more participants of the call of the possibility of the call ending due to low signal strength. The advisory alert provides for conclusion of the call before the call is lost, and/or lowers the frustration level associated with a call lost for an unknown reason. In operation, signal strength is assessed during a series of time intervals. Signal strength of consecutive time intervals is compared. If the percentage drop in signal strength exceeds a specified percentage, an advisory alert is effectuated. The criteria that trigger an advisory alert may be non-programmable, or is modifiable in programmable embodiments.

Abstract: The audio signals associated with different co-located groups of talkers in a teleconference are detected (e.g., by comparing the voiceprint for the current talker group with stored voiceprints corresponding to all of the co-located teleconference participants) and processed using different and appropriate automatic gain control (AGC) levels, where each group has a corresponding stored AGC level. Depending on the embodiment, each group may have one or more participants.

Abstract: In one embodiment, a method for determining capacitive signature validity of a powered device (PD) attached to power sourcing equipment (PSE) having (i) an isolated side with a primary coil and (ii) a line side with a secondary coil connected to the PD. The method includes determining, on the isolated side, a first time T1 and a corresponding first voltage V1 across the PD. Then generating, on the isolated side, a switching signal used to generate an electrical current through the primary coil. Then determining, on the isolated side, a second time T2 and a corresponding second voltage V2 across the PD, wherein a difference between V2 and V1 is related to the electrical current provided to the primary coil. Then determining the capacitive-signature validity of the PD based on T1, T2, V1, V2, and a resistive signature of the PD.

Abstract: An improved multi-channel receiver for satellite broadcast applications or the like. In an exemplary embodiment, a primary AGC loop controls an analog sub-receiver adapted to simultaneously receive multiple signals. Multiple digital demodulators, coupled to the sub-receiver, demodulate the multiple received signals. Multiple secondary AGC loops, one for each received signal, compensate for variations in demodulated signal strengths caused by the primary AGC loop. A feed-forward AGC compensation technique generates scalar control values for scaling the demodulated signals before the demodulated signals are processed by the secondary AGC loops. This at least partially compensates for gain variations caused by the primary AGC, reducing received signal drop-outs before the secondary AGC loops can compensate for the gain variations.

Abstract: A voltage regulator, a method of regulating voltage and an IC including a voltage regulator. In one embodiment, the voltage regulator includes: (1) a DC precision amplifier configured to generate a DC precision signal based on a reference voltage and a regulated output of the voltage regulator and (2) a response amplifier, coupled in parallel with the DC precision amplifier, configured to generate an error signal based on the reference voltage and the regulated output, the response amplifier further configured to generate the regulated output based on a regulating signal comprised of the error signal and the DC precision signal. The DC precision amplifier may be a CMOS amplifier and the response amplifier may be a NPN amplifier.

Abstract: An exemplary fast Fourier transform (FFT) numerology for an orthogonal frequency division multiple access (OFDMA) downlink transmission system is described. The exemplary FFT numerology reduces the FFT sampling rate for a given transmission bandwidth, thereby increasing the battery life of a UE. The FFT numerology increases robustness against Doppler spread, phase noise, and frequency offset, enabling operation in channels with high delay spread, such as occurs in mountainous regions. The described numerology might provide the following without altering standard sub-frame duration: increased intercarrier spacing; reduced FFT sampling frequency across the transmission bandwidths; reduced FFT size across all transmission bandwidths; increased number of OFDM symbols per sub-frame; and/or increased cyclic prefix length choices.

Abstract: In one embodiment, a Universal Serial Bus (USB) system assigns a first priority level to a first USB endpoint and a second priority level that is lower than the first priority level to a second USB endpoint. The USB system has memory that stores first USB data packets corresponding to the first priority level and second USB data packets corresponding to the second priority level. The USB system also has a controller that manages transfers of (i) the first USB data packets to the first USB endpoint and (ii) the second USB data packets to the second USB endpoint. If the memory concurrently stores first and second USB data packets, then the controller determines an order for transferring the first and second USB data packets based on the second priority level being lower than the first priority level and/or detection of a starvation condition for the second endpoint.

Abstract: Roughly described, a packet switching fabric contains a separate queue scheduler for each combination of an input module and a fabric output port. The schedulers may also be specific to a single class of service. Each queue scheduler schedules its packets without regard to state of other input queues and without regard to packets destined for other output ports. In an aspect, the fabric manages per-flow bandwidth utilization of output port bandwidth capacity by monitoring the same and asserting backpressure toward the queue scheduler for any thread that is exceeding its bandwidth allocation. In another aspect, a switching fabric uses leaky buckets to apply backpressure in response to overutilization of downstream port capacity by particular subflows. In another aspect, a switching fabric includes a cascaded backpressure scheme.

Abstract: A method for forming high density emission elements and field emission displays formed according to the method. Oxygen and a silicon etchant are introduced into a plasma etching chamber containing a silicon substrate. The oxygen reacts with the silicon surface to form regions of silicon dioxide, while the silicon etchant etches the silicon to form the emission elements. The silicon dioxide regions mask the underlying silicon during the silicon etch process. High density and high aspect ratio emission elements are formed without using photolithographic processes. The emission elements formed according to the present invention provide a more uniform emission of electrons. Further, a display incorporating emission elements formed according to the present invention provides increased brightness. The reliability of the display is increased due to the use of a plurality of emission elements to supply electrons for stimulating the phosphor substrate material to produce the image.

Abstract: The invention, in one aspect, provides a method of manufacturing a semiconductor device. This method includes providing a semiconductor substrate and depositing a metal layer over the semiconductor substrate that has an overall thickness of about 1 micron or greater. The metal layer is formed by depositing a first portion of the thickness of the metal layer, which has a compressive or tensile stress associated therewith over the semiconductor substrate. A stress-compensating layer is deposited over the first portion, such that the stress-compensating layer imparts a stress to the first portion that is opposite to the compressive or tensile stress associated with the first portion. A second portion of the thickness of the metal layer is then deposited over the stress-compensating layer.

Abstract: An assembly comprises a stiffener, a circuit substrate and an IC chip. The stiffener has a surface with a first region and a second region. The circuit substrate covers at least a portion of the first region of the stiffener, while the IC chip overlies at least a portion of each of the first and second regions of the stiffener. The assembly further comprises a signal solder bump and a thermally conductive feature. The signal solder bump contacts the IC chip and the circuit substrate. The thermally conductive feature is disposed between, and is metallurgically bonded to, the integrated circuit chip and the second region of the stiffener. The thermally conductive feature provides an efficient thermal conductivity pathway between the IC chip and the stiffener.

Abstract: An improved multi-channel receiver for satellite broadcast applications or the like. In an exemplary embodiment, a primary AGC loop controls an analog sub-receiver adapted to simultaneously receive multiple signals. Multiple digital demodulators, coupled to the sub-receiver, demodulate the multiple received signals. Multiple secondary AGC loops, one for each received signal, compensate for variations in demodulated signal strengths caused by the primary AGC loop. A feed-forward AGC compensation technique generates scalar control values for scaling the demodulated signals before the demodulated signals are processed by the secondary AGC loops. This at least partially compensates for gain variations caused by the primary AGC, reducing received signal drop-outs before the secondary AGC loops can compensate for the gain variations.

Abstract: Disclosed is a circuit that adjusts a characteristic of a signal transmitted from a transmitter to a receiver over a communication channel (e.g., a wire, a backplane, etc.). The circuit includes a latch that receives the signal at a predetermined point in the circuit and samples a voltage of the signal many times after a threshold voltage is applied to the latch. The circuit also includes a processor that determines the characteristic of the signal when the sampled voltages indicate a transition point and that adjusts the threshold voltage when the sampled voltages do not indicate a transition point. The processor adjusts the characteristic of the signal by adjusting at least one of a current and a voltage of the transmitter when the characteristic of the signal is outside a predetermined range.

Abstract: A method for increasing a voltage tolerance of a MOS device having a first capacitance value associated therewith is provided. The method includes the steps of: connecting at least a first capacitor in series with the MOS device, the first capacitor having a first capacitance value associated therewith, the first capacitor having a first terminal coupled to a gate of the MOS device and a second terminal adapted to receive a first signal; and adjusting a ratio of the first capacitance value and a second capacitance value associated with the MOS device such that a second signal present at the gate of the MOS device will be an attenuated version of the first signal. An amount of attenuation of the first signal is a function of the ratio of the first and second capacitance values.

Abstract: Generic and specific C-to-E binaural cue coding (BCC) schemes are described, including those in which one or more of the input channels are transmitted as unmodified channels that are not downmixed at the BCC encoder and not upmixed at the BCC decoder. The specific BCC schemes described include 5-to-2, 6-to-5, 7-to-5, 6.1-to-5.1, 7.1-to-5.1, and 6.2-to-5.1, where “.1” indicates a single low-frequency effects (LFE) channel and “.2” indicates two LFE channels.

Abstract: An electronic device includes a semiconductor substrate and a dielectric layer over the substrate. A resistive link located over the substrate includes a first resistive region and a second resistive region. The first resistive region has a first resistivity and a first morphology. The second resistive region has a second resistivity and a different second morphology.

Abstract: A method of forming a semiconductor device is disclosed. A semiconductor substrate is provided that has a first contact and an undoped electroplated lead-free solder bump (610) formed thereon. A device package substrate is provided that has a second contact and a doped lead-free solder layer (510) on the second contact that includes a dopant. The dopant reduces a solidification undercooling temperature of the undoped lead-free solder bump when the dopant is incorporated into the lead-free solder bump. The undoped electroplated lead-free solder bump and the doped lead-free solder layer are melted thereby incorporating the dopant into the undoped lead-free solder to form a doped solder bump (140). The solder bump provides an electrical connection between the first contact and the second contact.

Abstract: Devices having voids are producible by employing an electrochemical corrosion process. For example, an electrically conductive region is formed to have a surrounding chemically distinct region. Such formation is possible through conventional semiconductor processing techniques such as a copper damascene process. The surrounded conducting material is configured to be in electrical communication with a charge separation structure. The electrically conducting region is contacted with a fluid electrolyte and electromagnetic radiation is made to illuminate the charge separation region to induce separation of electrons and holes. The resulting separated charges are used to drive an electrochemical corrosion process at the conductive material/electrolyte interface resulting in the removal of at least a portion of the electrically conducting material.

Abstract: The invention, in one aspect, provides a semiconductor device (100), including transistors (105), dielectric layers (115, 120) located over the transistors (105), interconnects (122) formed within the dielectric layers (115, 120), and a test structure (130) located adjacent a hot-spot (125) of the semiconductor device (100) and configured to monitor a real-time operational parameter of at least one of the transistors (105) or interconnects (122).

Abstract: A method includes detecting a person located between a projector and a surface on which a first image is projected by the projector, and automatically blacking out a portion of the first image, so that light from the projector does not fall on the face of the person.