Abstract: An optical source generates optical signals as a result of varying polarization states to achieve oscillation within an optical loop. The optical signals have narrow spectral width and the optical source is tuneable, so that optical components stimulated by the optical signals can be characterized over a predefined wavelength range with high wavelength resolution. The optical loop includes an optical gain element, a tuneable filter, and a polarization scrambler that provides a varying polarization transfer function. The optical gain element has sufficiently high gain within the passband of the tuneable filter and the polarization transfer function is sufficiently varied to attain oscillation within the optical loop, thereby generating the optical signals. The varying polarization transfer function of the polarization scrambler produces a corresponding variation in the polarization of the generated optical signals, which are coupled from the optical loop to an output.

Abstract: An improved circuit board inspection system incorporates electrically controlled selection of Z-axis position for generation of laminographic images of electrical connections. Analysis of the laminographic images is performed by comparing the laminographic images to the CAD data representing the area of the circuit board in the image. The CAD data based on a reference Z-axis level is converted on-the-fly to compensate for changes in the field of view, magnification factors, etc. for non-reference Z-axis levels. Thus, laminographic images at the reference Z-axis level are compared directly to the reference level CAD data while laminographic images at non-reference Z-axis levels are compared to the on-the-fly modified non-reference level CAD data.

Abstract: A multiple-photosensor structure. The multiple-photosensor structure includes a substrate. A first photosensor is formed adjacent to the substrate. A first pixel electrode of the first photosensor is electrically connected to the substrate. A first transparent conductive layer is formed adjacent to the first photosensor. The first transparent conductive layer electrically connects a first outer electrode of the first photosensor to the substrate. A second photosensor is adjacent to the first transparent conductive layer. A second pixel electrode of the second photosensor is electrically connected to the substrate through the first transparent conductive layer. A second transparent conductive layer is adjacent to the second photosensor. The second transparent conductive layer electrically connects a second outer electrode of the second photosensor to the substrate. The multiple-photosensor structure can further include a third photosensor formed adjacent to the second transparent conductive layer.

Abstract: An optical connector is provided which comprises a housing part having a fiber bore therethrough and having a housing connecting face for abutment or adjacence with a housing connecting face of a mating optical connector. An optical fiber is located in the fiber bore and fixed to the housing part, the optical fiber having a fiber connecting face. The optical fiber protrudes from the housing part at the housing connecting face, such that the fiber connecting face is displaced by a protrusion distance from the housing connecting face, the protrusion distance being between 5 um and 100 um. This approach is particularly useful for MT connectors, especially for connectorised devices comprising an optical connector as indicated above and an optical device, wherein the optical device is adapted to send or receive light through the optical fiber of the optical connector.

Abstract: A precision delay system allowing clock edges to be delayed with new delay values every clock period T. The internal delay elements are reprogrammed every clock cycle with reprogramming transients suppressed by clock independent blanking circuitry. The system allows the use of delay elements with a maximum delay of one-half (T/2) the clock period to continuously span a full clock cycle T delay range with full cycle-by-cycle reprogramming.

Abstract: A chip for a device such as a computer includes a media access controller and an embedded processor. The embedded processor is programmed to function as a web server and provide network manageability information to a network manager. The embedded processor is also programmed to function as a LAN controller. When a packet is received by the media access controller, the embedded processor examines a destination address of the packet and routes the packet to an appropriate end point. Packets having a first unique destination address are routed to a host interface (and eventually to a host processor), and packets having a second unique address are routed to the embedded processor-functioning-as-web server. Thus, the chip allows network management and local area network communications to be performed over a single physical interface.

Abstract: A method and apparatus for fabricating an array of biopolymers on a substrate using a biopolymer or biomonomer fluid, and using a fluid dispensing head. The head has at least one jet which can dispense droplets onto a substrate, the jet including a chamber with an orifice, and including an ejector which, when activated, causes a droplet to be ejected from the orifice. The method includes positioning the head with the orifice facing the substrate. Multiple droplets of the biopolymer or biomonomer fluid are dispensed from the head orifice so as to form an array of droplets on the substrate. A gas flow is directed through a venturi which has a throat opening communicating with the dispensing head chamber. A venturi control valve which particularly communicate with an outlet of the venturi, is adjusted to alter the chamber pressure. The venturi may be driven by a source of inert anhydrous compressed gas which assists in maintaining fluid in the head isolated from moisture.

Abstract: The architecture of the inventive correlator is, in a preferred embodiment, an array of correlation cells each containing a delay pipe, a math unit and an accumulator. An array of these correlation cells are tiled together to allow simultaneous processing by all cells. The array is disposed so that each cell accumulates an output value in a result surface. There is no electrical limit to the number of correlation cells that may be tiled together. A preferred embodiment uses nine cells tiled together into a 3×3 correlation result surface. Other embodiments have been tested in accordance with the present invention having twenty-five cells tiled together into a 5×5 correlation result surface. A stream of compare pixel values is presented to the array wherein each compare pixel value is presented to each cell concurrently. A reference memory supplies the appropriate reference pixel values to the cells to enable all calculations for that compare pixel value to be done concurrently.

Abstract: A method and apparatus for scanning an original image with an optical scanning device and for constructing a duplication of the original image. The apparatus of the present invention comprises an optical scanning device for scanning the original image and for generating an electrical representation of the original image. The scanning device comprises an illumination device for projecting light onto an original image being scanned, an optical image sensing device disposed to receive light reflected from the original image, and a processing device in communication with the optical image sensing device for receiving electrical signals produced by the optical sensors of the optical image sensing device and for processing the electrical signals. The optical image sensing device comprises a plurality of optical sensors. Each optical sensor has a field of view and at least two of the optical sensors have fields of view which at least partially overlap.

Abstract: A capture scheme detects repetitive occurrences of finite-length bit patterns within an applied data signal to provide trigger events for equivalent time sampling of the data signal. The capture scheme enables acquisition of samples within designated bit patterns of the data signal, independent of whether the data signal is random in nature, since the designated finite-length bit patterns occur repetitively within the data signal. In an apparatus implementation of the capture scheme, a bit pattern detector detects a designated bit pattern within the applied data signal and generates trigger events responsive to the occurrences of the bit pattern. An equivalent time sampler receives the data signal and trigger events to acquire samples of the data signal within the designated bit pattern.

Abstract: Apparatus and method for scanning a surface. An optical system generates a light beam to illuminate a surface. A carrier supports the surface for reciprocating motion with respect to the light beam to form one axis of a raster. A propulsion system moves the carrier at a substantially constant speed and a position sensor provides an output signal representing the surface position with respect to the light beam. A control system responsive to the output signal modulates a sample period reciprocally to carrier speed to achieve substantially constant scan length per sample and to control data acquisition timing.

Abstract: A time-of-flight mass spectrometer includes a deflector and a filter assembly that is located along a flight path between the deflector and an ion detector. The filter assembly passes incoming ions to the detector when the ions approach the filter assembly along their original flight path, and the filter assembly occludes incoming ions from the detector when the ions have been deflected from their original flight path by the deflector. In an embodiment, the filter assembly includes filtering plates that are aligned such that the major surfaces of the filtering plates are parallel to the original flight path of the ions. In order to remove ions of a particular mass from a mass spectrum of ions, target ions are deflected from their original flight path, causing the target ions to impact the filtering plates while the ions that are not deflected from their original flight path pass between the filtering plates for measurement by the detector.

Abstract: A system and a method of objectively assessing the functional status of a subject utilize a functional status scale to extract objective measures that are indicative of the subject's functional status. The objective measures are extracted from center-of-weight (C.O.W.) data gathered from the functional status scale when the subject is standing on the scale. These objective measures can then be used to assess the current functional status of the subject by a health care provider. The functional status scale can be remotely stationed at the subject's home, which eliminates the need for office visits, expensive home nurse visits, telephone interviews or video visits to assess the current functional status of the subject. The functional status scale includes weight sensors that are connected to a C.O.W. computer. The C.O.W. computer is configured to compute x and y coordinates of the C.O.W. from weight signals generated by the weight sensors.

Abstract: A signal analyzer has an analysis scale and a display scale that are independently selectable. The signal analyzer receives a first representation of an applied signal and provides from the first representation at least two alternative representations. A first selective input enables a designated one of the alternative representations to be applied to a filter to reduce variance of the designated representation. The signal analyzer then converts the received one of the alternative representations having reduced variance to at least two alternative display scales. A second selective input enables a designated one of the alternative display scales to be displayed on a monitor, display screen or other output device of the measurement instrument or system.

Abstract: A system and method of adjusting the logic synthesis process of the design of an integrated circuit takes into account the interaction between the IC core logic circuitry, the on-chip power supply circuitry, and the package power supply circuitry. In IC package/circuit technology combinations that have been employed in previous IC designs, the associated package and on-chip power supply circuit designs are stable and well-defined, thus allowing the generating of simulation models for those power supply circuits. Those models are used to identify resonant frequencies and other characteristics of the power supply circuitry. By using the identity of the power supply resonant frequencies and the power supply models themselves, design constraints are developed that are supplied as input, either directly or indirectly, to the logic synthesis process to avoid incompatibilities of a periodic and non-periodic nature between the IC core logic and the power supply circuitry.

Abstract: A method and apparatus for accurately distributing traceable time values to a set of nodes in a system. Each node includes a slave clock that synchronizes a slave time value using a synchronization protocol. The system includes a traceable time source that generates a traceable time value and a master node having a master clock that synchronizes a master time value to the traceable time value and that distributes the master time value to the slave clocks via the communication link. The nodes may be distributed nodes or cards connected to a backplane.

Abstract: A scan head that comprises an elongate light source, an elongate light sensor array and a planar waveguide array The light source is disposed perpendicular to the scan direction. The light sensor array is disposed parallel to the light source. The planar waveguide array includes an input end and an output end, and is curved about an axis parallel to the light source. The input end is located to receive light from the light source reflected by the object. The output end is located adjacent the light sensor array. The waveguide array includes tapered waveguides linearly arrayed in an array direction parallel to the light source. Each of the waveguides has a width in the array direction that decreases towards the output end of the waveguide array.

Abstract: The present invention, in general, provides for a testing system and method for detecting defects within a circuit. A current signature of the quiescent current of the circuit is determined, and certain constant values are calculated based on the current signature using a linear iterative regression. A defect free state for the circuit associated with a minimum quiescent current (IDDQ) is then determined. The IDDQ of the circuit for this state is measured, and a signal indicating the IDDQ at this state is used along with the aforementioned constant values to create upper and lower threshold values. Thereafter, signals indicating the value of IDDQ for a plurality of other states are compared to the upper and lower threshold values. The circuit is determined to be defective if the values of any of the signals is greater than the upper threshold value or is less than the lower threshold value.

Abstract: An apparatus and method are provided for picking up an integrated circuit and for facilitating the optical testing thereof. The apparatus comprises a pick-up mechanism that includes a vacuum chamber. The vacuum chamber is defined by an upper portion, an expandable member, and a lower portion. The lower portion defines a suction orifice that is moveable with a movement of the expandable member. An optical pathway is defined by the vacuum chamber, the optical pathway passing through the suction orifice and onto an integrated circuit that is held against the suction orifice via a vacuum pressure applied to the vacuum chamber.