Patents Assigned to ams AG
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Patent number: 11039515Abstract: The device comprises a bipolar transistor with emitter, base, collector, base-collector junction and base-emitter junction, a collector-to-base breakdown voltage, a quenching component electrically connected with the base or the collector, and a switching circuitry configured to apply a forward bias to the base-emitter junction. The bipolar transistor is configured for operation at a reverse collector-to-base voltage above the breakdown voltage.Type: GrantFiled: July 18, 2018Date of Patent: June 15, 2021Assignee: AMS AGInventors: Georg Roehrer, Robert Kappel, Nenad Lilic
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Patent number: 11029197Abstract: An optical sensor arrangement has an integrator, a photodiode for providing a current corresponding to a first polarity, a comparator coupled to the integrator for comparing a voltage with a threshold voltage to provide a comparison output, a reference charge circuit and a control unit. The reference charge circuit is coupled to the integrator for selectively providing first charge packages of a first size or second charge packages of a second size. The control unit is configured to control operation in a calibration phase, in an integration phase and in a residual measurement phase. During the calibration phase, the reference charge circuit provides one of the first charge packages and one or more of the second charge packages to the integrator until the comparison output changes. A reference number is determined corresponding to a number of the second charge packages provided.Type: GrantFiled: June 8, 2018Date of Patent: June 8, 2021Assignee: ams AGInventors: Bernhard Greimel-Längauer, Peter Bliem
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Patent number: 11031949Abstract: An analog-to-digital converter comprises a first integrator (40), a first converter input (19), a first reference voltage input (34), a capacitor array (68) comprising capacitor elements (171), and a rotation frequency control unit (37) providing a rotation signal (SRO) with at least two different values of a rotation frequency (fR). A first subset of capacitor elements (171) of the capacitor array (68) is coupled to the first converter input (19) and to an input side of the first integrator (40) in a first phase and is coupled to the first reference voltage input (34) and to the input side of the first integrator (40) in a second phase as a function of the rotation signal (SRO).Type: GrantFiled: March 20, 2018Date of Patent: June 8, 2021Assignee: AMS AGInventors: Jose Manuel García González, Rafael Serrano Gotarredona
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Patent number: 11009563Abstract: A signal processing arrangement for a Hall sensor comprises a signal path, a feedback path and a converter path. The signal path comprises a Hall element and a front-end amplifier which are connected in series and arranged to generate an output signal depending on a magnetic field. The feedback path comprises a compensation circuit and is coupled to the signal path. The converter path comprises an analog-to-digital converter and an offset compensation circuit and is coupled to the signal path. A switch network is coupled between the signal path, the feedback path and the converter path. In a compensation phase, the switch network electrically connects the feedback path to the signal path such that the compensation circuit generates a compensation signal which is coupled into the signal path. In a sampling phase, the switch network connects the signal path to the converter path such that the output signal is reduced by the compensation signal is provided at the converter path.Type: GrantFiled: January 31, 2018Date of Patent: May 18, 2021Assignee: AMS AGInventors: Dominik Ruck, Gerhard Oberhoffner
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Patent number: 10985767Abstract: A phase-locked loop circuitry (200) having low variation transconductance design comprises a voltage controlled oscillator structure (308) to provide an output signal (Fosc) having an oscillation frequency. The voltage controlled oscillator structure (308) comprises a voltage-to-current converter circuit (312) and a current controlled oscillator circuit (314). The voltage-to-current converter circuit is designed with a low variation transconductance. The voltage-controlled oscillator circuit (200) has a characteristic curve being independent of different PVT (processes, supply voltages and temperature) conditions to ensure that the phase-locked loop circuitry (200) is stable under different PVT condition.Type: GrantFiled: November 13, 2018Date of Patent: April 20, 2021Assignee: AMS AGInventors: Jia Sheng Chen, Gregor Schatzberger
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Patent number: 10978507Abstract: A method for manufacturing optical sensor arrangements is provided. The method comprises providing at least two optical sensors on a carrier and providing a cover material on the side of the optical sensors facing away from the carrier. The method further comprises providing an aperture for each optical sensor on a top side of the cover material facing away from the carrier and forming at least one trench between the optical sensors from the carrier towards the top side of the cover material, the trench comprising inner walls. Moreover, the method comprises coating the inner walls with an opaque material, such that an inner volume of the trench is free of the opaque material, and singulating of the optical sensor arrangements along the at least one trench. Furthermore, a housing for an optical sensor is provided.Type: GrantFiled: October 19, 2017Date of Patent: April 13, 2021Assignee: AMS AGInventors: Sonja Koenig, Bernhard Stering, Harald Etschmaier
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Patent number: 10976200Abstract: An optical sensing device comprises a photodetector array comprising at least one first photodetector and at least one second photodetector, the photodetector array being arranged on a semiconductor substrate. The optical sensing device further comprises a filter stack arranged on the substrate and covering the photodetector array. The filter stack comprises at least two first lower dielectric mirrors and at least two second lower dielectric mirrors, where a first and a second lower mirror are arranged above the first photodetector and a first and a second lower mirror are arranged above the second photodetector, and where the first lower mirrors have a different thickness in vertical direction which is perpendicular to the main plane of extension of the substrate than the second lower mirrors. The filter stack further comprises a spacer stack arranged on the first and second lower mirrors, and an upper dielectric mirror arranged on the spacer stack and covering the photodetector array.Type: GrantFiled: August 30, 2018Date of Patent: April 13, 2021Assignee: AMS AGInventors: Hubert Enichlmair, Gerhard Eilmsteiner
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Method for supplying energy wirelessly through radio frequency identification, RFID, and RFID system
Patent number: 10971957Abstract: In an embodiment a method for supplying energy wirelessly through RFID comprises the steps of sending by an RFID reader device a request message to at least one RFID tag device, receiving by the at least one RFID tag device the request message, sending by the at least one RFID tag device an answer message to the RFID reader device and changing by the at least one RFID tag device its state into a high power mode, receiving by the RFID reader device the answer message, sending by the RFID reader device an energizing signal having an unmodulated constant wave at a predefined frequency during an adjustable amount of time, receiving by the at least one RFID tag device the energizing signal, converting said signal into energy and using the energy by the at least one RFID tag device, and changing by the at least one RFID tag device its state into an RFID operation mode at the end of the adjustable amount of time.Type: GrantFiled: November 22, 2018Date of Patent: April 6, 2021Assignee: AMS AGInventor: Giuliano Manzi -
Patent number: 10972004Abstract: A voltage converter includes a first to a third capacitor, a supply terminal, a first and a second clock terminal and a transfer arrangement, wherein a first electrode of the first capacitor is connected to the first clock terminal and a second electrode of the first capacitor is connected to a first node of the transfer arrangement, wherein a first electrode of the second capacitor is connected to the second clock terminal and a second electrode of the second capacitor is connected to a second node of the transfer arrangement, and wherein a first electrode of the third capacitor is permanently and directly connected to the second electrode of the first capacitor and a second electrode of the third capacitor is connected to a third node of the transfer arrangement.Type: GrantFiled: January 26, 2018Date of Patent: April 6, 2021Assignee: AMS AGInventors: Herbert Lenhard, Manfred Lueger
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Patent number: 10971981Abstract: A position sensor (10) comprise at least a magneto sensitive element (11-14), a signal evaluation unit (16) that is coupled to the at least one magneto sensitive element (11-14) and is configured to generate an measurement signal (SM), an output stimulation unit (17) configured to generate a set signal (ST) and an interface unit (18) that is coupled at its input side to the signal evaluation unit (16) and the output stimulation unit (17). The interface unit (18) is configured to provide a sensor output signal (SOUT) depending on the measurement signal (SM) in a measurement mode of operation and depending on the set signal (ST) in a calibration mode of operation.Type: GrantFiled: April 5, 2017Date of Patent: April 6, 2021Assignee: AMS AGInventors: Michael Pichler, Gerald Wiednig
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Patent number: 10972111Abstract: A phase-locked loop circuit comprises an oscillator having a plurality of operating curves and being suitable for generating an output signal. In a calibration state the oscillator is trimmed to an operating curve for use in a normal operation state. The phase-locked loop circuit further comprises a phase/frequency detector being suitable for generating at least one error signal based on an input signal and a feedback signal generated on the basis of the output signal. The phase-locked loop circuit further comprises a loop filter being suitable for generating a loop-filter signal based on the at least one error signal, the loop-filter signal being applied to the oscillator in the normal operation state. The phase-locked loop circuit further comprises a calibration circuit being suitable for trimming the oscillator to the operating curve for use in the normal operation state on the basis of the at least one error signal.Type: GrantFiled: July 31, 2018Date of Patent: April 6, 2021Assignee: AMS AGInventors: Jia Sheng Chen, Gregor Schatzberger
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Patent number: 10959002Abstract: A method for operating an integrated MEMS microphone device is proposed. The integrated MEMS microphone device comprises a package housing enclosing an interior cavity, wherein an integrated MEMS microphone die with a movable membrane, at least one environmental sensor and a thermal decoupling circuit are arranged inside the cavity. The method comprising the steps of repeatedly operating the environmental sensor in a measurement mode and activating the thermal decoupling circuit for a transition phase preceding and/or succeeding the measurement mode of the environmental sensor. During the transition phase a heat dissipation into the cavity is gradually adjusted.Type: GrantFiled: July 3, 2018Date of Patent: March 23, 2021Assignee: AMS AGInventor: Naoaki Nishimura
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Patent number: 10950187Abstract: A method is suggested for sensing light being incident on an electronic device. The electronic device comprises a display and a light sensor arrangement mounted behind the display such as to receive incident light through the display. The method comprises periodically switching the display on and off depending on a control signal, wherein a period is defined by a succession of an on-state and an off-state of the display. A sensor signal is generated by integrating the incident light by means of the light sensor arrangement for a total integration time comprising a number of periods. A first signal count is determined from the sensor signal being indicative of an amount of integrated incident light during an on-state. A second signal count is determined from the sensor signal being indicative of an amount of integrated incident light during an off-state. A third signal count is determined from the sensor signal being indicative of an amount of integrated incident light during the total integration time.Type: GrantFiled: February 7, 2018Date of Patent: March 16, 2021Assignee: AMS AGInventors: Josef Kriebernegg, Bernhard Greimel-Rechling, Herbert Lenhard, Peter Bliem, Joachim Lechner, Christian Halper, Manuel Hoerbinger
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Patent number: 10943936Abstract: A method is proposed to produce an optical sensor at wafer-level, the methods comprises the following steps. A wafer is provided and has a main top surface and a main back surface. At or near the top surface of the wafer at least one integrated circuit is arranged having a light sensitive component. A first mold tool is placed over the at least one integrated circuit such that at least one channel remains between the first mold tool and the top surface to enter a first mold material. A first mold structure is formed by wafer-level molding the first mold material via the at least one channel. The first mold material creates at least one runner structure. A second mold tool is placed over the first mold structure and a second mold structure is formed by wafer-level molding a second mold material by means of the second mold tool. A light path blocking structure is arranged on the top surface to block light from entering via the at least one runner structure.Type: GrantFiled: August 8, 2017Date of Patent: March 9, 2021Assignee: AMS AGInventors: Gregor Toschkoff, Thomas Bodner, Franz Schrank
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Patent number: 10944251Abstract: A protective circuit (10) comprises a terminal (11), a reference potential terminal (12) and a protective structure (13) that is arranged between the terminal (11) and the reference potential terminal (12), and is designed to be conductive in the event of an electrostatic discharge. The protective circuit (10) furthermore comprises a voltage supply circuit (14) that is coupled to a control input (16) of the protective structure (13) with its output side and is designed for delivering, in the event of radiofrequency interference, a control signal (ST) to the control input (16) with such a high voltage value that conduction of the protective structure (13) is prevented.Type: GrantFiled: July 15, 2019Date of Patent: March 9, 2021Assignee: ams AGInventors: Wolfgang Reinprecht, Christian Stockreiter, Bernhard Weiss
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Patent number: 10937408Abstract: A noise cancellation system for a noise cancellation enabled audio device comprises a first noise filter and a second noise filter, each being designed to process a noise signal, a combiner and an adaptation engine. The first noise filter has a first fixed frequency response matched to a high leakage condition of the audio device. The second noise filter has a second fixed frequency response matched to a low leakage condition of the audio device. The combiner is configured to provide a compensation signal based on a combination of an output of the first noise filter amplified with a first adjustable gain factor and an output of the second noise filter amplified with a second adjustable gain factor. The adaptation engine is configured to estimate a leakage condition of the audio device based on an error noise signal and to adjust at least one of the first and the second adjustable gain factors based on the estimated leakage condition.Type: GrantFiled: August 27, 2018Date of Patent: March 2, 2021Assignee: AMS AGInventors: Peter McCutcheon, Robert Alcock
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Patent number: 10925497Abstract: A circuit arrangement for an optical monitoring system comprises a driver circuit configured to generate at least one driving signal for driving a light source and a detector terminal for receiving a detector current. The circuit arrangement further comprises a current source configured and arranged to generate at the detector terminal a reduction current. The reduction current has an amplitude which is given by a base value whenever none of the least one driving signal assumes a value suitable for activating the light source and by a sum of the base value and a reduction value otherwise. The circuit arrangement also comprises a processing unit configured to generate an output signal depending on a combination of the detector current and the reduction current.Type: GrantFiled: August 17, 2016Date of Patent: February 23, 2021Assignee: ams AGInventors: Peter Trattler, Manfred Pauritsch, Herbert Lenhard
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Patent number: 10921277Abstract: A sensor arrangement (10) comprises a capacitive sensor (11) with a first electrode line (12), a second electrode line (16) and a third electrode line (20) and a sensitive layer (30) arranged at the first, the second and the third electrode line (12, 16, 20). The sensor arrangement (10) comprises a readout circuit (50) that comprises a capacitance-to-digital converter (51), is coupled to the first, the second and the third electrode line (12, 16, 20) and is configured to generate a first measurement signal (S1) using the first and the second electrode line (12, 16) and a second measurement signal (S2) using at least the third electrode line (20).Type: GrantFiled: February 7, 2017Date of Patent: February 16, 2021Assignee: AMS AGInventors: Hilco Suy, Dimitri Soccol
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Publication number: 20210040943Abstract: A pumping structure comprises at least two membranes, at least two actuation chambers, one evaluation chamber comprising an opening to the outside of the pumping structure, and at least three electrodes. Each membrane is arranged between two electrodes in a vertical direction which is perpendicular to the main plane of extension of the pumping structure, each actuation chamber is arranged between one of the membranes and one of the electrodes in vertical direction, and each actuation chamber is connected to the evaluation chamber via a channel. Furthermore, a particle detector and a method for pumping are provided.Type: ApplicationFiled: February 1, 2019Publication date: February 11, 2021Applicant: ams AGInventors: Raffaele COPPETA, Jacopo BRIVIO, Anderson PIRES SINGULANI, Verena VESCOLI
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Patent number: 10897232Abstract: A multi-level capacitive digital-to-analog converter, comprises at least one capacitor switch circuit (100) including a differential operational amplifier (130) having a first input node (E130a) and a second input node (E130b). A first current path (101) is coupled to a first reference input terminal (E100a) to apply a first reference potential (RefP) and the second current path (102) is coupled to a second reference input terminal (E100b) to apply a second reference potential (RefN). The at least one capacitor switch circuit (100) comprises a first controllable switch (111) being arranged between the second input node (E130a) of the differential operational amplifier (130) and the first current path (101). The at least one capacitor switch circuit (100) comprises a second controllable switch (112) being arranged between the first input node (E130a) of the differential operational amplifier (130) and the second current path (102).Type: GrantFiled: April 18, 2018Date of Patent: January 19, 2021Assignee: AMS AGInventor: Daisuke Horii