Patents Assigned to Anadigics, Inc.
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Patent number: 7248111Abstract: A power amplifier with a multi-mode digital bias control circuit is provided. The power amplifier utilizes a complementary reference voltage generation circuit and a bias current-control circuit to generate a plurality of bias current levels for different output power levels. In an embodiment of the present invention, the power amplifier circuit is connected to a reference voltage and two control signals. Depending on the desired output power level, the control signals set the corresponding bias current in the amplifying transistors, to ensure sufficient linearity. The power amplifier is capable of operating at a very low quiescent current level, for example, 5 mA. As a result, a significant improvement in the power amplifier's overall efficiency is achieved, and the battery talk time of a wireless communication device is increased. The invention finds application in wireless communication devices such as CDMA, WCDMA, EDGE and WLAN mobile devices.Type: GrantFiled: April 14, 2005Date of Patent: July 24, 2007Assignee: Anadigics, IncInventors: Sheldon Xu, Thomas William Arell, Mahendra Singh, Mohammed Ali Khatibzadeh
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Patent number: 7173406Abstract: A method and apparatus for power amplifier gain control is provided, such as may be embodied as an integrated circuit is disclosed. Embodiments provide for a continuously variable gain control at low cost as contrasted two-state or multi-state capabilities of previously developed solutions. Improved consistency and control over gain may be provided using features disclosed.Type: GrantFiled: August 26, 2004Date of Patent: February 6, 2007Assignee: Anadigics, Inc.Inventor: Hamid Reza Rategh
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Patent number: 7102444Abstract: A method and apparatus for an amplifier, such as a radio frequency amplifier embodiment as an integrated circuit is disclosed. Embodiments provide for operating with good energy efficiency at multiple power levels. Resonant components act to provide consistent operating parameters over the wide range of power levels used. A compensating impedance is switched into or out of circuit in high power mode to improve the match that would pertain without the compensation. Improved compensation and linearity may be provided using features disclosed. The invention may operate in the microwave region or at other RFs.Type: GrantFiled: September 24, 2004Date of Patent: September 5, 2006Assignee: ANADIGICS, Inc.Inventors: Payman Hosseinzadeh Shanjani, Hamid Reza Rategh
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Patent number: 7071514Abstract: A compact ESD protection device is described that uses the reverse breakdown voltage of a base-emitter junction as a trigger diode to switch a transistor that shunts the forward bias ESD current to ground. The trigger diode in series with a leakage diode provides a path to shunt the reverse bias ESD current to ground. The leakage diode is matched to the trigger diode to shunt any leakage current from the trigger diode to ground.Type: GrantFiled: December 2, 2004Date of Patent: July 4, 2006Assignee: Anadigics, Inc.Inventor: Kenneth Sean Ozard
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Publication number: 20060087302Abstract: An improved Monolithic Microwave Integrated Circuit DC-to-DC voltage converter fabricated in GaAs MESFET technology is introduced. The converter comprises a differential oscillator having crossed-coupled symmetrical inductors that ensure low-noise operation. The converter further comprises a highly-efficient synchronous rectifier and a start-up circuit.Type: ApplicationFiled: December 8, 2005Publication date: April 27, 2006Applicant: Anadigics, Inc.Inventor: Norman Scheinberg
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Patent number: 7019508Abstract: A method and apparatus for a temperature compensated bias network, such as may be embodied as an integrated circuit is disclosed. Embodiments provide for a wide range of desired temperature characteristics with good stability. Current mirror components with active leakage circuits may act to provide consistent operating parameters over a wide range of temperatures. Improved compensation and linearity may be provided using features disclosed.Type: GrantFiled: June 24, 2004Date of Patent: March 28, 2006Assignee: Anadigics Inc.Inventors: Hamid Reza Rategh, Behzad Tavassoli Hozouri
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Patent number: 7015519Abstract: Methods and systems for fabricating integrated pairs of HBT/FET's are disclosed. One preferred embodiment comprises a method of fabricating an integrated pair of GaAs-based HBT and FET. The method comprises the steps of: growing a first set of epitaxial layers for fabricating the FET on a semi-insulating GaAs substrate; fabricating a highly doped thick GaAs layer serving as the cap layer for the FET and the subcollector layer for the HBT; and producing a second set of epitaxial layers for fabricating the HBT.Type: GrantFiled: February 20, 2004Date of Patent: March 21, 2006Assignee: Anadigics, Inc.Inventors: Oleh Krutko, Kezhou Xie, Mohsen Shokrani, Aditya Gupta, Boris Gedzberg
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Patent number: 7009454Abstract: A method and apparatus for an amplifier, such as a radio frequency amplifier embodied as an integrated circuit is disclosed. Embodiments provide for a wide range of operating powers with good energy efficiency at many power levels. Resonant components act to provide consistent operating parameters over the wide range of power levels used. The invention may operate in the microwave region or at other RFs.Type: GrantFiled: January 20, 2004Date of Patent: March 7, 2006Assignee: Anadigics Inc.Inventors: Hamid Reza Rategh, Mehdi Frederik Soltan
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Patent number: 6998920Abstract: A monolithically integrated amplifier comprising at least one heterojunction bipolar transistor and at least one field effect transistor is disclosed wherein the field effect transistor provides improved ruggedness by limiting the base and/or collector current to the HBT during severe load mismatch and/or high overdrive.Type: GrantFiled: February 20, 2004Date of Patent: February 14, 2006Assignee: Anadigics Inc.Inventors: Oleh B. Krutko, Aditya K. Gupta, M. Ali Khatibzadeh, Kezhou Xie
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Patent number: 6937102Abstract: A power amplifier circuit whose performance is optimized by operating its stages in substantially close to a Class B mode by reducing quiescent current during low driver signal levels. As the driver signal amplitude increases, the operation of the amplifier is configured to dynamically adjust to be in a Class AB mode, thereby increasing the power efficiency of the overall circuit at kiw drive levels. A further enhancement to the power amplifier circuit includes a temperature compensation circuit to adjust the bias of the amplifier so as to stabilize the performance in a wide temperature range.Type: GrantFiled: July 29, 2002Date of Patent: August 30, 2005Assignee: Anadigics, Inc.Inventors: Osvaldo Jorge Lopez, Robert Bayruns, Mahendra Singh
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Patent number: 6856004Abstract: A semiconductor device includes a semiconductor substrate, an electrode disposed on an upper surface of the substrate, and a set of one or more transistor element(s) disposed on the upper surface of the substrate. The set of transistor element(s) compactly surrounds the electrode with a threshold distance. In one embodiment, the set also compactly surrounds a via hole. In another, the element(s) comprises a bipolar junction transistor that has an aggregate emitter length of not less than 10 microns. In still another embodiment, the device is coupled to a RF circuit for power amplification.Type: GrantFiled: December 19, 2002Date of Patent: February 15, 2005Assignee: Anadigics, Inc.Inventors: Ali Kiaei, Mehdi Frederick Soltan, Ali Rajaei, Hamid Reza Rategh
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Patent number: 6853526Abstract: A circuit and method are disclosed for protecting an integrated circuit (IC) against transient overvoltages. The circuit comprises a balun transformer and a normally-off transistor. The balun input terminals are connected to an unbalanced circuit, while the balun output terminals are connected to a balanced circuit. The transistor is connected between the balun output terminals and has a gate connected to ground or to some other reference voltage. When an overvoltage transient signal reaches the balun input terminals, the balun transformer converts the transient to a balanced transient signal on the two branches of the balanced circuit. During overvoltage conditions, one balun output terminal will have a voltage which swings low enough that the protection transistor turns on, effectively shorting the overvoltage spike and protecting any upstream (or downstream) IC components from damage. When the transient is over, the transistor returns to the “off” state.Type: GrantFiled: September 22, 2000Date of Patent: February 8, 2005Assignee: Anadigics, Inc.Inventors: John van Saders, Douglas M. Johnson
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Patent number: 6842075Abstract: A transistor bias circuit is provided that is capable of operating from a power supply voltage that is slightly higher than twice the base-emitter voltage of the transistor to be biased. The bias circuit includes a transistor connected in a current-mirror configuration with the transistor to be biased. A feedback circuit maintains the mirrored current at a constant level. The gain of the feedback circuit is improved by the addition of a non-inverting amplifier within the feedback circuit. In a preferred embodiment, the biased transistor is concurrently in both a Darlington and the current mirror configuration. Moreover, a feedback transistor in the feedback circuit is also concurrently in the Darlington configuration, thus providing an efficient biasing arrangement for an amplifier block based on the Darlington arrangement.Type: GrantFiled: December 13, 2002Date of Patent: January 11, 2005Assignee: Anadigics, Inc.Inventors: Douglas M. Johnson, Henry Z. Liwinski
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Patent number: 6806767Abstract: A power amplifier circuit includes a power amplifier responsive to a power mode signal, the power amplifier having a power amplifier output node, and a power amplifier load circuit also responsive to the power mode signal, the power amplifier load circuit having a load circuit input node connected to the power amplifier output node. The power amplifier load circuit has a first transmission line coupled between the load circuit input node and a first node, a harmonic filter coupled between the load circuit input node and a common node, a first capacitor coupled between the first node and the common node, and a first switch coupled between the common node and ground, where the first switch is responsive to the power mode signal.Type: GrantFiled: July 9, 2002Date of Patent: October 19, 2004Assignee: Anadigics, Inc.Inventor: Gee Samuel Dow
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Patent number: 6803824Abstract: A method and apparatus for a variable gain cascode amplifier (or attenuator) is disclosed. Embodiments provide for a compensated input impedance. A gain/impedance controller compensates input impedance corresponding to gain adjustments.Type: GrantFiled: December 18, 2001Date of Patent: October 12, 2004Assignee: Anadigics, Inc.Inventors: Hamid Reza Rategh, Payman Hosseinzadeh Shanjani, Ngar Loong Alan Chan, Mehdi Frederik Soltan
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Publication number: 20040130436Abstract: A laser system and method for cleanly trimming or severing resistive links fabricated on an undoped gallium arsenide substrate without damaging or affecting adjacent circuit structures or the underlying or surrounding substrate is disclosed. The system comprises a laser source adapted to generate an output at a wavelength within the range of 0.9 to 1.5 &mgr;m, a resistive film structure formed on an undoped gallium arsenide substrate, and a beam positioner and alignment system to align the laser source with the target structure. The method comprises generating a laser output at a wavelength in a range of about 0.9 to 1.5 &mgr;m and directing the laser output to illuminate a resistive thin-film structure fabricated on a gallium arsenide substrate. The resistive film structure comprises a first layer of protective dielectric and a layer of resistive thin-film material. Preferably, a second layer of protective dielectric lies upon the layer of resistive thin-film material.Type: ApplicationFiled: December 15, 2003Publication date: July 8, 2004Applicant: Anadigics, Inc.Inventors: Mark Steven Wilbur, Sheo Kumar Khetan
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Patent number: 6760900Abstract: A method for designing at least one mask for manufacturing an integrated circuit is disclosed. The method may include generating a schematic; entering data representing transistors of the set into a computer-aided design system; identifying transistors expected to be subject to voltage levels beyond the bounds of a power rail and a ground rail; designating robust geometries such transistors and operating the computer-aided design system to generate mask or masks. Integrated circuits of scalable design are also disclosed.Type: GrantFiled: December 3, 2001Date of Patent: July 6, 2004Assignee: Anadigics Inc.Inventors: Hamid Reza Rategh, Mehdi Frederik Soltan
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Patent number: 6759922Abstract: The present invention discloses a miniature high directivity multi-band coupled-line coupler for RF power amplifier module application. The coupler utilizes a three-coupled-line structure, with a first RF line designated coupled line for the GSM 900 MHZ band, a second RF line designated coupled line for the DCS/PCS 1800/1900 MHZ band, and a common coupled line. A first capacitor is connected between the center of the first line and the center of the common line and a second capacitor is connected between the center of the second line and the center of the common line. The coupler has a length considerably less than the length of a quarter wave length coupler while achieving directivity requirements for both GSM band and DCS/PCS band.Type: GrantFiled: May 20, 2002Date of Patent: July 6, 2004Assignee: Anadigics, Inc.Inventors: Aharon Adar, Sheldon Xu
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Patent number: 6753734Abstract: There is disclosed a bias circuit exhibiting good stability over variations in temperature and power supply voltage and capable of generating a plurality of discrete levels of output current for biasing RF power amplifier. In accordance with the invention, the bias circuit includes (1) a master transistor connected to the slave transistor in a current-mirror configuration and having two parallel-connected transistor elements, (2) a switch connected to at least one transistor element to control its operation, and (3) a feedback circuit by which the voltage at the collector of the master transistor may be fed back to control the voltages at the bases of the master transistor and the slave transistor. Moreover, the bias circuit can be operated from a power supply voltage that is just above twice the value of the base-emitter voltage of the transistor in the circuit.Type: GrantFiled: February 4, 2003Date of Patent: June 22, 2004Assignee: Anadigics, Inc.Inventors: Thomas W. Arell, Henry Z. Liwinski
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Patent number: 6724067Abstract: A thermal and electrical interconnect for heterojunction bipolar transistors is disclosed wherein the interconnect is essentially comprised of gold and in thermal and electrical contact with each of the interdigitated emitter fingers and is capable of transporting heat fluxes between 0.25-1.5 mW/&mgr;m2. The interconnect is electrodeposited to form a low-stress interface with the emitter finger, thereby increasing the lifetime and reliability of the transistor.Type: GrantFiled: October 7, 2002Date of Patent: April 20, 2004Assignee: Anadigics, Inc.Inventor: Burhan Bayraktaroglu